drivers/mtd/cfi_flash.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2002-2004
   4  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   5  *
   6  * Copyright (C) 2003 Arabella Software Ltd.
   7  * Yuli Barcohen <yuli@arabellasw.com>
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  *
  12  * Copyright (C) 2006
  13  * Tolunay Orkun <listmember@orkun.us>
  14  */
  15
  16 /* The DEBUG define must be before common to enable debugging */
  17 /* #define DEBUG        */
  18
  19 #include <common.h>
  20 #include <console.h>
  21 #include <dm.h>
  22 #include <env.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <flash.h>
  26 #include <init.h>
  27 #include <irq_func.h>
  28 #include <log.h>
  29 #include <asm/global_data.h>
  30 #include <asm/processor.h>
  31 #include <asm/io.h>
  32 #include <asm/byteorder.h>
  33 #include <asm/unaligned.h>
  34 #include <env_internal.h>
  35 #include <linux/delay.h>
  36 #include <mtd/cfi_flash.h>
  37 #include <watchdog.h>
  38
  39 /*
  40  * This file implements a Common Flash Interface (CFI) driver for
  41  * U-Boot.
  42  *
  43  * The width of the port and the width of the chips are determined at
  44  * initialization.  These widths are used to calculate the address for
  45  * access CFI data structures.
  46  *
  47  * References
  48  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  49  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  50  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  51  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  52  * AMD CFI Specification, Release 2.0 December 1, 2001
  53  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  54  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  55  *
  56  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  57  * reading and writing ... (yes there is such a Hardware).
  58  */
  59
  60 DECLARE_GLOBAL_DATA_PTR;
  61
  62 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  63 #ifdef CONFIG_FLASH_CFI_MTD
  64 static uint flash_verbose = 1;
  65 #else
  66 #define flash_verbose 1
  67 #endif
  68
  69 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  70
  71 /*
  72  * Check if chip width is defined. If not, start detecting with 8bit.
  73  */
  74 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  75 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  76 #endif
  77
  78 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  79 #define __maybe_weak __weak
  80 #else
  81 #define __maybe_weak static
  82 #endif
  83
  84 /*
  85  * 0xffff is an undefined value for the configuration register. When
  86  * this value is returned, the configuration register shall not be
  87  * written at all (default mode).
  88  */
  89 static u16 cfi_flash_config_reg(int i)
  90 {
  91 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  92         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  93 #else
  94         return 0xffff;
  95 #endif
  96 }
  97
  98 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  99 int cfi_flash_num_flash_banks = CFI_MAX_FLASH_BANKS;
 100 #else
 101 int cfi_flash_num_flash_banks;
 102 #endif
 103
 104 #ifdef CONFIG_CFI_FLASH /* for driver model */
 105 static void cfi_flash_init_dm(void)
 106 {
 107         struct udevice *dev;
 108
 109         cfi_flash_num_flash_banks = 0;
 110         /*
 111          * The uclass_first_device() will probe the first device and
 112          * uclass_next_device() will probe the rest if they exist. So
 113          * that cfi_flash_probe() will get called assigning the base
 114          * addresses that are available.
 115          */
 116         for (uclass_first_device(UCLASS_MTD, &dev);
 117              dev;
 118              uclass_next_device(&dev)) {
 119         }
 120 }
 121
 122 phys_addr_t cfi_flash_bank_addr(int i)
 123 {
 124         return flash_info[i].base;
 125 }
 126 #else
 127 __weak phys_addr_t cfi_flash_bank_addr(int i)
 128 {
 129         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 130 }
 131 #endif
 132
 133 __weak unsigned long cfi_flash_bank_size(int i)
 134 {
 135 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 136         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 137 #else
 138         return 0;
 139 #endif
 140 }
 141
 142 __maybe_weak void flash_write8(u8 value, void *addr)
 143 {
 144         __raw_writeb(value, addr);
 145 }
 146
 147 __maybe_weak void flash_write16(u16 value, void *addr)
 148 {
 149         __raw_writew(value, addr);
 150 }
 151
 152 __maybe_weak void flash_write32(u32 value, void *addr)
 153 {
 154         __raw_writel(value, addr);
 155 }
 156
 157 __maybe_weak void flash_write64(u64 value, void *addr)
 158 {
 159         /* No architectures currently implement __raw_writeq() */
 160         *(volatile u64 *)addr = value;
 161 }
 162
 163 __maybe_weak u8 flash_read8(void *addr)
 164 {
 165         return __raw_readb(addr);
 166 }
 167
 168 __maybe_weak u16 flash_read16(void *addr)
 169 {
 170         return __raw_readw(addr);
 171 }
 172
 173 __maybe_weak u32 flash_read32(void *addr)
 174 {
 175         return __raw_readl(addr);
 176 }
 177
 178 __maybe_weak u64 flash_read64(void *addr)
 179 {
 180         /* No architectures currently implement __raw_readq() */
 181         return *(volatile u64 *)addr;
 182 }
 183
 184 /*-----------------------------------------------------------------------
 185  */
 186 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
 187         (defined(CONFIG_SYS_MONITOR_BASE) && \
 188         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
 189 static flash_info_t *flash_get_info(ulong base)
 190 {
 191         int i;
 192         flash_info_t *info;
 193
 194         for (i = 0; i < CFI_FLASH_BANKS; i++) {
 195                 info = &flash_info[i];
 196                 if (info->size && info->start[0] <= base &&
 197                     base <= info->start[0] + info->size - 1)
 198                         return info;
 199         }
 200
 201         return NULL;
 202 }
 203 #endif
 204
 205 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 206 {
 207         if (sect != (info->sector_count - 1))
 208                 return info->start[sect + 1] - info->start[sect];
 209         else
 210                 return info->start[0] + info->size - info->start[sect];
 211 }
 212
 213 /*-----------------------------------------------------------------------
 214  * create an address based on the offset and the port width
 215  */
 216 static inline void *
 217 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 218 {
 219         unsigned int byte_offset = offset * info->portwidth;
 220
 221         return (void *)(info->start[sect] + (byte_offset << info->chip_lsb));
 222 }
 223
 224 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 225                                unsigned int offset, void *addr)
 226 {
 227 }
 228
 229 /*-----------------------------------------------------------------------
 230  * make a proper sized command based on the port and chip widths
 231  */
 232 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 233 {
 234         int i;
 235         int cword_offset;
 236         int cp_offset;
 237 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 238         u32 cmd_le = cpu_to_le32(cmd);
 239 #endif
 240         uchar val;
 241         uchar *cp = (uchar *) cmdbuf;
 242
 243         for (i = info->portwidth; i > 0; i--) {
 244                 cword_offset = (info->portwidth - i) % info->chipwidth;
 245 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 246                 cp_offset = info->portwidth - i;
 247                 val = *((uchar *)&cmd_le + cword_offset);
 248 #else
 249                 cp_offset = i - 1;
 250                 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 251 #endif
 252                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 253         }
 254 }
 255
 256 #ifdef DEBUG
 257 /*-----------------------------------------------------------------------
 258  * Debug support
 259  */
 260 static void print_longlong(char *str, unsigned long long data)
 261 {
 262         int i;
 263         char *cp;
 264
 265         cp = (char *)&data;
 266         for (i = 0; i < 8; i++)
 267                 sprintf(&str[i * 2], "%2.2x", *cp++);
 268 }
 269
 270 static void flash_printqry(struct cfi_qry *qry)
 271 {
 272         u8 *p = (u8 *)qry;
 273         int x, y;
 274
 275         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 276                 debug("%02x : ", x);
 277                 for (y = 0; y < 16; y++)
 278                         debug("%2.2x ", p[x + y]);
 279                 debug(" ");
 280                 for (y = 0; y < 16; y++) {
 281                         unsigned char c = p[x + y];
 282
 283                         if (c >= 0x20 && c <= 0x7e)
 284                                 debug("%c", c);
 285                         else
 286                                 debug(".");
 287                 }
 288                 debug("\n");
 289         }
 290 }
 291 #endif
 292
 293 /*-----------------------------------------------------------------------
 294  * read a character at a port width address
 295  */
 296 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 297 {
 298         uchar *cp;
 299         uchar retval;
 300
 301         cp = flash_map(info, 0, offset);
 302 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 303         retval = flash_read8(cp);
 304 #else
 305         retval = flash_read8(cp + info->portwidth - 1);
 306 #endif
 307         flash_unmap(info, 0, offset, cp);
 308         return retval;
 309 }
 310
 311 /*-----------------------------------------------------------------------
 312  * read a word at a port width address, assume 16bit bus
 313  */
 314 static inline ushort flash_read_word(flash_info_t *info, uint offset)
 315 {
 316         ushort *addr, retval;
 317
 318         addr = flash_map(info, 0, offset);
 319         retval = flash_read16(addr);
 320         flash_unmap(info, 0, offset, addr);
 321         return retval;
 322 }
 323
 324 /*-----------------------------------------------------------------------
 325  * read a long word by picking the least significant byte of each maximum
 326  * port size word. Swap for ppc format.
 327  */
 328 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 329                               uint offset)
 330 {
 331         uchar *addr;
 332         ulong retval;
 333
 334 #ifdef DEBUG
 335         int x;
 336 #endif
 337         addr = flash_map(info, sect, offset);
 338
 339 #ifdef DEBUG
 340         debug("long addr is at %p info->portwidth = %d\n", addr,
 341               info->portwidth);
 342         for (x = 0; x < 4 * info->portwidth; x++)
 343                 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 344 #endif
 345 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 346         retval = ((flash_read8(addr) << 16) |
 347                   (flash_read8(addr + info->portwidth) << 24) |
 348                   (flash_read8(addr + 2 * info->portwidth)) |
 349                   (flash_read8(addr + 3 * info->portwidth) << 8));
 350 #else
 351         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 352                   (flash_read8(addr + info->portwidth - 1) << 16) |
 353                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 354                   (flash_read8(addr + 3 * info->portwidth - 1)));
 355 #endif
 356         flash_unmap(info, sect, offset, addr);
 357
 358         return retval;
 359 }
 360
 361 /*
 362  * Write a proper sized command to the correct address
 363  */
 364 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 365                             uint offset, u32 cmd)
 366 {
 367         void *addr;
 368         cfiword_t cword;
 369
 370         addr = flash_map(info, sect, offset);
 371         flash_make_cmd(info, cmd, &cword);
 372         switch (info->portwidth) {
 373         case FLASH_CFI_8BIT:
 374                 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 375                       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 376                 flash_write8(cword.w8, addr);
 377                 break;
 378         case FLASH_CFI_16BIT:
 379                 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 380                       cmd, cword.w16,
 381                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 382                 flash_write16(cword.w16, addr);
 383                 break;
 384         case FLASH_CFI_32BIT:
 385                 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 386                       cmd, cword.w32,
 387                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 388                 flash_write32(cword.w32, addr);
 389                 break;
 390         case FLASH_CFI_64BIT:
 391 #ifdef DEBUG
 392                 {
 393                         char str[20];
 394
 395                         print_longlong(str, cword.w64);
 396
 397                         debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 398                               addr, cmd, str,
 399                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 400                 }
 401 #endif
 402                 flash_write64(cword.w64, addr);
 403                 break;
 404         }
 405
 406         /* Ensure all the instructions are fully finished */
 407         sync();
 408
 409         flash_unmap(info, sect, offset, addr);
 410 }
 411
 412 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 413 {
 414         flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 415         flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 416 }
 417
 418 /*-----------------------------------------------------------------------
 419  */
 420 static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
 421                          uchar cmd)
 422 {
 423         void *addr;
 424         cfiword_t cword;
 425         int retval;
 426
 427         addr = flash_map(info, sect, offset);
 428         flash_make_cmd(info, cmd, &cword);
 429
 430         debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 431         switch (info->portwidth) {
 432         case FLASH_CFI_8BIT:
 433                 debug("is= %x %x\n", flash_read8(addr), cword.w8);
 434                 retval = (flash_read8(addr) == cword.w8);
 435                 break;
 436         case FLASH_CFI_16BIT:
 437                 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 438                 retval = (flash_read16(addr) == cword.w16);
 439                 break;
 440         case FLASH_CFI_32BIT:
 441                 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 442                 retval = (flash_read32(addr) == cword.w32);
 443                 break;
 444         case FLASH_CFI_64BIT:
 445 #ifdef DEBUG
 446                 {
 447                         char str1[20];
 448                         char str2[20];
 449
 450                         print_longlong(str1, flash_read64(addr));
 451                         print_longlong(str2, cword.w64);
 452                         debug("is= %s %s\n", str1, str2);
 453                 }
 454 #endif
 455                 retval = (flash_read64(addr) == cword.w64);
 456                 break;
 457         default:
 458                 retval = 0;
 459                 break;
 460         }
 461         flash_unmap(info, sect, offset, addr);
 462
 463         return retval;
 464 }
 465
 466 /*-----------------------------------------------------------------------
 467  */
 468 static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
 469                        uchar cmd)
 470 {
 471         void *addr;
 472         cfiword_t cword;
 473         int retval;
 474
 475         addr = flash_map(info, sect, offset);
 476         flash_make_cmd(info, cmd, &cword);
 477         switch (info->portwidth) {
 478         case FLASH_CFI_8BIT:
 479                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 480                 break;
 481         case FLASH_CFI_16BIT:
 482                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 483                 break;
 484         case FLASH_CFI_32BIT:
 485                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 486                 break;
 487         case FLASH_CFI_64BIT:
 488                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 489                 break;
 490         default:
 491                 retval = 0;
 492                 break;
 493         }
 494         flash_unmap(info, sect, offset, addr);
 495
 496         return retval;
 497 }
 498
 499 /*-----------------------------------------------------------------------
 500  */
 501 static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
 502                         uchar cmd)
 503 {
 504         u8 *addr;
 505         cfiword_t cword;
 506         int retval;
 507
 508         addr = flash_map(info, sect, offset);
 509         flash_make_cmd(info, cmd, &cword);
 510         switch (info->portwidth) {
 511         case FLASH_CFI_8BIT:
 512                 retval = flash_read8(addr) != flash_read8(addr);
 513                 break;
 514         case FLASH_CFI_16BIT:
 515                 retval = flash_read16(addr) != flash_read16(addr);
 516                 break;
 517         case FLASH_CFI_32BIT:
 518                 retval = flash_read32(addr) != flash_read32(addr);
 519                 break;
 520         case FLASH_CFI_64BIT:
 521                 retval = ((flash_read32(addr) != flash_read32(addr)) ||
 522                            (flash_read32(addr + 4) != flash_read32(addr + 4)));
 523                 break;
 524         default:
 525                 retval = 0;
 526                 break;
 527         }
 528         flash_unmap(info, sect, offset, addr);
 529
 530         return retval;
 531 }
 532
 533 /*
 534  * flash_is_busy - check to see if the flash is busy
 535  *
 536  * This routine checks the status of the chip and returns true if the
 537  * chip is busy.
 538  */
 539 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 540 {
 541         int retval;
 542
 543         switch (info->vendor) {
 544         case CFI_CMDSET_INTEL_PROG_REGIONS:
 545         case CFI_CMDSET_INTEL_STANDARD:
 546         case CFI_CMDSET_INTEL_EXTENDED:
 547                 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 548                 break;
 549         case CFI_CMDSET_AMD_STANDARD:
 550         case CFI_CMDSET_AMD_EXTENDED:
 551 #ifdef CONFIG_FLASH_CFI_LEGACY
 552         case CFI_CMDSET_AMD_LEGACY:
 553 #endif
 554                 if (info->sr_supported) {
 555                         flash_write_cmd(info, sect, info->addr_unlock1,
 556                                         FLASH_CMD_READ_STATUS);
 557                         retval = !flash_isset(info, sect, 0,
 558                                               FLASH_STATUS_DONE);
 559                 } else {
 560                         retval = flash_toggle(info, sect, 0,
 561                                               AMD_STATUS_TOGGLE);
 562                 }
 563
 564                 break;
 565         default:
 566                 retval = 0;
 567         }
 568         debug("%s: %d\n", __func__, retval);
 569         return retval;
 570 }
 571
 572 /*-----------------------------------------------------------------------
 573  *  wait for XSR.7 to be set. Time out with an error if it does not.
 574  *  This routine does not set the flash to read-array mode.
 575  */
 576 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 577                               ulong tout, char *prompt)
 578 {
 579         ulong start;
 580
 581 #if CONFIG_SYS_HZ != 1000
 582         /* Avoid overflow for large HZ */
 583         if ((ulong)CONFIG_SYS_HZ > 100000)
 584                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 585         else
 586                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 587 #endif
 588
 589         /* Wait for command completion */
 590 #ifdef CONFIG_SYS_LOW_RES_TIMER
 591         reset_timer();
 592 #endif
 593         start = get_timer(0);
 594         WATCHDOG_RESET();
 595         while (flash_is_busy(info, sector)) {
 596                 if (get_timer(start) > tout) {
 597                         printf("Flash %s timeout at address %lx data %lx\n",
 598                                prompt, info->start[sector],
 599                                flash_read_long(info, sector, 0));
 600                         flash_write_cmd(info, sector, 0, info->cmd_reset);
 601                         udelay(1);
 602                         return ERR_TIMEOUT;
 603                 }
 604                 udelay(1);              /* also triggers watchdog */
 605         }
 606         return ERR_OK;
 607 }
 608
 609 /*-----------------------------------------------------------------------
 610  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 611  * do a full status check.
 612  *
 613  * This routine sets the flash to read-array mode.
 614  */
 615 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 616                                    ulong tout, char *prompt)
 617 {
 618         int retcode;
 619
 620         retcode = flash_status_check(info, sector, tout, prompt);
 621         switch (info->vendor) {
 622         case CFI_CMDSET_INTEL_PROG_REGIONS:
 623         case CFI_CMDSET_INTEL_EXTENDED:
 624         case CFI_CMDSET_INTEL_STANDARD:
 625                 if (retcode == ERR_OK &&
 626                     !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 627                         retcode = ERR_INVAL;
 628                         printf("Flash %s error at address %lx\n", prompt,
 629                                info->start[sector]);
 630                         if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 631                                          FLASH_STATUS_PSLBS)) {
 632                                 puts("Command Sequence Error.\n");
 633                         } else if (flash_isset(info, sector, 0,
 634                                                 FLASH_STATUS_ECLBS)) {
 635                                 puts("Block Erase Error.\n");
 636                                 retcode = ERR_NOT_ERASED;
 637                         } else if (flash_isset(info, sector, 0,
 638                                                 FLASH_STATUS_PSLBS)) {
 639                                 puts("Locking Error\n");
 640                         }
 641                         if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 642                                 puts("Block locked.\n");
 643                                 retcode = ERR_PROTECTED;
 644                         }
 645                         if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 646                                 puts("Vpp Low Error.\n");
 647                 }
 648                 flash_write_cmd(info, sector, 0, info->cmd_reset);
 649                 udelay(1);
 650                 break;
 651         default:
 652                 break;
 653         }
 654         return retcode;
 655 }
 656
 657 static int use_flash_status_poll(flash_info_t *info)
 658 {
 659 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 660         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 661             info->vendor == CFI_CMDSET_AMD_STANDARD)
 662                 return 1;
 663 #endif
 664         return 0;
 665 }
 666
 667 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 668                              ulong tout, char *prompt)
 669 {
 670 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 671         ulong start;
 672         int ready;
 673
 674 #if CONFIG_SYS_HZ != 1000
 675         /* Avoid overflow for large HZ */
 676         if ((ulong)CONFIG_SYS_HZ > 100000)
 677                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 678         else
 679                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 680 #endif
 681
 682         /* Wait for command completion */
 683 #ifdef CONFIG_SYS_LOW_RES_TIMER
 684         reset_timer();
 685 #endif
 686         start = get_timer(0);
 687         WATCHDOG_RESET();
 688         while (1) {
 689                 switch (info->portwidth) {
 690                 case FLASH_CFI_8BIT:
 691                         ready = flash_read8(dst) == flash_read8(src);
 692                         break;
 693                 case FLASH_CFI_16BIT:
 694                         ready = flash_read16(dst) == flash_read16(src);
 695                         break;
 696                 case FLASH_CFI_32BIT:
 697                         ready = flash_read32(dst) == flash_read32(src);
 698                         break;
 699                 case FLASH_CFI_64BIT:
 700                         ready = flash_read64(dst) == flash_read64(src);
 701                         break;
 702                 default:
 703                         ready = 0;
 704                         break;
 705                 }
 706                 if (ready)
 707                         break;
 708                 if (get_timer(start) > tout) {
 709                         printf("Flash %s timeout at address %lx data %lx\n",
 710                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 711                         return ERR_TIMEOUT;
 712                 }
 713                 udelay(1);              /* also triggers watchdog */
 714         }
 715 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 716         return ERR_OK;
 717 }
 718
 719 /*-----------------------------------------------------------------------
 720  */
 721 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 722 {
 723 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 724         unsigned short  w;
 725         unsigned int    l;
 726         unsigned long long ll;
 727 #endif
 728
 729         switch (info->portwidth) {
 730         case FLASH_CFI_8BIT:
 731                 cword->w8 = c;
 732                 break;
 733         case FLASH_CFI_16BIT:
 734 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 735                 w = c;
 736                 w <<= 8;
 737                 cword->w16 = (cword->w16 >> 8) | w;
 738 #else
 739                 cword->w16 = (cword->w16 << 8) | c;
 740 #endif
 741                 break;
 742         case FLASH_CFI_32BIT:
 743 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 744                 l = c;
 745                 l <<= 24;
 746                 cword->w32 = (cword->w32 >> 8) | l;
 747 #else
 748                 cword->w32 = (cword->w32 << 8) | c;
 749 #endif
 750                 break;
 751         case FLASH_CFI_64BIT:
 752 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 753                 ll = c;
 754                 ll <<= 56;
 755                 cword->w64 = (cword->w64 >> 8) | ll;
 756 #else
 757                 cword->w64 = (cword->w64 << 8) | c;
 758 #endif
 759                 break;
 760         }
 761 }
 762
 763 /*
 764  * Loop through the sector table starting from the previously found sector.
 765  * Searches forwards or backwards, dependent on the passed address.
 766  */
 767 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 768 {
 769         static flash_sect_t saved_sector; /* previously found sector */
 770         static flash_info_t *saved_info; /* previously used flash bank */
 771         flash_sect_t sector = saved_sector;
 772
 773         if (info != saved_info || sector >= info->sector_count)
 774                 sector = 0;
 775
 776         while ((sector < info->sector_count - 1) &&
 777                (info->start[sector] < addr))
 778                 sector++;
 779         while ((info->start[sector] > addr) && (sector > 0))
 780                 /*
 781                  * also decrements the sector in case of an overshot
 782                  * in the first loop
 783                  */
 784                 sector--;
 785
 786         saved_sector = sector;
 787         saved_info = info;
 788         return sector;
 789 }
 790
 791 /*-----------------------------------------------------------------------
 792  */
 793 static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 794 {
 795         void *dstaddr = (void *)dest;
 796         int flag;
 797         flash_sect_t sect = 0;
 798         char sect_found = 0;
 799
 800         /* Check if Flash is (sufficiently) erased */
 801         switch (info->portwidth) {
 802         case FLASH_CFI_8BIT:
 803                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 804                 break;
 805         case FLASH_CFI_16BIT:
 806                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 807                 break;
 808         case FLASH_CFI_32BIT:
 809                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 810                 break;
 811         case FLASH_CFI_64BIT:
 812                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 813                 break;
 814         default:
 815                 flag = 0;
 816                 break;
 817         }
 818         if (!flag)
 819                 return ERR_NOT_ERASED;
 820
 821         /* Disable interrupts which might cause a timeout here */
 822         flag = disable_interrupts();
 823
 824         switch (info->vendor) {
 825         case CFI_CMDSET_INTEL_PROG_REGIONS:
 826         case CFI_CMDSET_INTEL_EXTENDED:
 827         case CFI_CMDSET_INTEL_STANDARD:
 828                 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 829                 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 830                 break;
 831         case CFI_CMDSET_AMD_EXTENDED:
 832         case CFI_CMDSET_AMD_STANDARD:
 833                 sect = find_sector(info, dest);
 834                 flash_unlock_seq(info, sect);
 835                 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 836                 sect_found = 1;
 837                 break;
 838 #ifdef CONFIG_FLASH_CFI_LEGACY
 839         case CFI_CMDSET_AMD_LEGACY:
 840                 sect = find_sector(info, dest);
 841                 flash_unlock_seq(info, 0);
 842                 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 843                 sect_found = 1;
 844                 break;
 845 #endif
 846         }
 847
 848         switch (info->portwidth) {
 849         case FLASH_CFI_8BIT:
 850                 flash_write8(cword.w8, dstaddr);
 851                 break;
 852         case FLASH_CFI_16BIT:
 853                 flash_write16(cword.w16, dstaddr);
 854                 break;
 855         case FLASH_CFI_32BIT:
 856                 flash_write32(cword.w32, dstaddr);
 857                 break;
 858         case FLASH_CFI_64BIT:
 859                 flash_write64(cword.w64, dstaddr);
 860                 break;
 861         }
 862
 863         /* re-enable interrupts if necessary */
 864         if (flag)
 865                 enable_interrupts();
 866
 867         if (!sect_found)
 868                 sect = find_sector(info, dest);
 869
 870         if (use_flash_status_poll(info))
 871                 return flash_status_poll(info, &cword, dstaddr,
 872                                          info->write_tout, "write");
 873         else
 874                 return flash_full_status_check(info, sect,
 875                                                info->write_tout, "write");
 876 }
 877
 878 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 879
 880 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 881                                  int len)
 882 {
 883         flash_sect_t sector;
 884         int cnt;
 885         int retcode;
 886         u8 *src = cp;
 887         u8 *dst = (u8 *)dest;
 888         u8 *dst2 = dst;
 889         int flag = 1;
 890         uint offset = 0;
 891         unsigned int shift;
 892         uchar write_cmd;
 893
 894         switch (info->portwidth) {
 895         case FLASH_CFI_8BIT:
 896                 shift = 0;
 897                 break;
 898         case FLASH_CFI_16BIT:
 899                 shift = 1;
 900                 break;
 901         case FLASH_CFI_32BIT:
 902                 shift = 2;
 903                 break;
 904         case FLASH_CFI_64BIT:
 905                 shift = 3;
 906                 break;
 907         default:
 908                 retcode = ERR_INVAL;
 909                 goto out_unmap;
 910         }
 911
 912         cnt = len >> shift;
 913
 914         while ((cnt-- > 0) && (flag == 1)) {
 915                 switch (info->portwidth) {
 916                 case FLASH_CFI_8BIT:
 917                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 918                                 flash_read8(src));
 919                         src += 1, dst2 += 1;
 920                         break;
 921                 case FLASH_CFI_16BIT:
 922                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 923                                 flash_read16(src));
 924                         src += 2, dst2 += 2;
 925                         break;
 926                 case FLASH_CFI_32BIT:
 927                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 928                                 flash_read32(src));
 929                         src += 4, dst2 += 4;
 930                         break;
 931                 case FLASH_CFI_64BIT:
 932                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 933                                 flash_read64(src));
 934                         src += 8, dst2 += 8;
 935                         break;
 936                 }
 937         }
 938         if (!flag) {
 939                 retcode = ERR_NOT_ERASED;
 940                 goto out_unmap;
 941         }
 942
 943         src = cp;
 944         sector = find_sector(info, dest);
 945
 946         switch (info->vendor) {
 947         case CFI_CMDSET_INTEL_PROG_REGIONS:
 948         case CFI_CMDSET_INTEL_STANDARD:
 949         case CFI_CMDSET_INTEL_EXTENDED:
 950                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 951                             FLASH_CMD_WRITE_BUFFER_PROG :
 952                             FLASH_CMD_WRITE_TO_BUFFER;
 953                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 954                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 955                 flash_write_cmd(info, sector, 0, write_cmd);
 956                 retcode = flash_status_check(info, sector,
 957                                              info->buffer_write_tout,
 958                                              "write to buffer");
 959                 if (retcode == ERR_OK) {
 960                         /* reduce the number of loops by the width of
 961                          * the port
 962                          */
 963                         cnt = len >> shift;
 964                         flash_write_cmd(info, sector, 0, cnt - 1);
 965                         while (cnt-- > 0) {
 966                                 switch (info->portwidth) {
 967                                 case FLASH_CFI_8BIT:
 968                                         flash_write8(flash_read8(src), dst);
 969                                         src += 1, dst += 1;
 970                                         break;
 971                                 case FLASH_CFI_16BIT:
 972                                         flash_write16(flash_read16(src), dst);
 973                                         src += 2, dst += 2;
 974                                         break;
 975                                 case FLASH_CFI_32BIT:
 976                                         flash_write32(flash_read32(src), dst);
 977                                         src += 4, dst += 4;
 978                                         break;
 979                                 case FLASH_CFI_64BIT:
 980                                         flash_write64(flash_read64(src), dst);
 981                                         src += 8, dst += 8;
 982                                         break;
 983                                 default:
 984                                         retcode = ERR_INVAL;
 985                                         goto out_unmap;
 986                                 }
 987                         }
 988                         flash_write_cmd(info, sector, 0,
 989                                         FLASH_CMD_WRITE_BUFFER_CONFIRM);
 990                         retcode = flash_full_status_check(
 991                                 info, sector, info->buffer_write_tout,
 992                                 "buffer write");
 993                 }
 994
 995                 break;
 996
 997         case CFI_CMDSET_AMD_STANDARD:
 998         case CFI_CMDSET_AMD_EXTENDED:
 999                 flash_unlock_seq(info, sector);
1000
1001 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
1002                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1003 #endif
1004                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1005                 cnt = len >> shift;
1006                 flash_write_cmd(info, sector, offset, cnt - 1);
1007
1008                 switch (info->portwidth) {
1009                 case FLASH_CFI_8BIT:
1010                         while (cnt-- > 0) {
1011                                 flash_write8(flash_read8(src), dst);
1012                                 src += 1, dst += 1;
1013                         }
1014                         break;
1015                 case FLASH_CFI_16BIT:
1016                         while (cnt-- > 0) {
1017                                 flash_write16(flash_read16(src), dst);
1018                                 src += 2, dst += 2;
1019                         }
1020                         break;
1021                 case FLASH_CFI_32BIT:
1022                         while (cnt-- > 0) {
1023                                 flash_write32(flash_read32(src), dst);
1024                                 src += 4, dst += 4;
1025                         }
1026                         break;
1027                 case FLASH_CFI_64BIT:
1028                         while (cnt-- > 0) {
1029                                 flash_write64(flash_read64(src), dst);
1030                                 src += 8, dst += 8;
1031                         }
1032                         break;
1033                 default:
1034                         retcode = ERR_INVAL;
1035                         goto out_unmap;
1036                 }
1037
1038                 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1039                 if (use_flash_status_poll(info))
1040                         retcode = flash_status_poll(info, src - (1 << shift),
1041                                                     dst - (1 << shift),
1042                                                     info->buffer_write_tout,
1043                                                     "buffer write");
1044                 else
1045                         retcode = flash_full_status_check(info, sector,
1046                                                           info->buffer_write_tout,
1047                                                           "buffer write");
1048                 break;
1049
1050         default:
1051                 debug("Unknown Command Set\n");
1052                 retcode = ERR_INVAL;
1053                 break;
1054         }
1055
1056 out_unmap:
1057         return retcode;
1058 }
1059 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1060
1061 /*-----------------------------------------------------------------------
1062  */
1063 int flash_erase(flash_info_t *info, int s_first, int s_last)
1064 {
1065         int rcode = 0;
1066         int prot;
1067         flash_sect_t sect;
1068         int st;
1069
1070         if (info->flash_id != FLASH_MAN_CFI) {
1071                 puts("Can't erase unknown flash type - aborted\n");
1072                 return 1;
1073         }
1074         if (s_first < 0 || s_first > s_last) {
1075                 puts("- no sectors to erase\n");
1076                 return 1;
1077         }
1078
1079         prot = 0;
1080         for (sect = s_first; sect <= s_last; ++sect)
1081                 if (info->protect[sect])
1082                         prot++;
1083         if (prot) {
1084                 printf("- Warning: %d protected sectors will not be erased!\n",
1085                        prot);
1086         } else if (flash_verbose) {
1087                 putc('\n');
1088         }
1089
1090         for (sect = s_first; sect <= s_last; sect++) {
1091                 if (ctrlc()) {
1092                         printf("\n");
1093                         return 1;
1094                 }
1095
1096                 if (info->protect[sect] == 0) { /* not protected */
1097 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1098                         int k;
1099                         int size;
1100                         int erased;
1101                         u32 *flash;
1102
1103                         /*
1104                          * Check if whole sector is erased
1105                          */
1106                         size = flash_sector_size(info, sect);
1107                         erased = 1;
1108                         flash = (u32 *)info->start[sect];
1109                         /* divide by 4 for longword access */
1110                         size = size >> 2;
1111                         for (k = 0; k < size; k++) {
1112                                 if (flash_read32(flash++) != 0xffffffff) {
1113                                         erased = 0;
1114                                         break;
1115                                 }
1116                         }
1117                         if (erased) {
1118                                 if (flash_verbose)
1119                                         putc(',');
1120                                 continue;
1121                         }
1122 #endif
1123                         switch (info->vendor) {
1124                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1125                         case CFI_CMDSET_INTEL_STANDARD:
1126                         case CFI_CMDSET_INTEL_EXTENDED:
1127                                 flash_write_cmd(info, sect, 0,
1128                                                 FLASH_CMD_CLEAR_STATUS);
1129                                 flash_write_cmd(info, sect, 0,
1130                                                 FLASH_CMD_BLOCK_ERASE);
1131                                 flash_write_cmd(info, sect, 0,
1132                                                 FLASH_CMD_ERASE_CONFIRM);
1133                                 break;
1134                         case CFI_CMDSET_AMD_STANDARD:
1135                         case CFI_CMDSET_AMD_EXTENDED:
1136                                 flash_unlock_seq(info, sect);
1137                                 flash_write_cmd(info, sect,
1138                                                 info->addr_unlock1,
1139                                                 AMD_CMD_ERASE_START);
1140                                 flash_unlock_seq(info, sect);
1141                                 flash_write_cmd(info, sect, 0,
1142                                                 info->cmd_erase_sector);
1143                                 break;
1144 #ifdef CONFIG_FLASH_CFI_LEGACY
1145                         case CFI_CMDSET_AMD_LEGACY:
1146                                 flash_unlock_seq(info, 0);
1147                                 flash_write_cmd(info, 0, info->addr_unlock1,
1148                                                 AMD_CMD_ERASE_START);
1149                                 flash_unlock_seq(info, 0);
1150                                 flash_write_cmd(info, sect, 0,
1151                                                 AMD_CMD_ERASE_SECTOR);
1152                                 break;
1153 #endif
1154                         default:
1155                                 debug("Unknown flash vendor %d\n",
1156                                       info->vendor);
1157                                 break;
1158                         }
1159
1160                         if (use_flash_status_poll(info)) {
1161                                 cfiword_t cword;
1162                                 void *dest;
1163
1164                                 cword.w64 = 0xffffffffffffffffULL;
1165                                 dest = flash_map(info, sect, 0);
1166                                 st = flash_status_poll(info, &cword, dest,
1167                                                        info->erase_blk_tout,
1168                                                        "erase");
1169                                 flash_unmap(info, sect, 0, dest);
1170                         } else {
1171                                 st = flash_full_status_check(info, sect,
1172                                                              info->erase_blk_tout,
1173                                                              "erase");
1174                         }
1175
1176                         if (st)
1177                                 rcode = 1;
1178                         else if (flash_verbose)
1179                                 putc('.');
1180                 }
1181         }
1182
1183         if (flash_verbose)
1184                 puts(" done\n");
1185
1186         return rcode;
1187 }
1188
1189 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1190 static int sector_erased(flash_info_t *info, int i)
1191 {
1192         int k;
1193         int size;
1194         u32 *flash;
1195
1196         /*
1197          * Check if whole sector is erased
1198          */
1199         size = flash_sector_size(info, i);
1200         flash = (u32 *)info->start[i];
1201         /* divide by 4 for longword access */
1202         size = size >> 2;
1203
1204         for (k = 0; k < size; k++) {
1205                 if (flash_read32(flash++) != 0xffffffff)
1206                         return 0;       /* not erased */
1207         }
1208
1209         return 1;                       /* erased */
1210 }
1211 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1212
1213 void flash_print_info(flash_info_t *info)
1214 {
1215         int i;
1216
1217         if (info->flash_id != FLASH_MAN_CFI) {
1218                 puts("missing or unknown FLASH type\n");
1219                 return;
1220         }
1221
1222         printf("%s flash (%d x %d)",
1223                info->name,
1224                (info->portwidth << 3), (info->chipwidth << 3));
1225         if (info->size < 1024 * 1024)
1226                 printf("  Size: %ld kB in %d Sectors\n",
1227                        info->size >> 10, info->sector_count);
1228         else
1229                 printf("  Size: %ld MB in %d Sectors\n",
1230                        info->size >> 20, info->sector_count);
1231         printf("  ");
1232         switch (info->vendor) {
1233         case CFI_CMDSET_INTEL_PROG_REGIONS:
1234                 printf("Intel Prog Regions");
1235                 break;
1236         case CFI_CMDSET_INTEL_STANDARD:
1237                 printf("Intel Standard");
1238                 break;
1239         case CFI_CMDSET_INTEL_EXTENDED:
1240                 printf("Intel Extended");
1241                 break;
1242         case CFI_CMDSET_AMD_STANDARD:
1243                 printf("AMD Standard");
1244                 break;
1245         case CFI_CMDSET_AMD_EXTENDED:
1246                 printf("AMD Extended");
1247                 break;
1248 #ifdef CONFIG_FLASH_CFI_LEGACY
1249         case CFI_CMDSET_AMD_LEGACY:
1250                 printf("AMD Legacy");
1251                 break;
1252 #endif
1253         default:
1254                 printf("Unknown (%d)", info->vendor);
1255                 break;
1256         }
1257         printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1258                info->manufacturer_id);
1259         printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1260                info->device_id);
1261         if ((info->device_id & 0xff) == 0x7E) {
1262                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1263                        info->device_id2);
1264         }
1265         if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1266                 printf("\n  Advanced Sector Protection (PPB) enabled");
1267         printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1268                info->erase_blk_tout, info->write_tout);
1269         if (info->buffer_size > 1) {
1270                 printf("  Buffer write timeout: %ld ms, ",
1271                        info->buffer_write_tout);
1272                 printf("buffer size: %d bytes\n", info->buffer_size);
1273         }
1274
1275         puts("\n  Sector Start Addresses:");
1276         for (i = 0; i < info->sector_count; ++i) {
1277                 if (ctrlc())
1278                         break;
1279                 if ((i % 5) == 0)
1280                         putc('\n');
1281 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1282                 /* print empty and read-only info */
1283                 printf("  %08lX %c %s ",
1284                        info->start[i],
1285                        sector_erased(info, i) ? 'E' : ' ',
1286                        info->protect[i] ? "RO" : "  ");
1287 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1288                 printf("  %08lX   %s ",
1289                        info->start[i],
1290                        info->protect[i] ? "RO" : "  ");
1291 #endif
1292         }
1293         putc('\n');
1294 }
1295
1296 /*-----------------------------------------------------------------------
1297  * This is used in a few places in write_buf() to show programming
1298  * progress.  Making it a function is nasty because it needs to do side
1299  * effect updates to digit and dots.  Repeated code is nasty too, so
1300  * we define it once here.
1301  */
1302 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1303 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1304         if (flash_verbose) { \
1305                 dots -= dots_sub; \
1306                 if (scale > 0 && dots <= 0) { \
1307                         if ((digit % 5) == 0) \
1308                                 printf("%d", digit / 5); \
1309                         else \
1310                                 putc('.'); \
1311                         digit--; \
1312                         dots += scale; \
1313                 } \
1314         }
1315 #else
1316 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1317 #endif
1318
1319 /*-----------------------------------------------------------------------
1320  * Copy memory to flash, returns:
1321  * 0 - OK
1322  * 1 - write timeout
1323  * 2 - Flash not erased
1324  */
1325 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1326 {
1327         ulong wp;
1328         uchar *p;
1329         int aln;
1330         cfiword_t cword;
1331         int i, rc;
1332 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1333         int buffered_size;
1334 #endif
1335 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1336         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1337         int scale = 0;
1338         int dots  = 0;
1339
1340         /*
1341          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1342          */
1343         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1344                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1345                         CONFIG_FLASH_SHOW_PROGRESS);
1346         }
1347 #endif
1348
1349         /* get lower aligned address */
1350         wp = (addr & ~(info->portwidth - 1));
1351
1352         /* handle unaligned start */
1353         aln = addr - wp;
1354         if (aln != 0) {
1355                 cword.w32 = 0;
1356                 p = (uchar *)wp;
1357                 for (i = 0; i < aln; ++i)
1358                         flash_add_byte(info, &cword, flash_read8(p + i));
1359
1360                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1361                         flash_add_byte(info, &cword, *src++);
1362                         cnt--;
1363                 }
1364                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1365                         flash_add_byte(info, &cword, flash_read8(p + i));
1366
1367                 rc = flash_write_cfiword(info, wp, cword);
1368                 if (rc != 0)
1369                         return rc;
1370
1371                 wp += i;
1372                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1373         }
1374
1375         /* handle the aligned part */
1376 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1377         buffered_size = (info->portwidth / info->chipwidth);
1378         buffered_size *= info->buffer_size;
1379         while (cnt >= info->portwidth) {
1380                 /* prohibit buffer write when buffer_size is 1 */
1381                 if (info->buffer_size == 1) {
1382                         cword.w32 = 0;
1383                         for (i = 0; i < info->portwidth; i++)
1384                                 flash_add_byte(info, &cword, *src++);
1385                         rc = flash_write_cfiword(info, wp, cword);
1386                         if (rc != 0)
1387                                 return rc;
1388                         wp += info->portwidth;
1389                         cnt -= info->portwidth;
1390                         continue;
1391                 }
1392
1393                 /* write buffer until next buffered_size aligned boundary */
1394                 i = buffered_size - (wp % buffered_size);
1395                 if (i > cnt)
1396                         i = cnt;
1397                 rc = flash_write_cfibuffer(info, wp, src, i);
1398                 if (rc != ERR_OK)
1399                         return rc;
1400                 i -= i & (info->portwidth - 1);
1401                 wp += i;
1402                 src += i;
1403                 cnt -= i;
1404                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1405                 /* Only check every once in a while */
1406                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1407                         return ERR_ABORTED;
1408         }
1409 #else
1410         while (cnt >= info->portwidth) {
1411                 cword.w32 = 0;
1412                 for (i = 0; i < info->portwidth; i++)
1413                         flash_add_byte(info, &cword, *src++);
1414                 rc = flash_write_cfiword(info, wp, cword);
1415                 if (rc != 0)
1416                         return rc;
1417                 wp += info->portwidth;
1418                 cnt -= info->portwidth;
1419                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1420                 /* Only check every once in a while */
1421                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1422                         return ERR_ABORTED;
1423         }
1424 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1425
1426         if (cnt == 0)
1427                 return (0);
1428
1429         /*
1430          * handle unaligned tail bytes
1431          */
1432         cword.w32 = 0;
1433         p = (uchar *)wp;
1434         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1435                 flash_add_byte(info, &cword, *src++);
1436                 --cnt;
1437         }
1438         for (; i < info->portwidth; ++i)
1439                 flash_add_byte(info, &cword, flash_read8(p + i));
1440
1441         return flash_write_cfiword(info, wp, cword);
1442 }
1443
1444 static inline int manufact_match(flash_info_t *info, u32 manu)
1445 {
1446         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1447 }
1448
1449 /*-----------------------------------------------------------------------
1450  */
1451 #ifdef CONFIG_SYS_FLASH_PROTECTION
1452
1453 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1454 {
1455         if (manufact_match(info, INTEL_MANUFACT) &&
1456             info->device_id == NUMONYX_256MBIT) {
1457                 /*
1458                  * see errata called
1459                  * "Numonyx Axcell P33/P30 Specification Update" :)
1460                  */
1461                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1462                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1463                                    prot)) {
1464                         /*
1465                          * cmd must come before FLASH_CMD_PROTECT + 20us
1466                          * Disable interrupts which might cause a timeout here.
1467                          */
1468                         int flag = disable_interrupts();
1469                         unsigned short cmd;
1470
1471                         if (prot)
1472                                 cmd = FLASH_CMD_PROTECT_SET;
1473                         else
1474                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1475
1476                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1477                         flash_write_cmd(info, sector, 0, cmd);
1478                         /* re-enable interrupts if necessary */
1479                         if (flag)
1480                                 enable_interrupts();
1481                 }
1482                 return 1;
1483         }
1484         return 0;
1485 }
1486
1487 int flash_real_protect(flash_info_t *info, long sector, int prot)
1488 {
1489         int retcode = 0;
1490
1491         switch (info->vendor) {
1492         case CFI_CMDSET_INTEL_PROG_REGIONS:
1493         case CFI_CMDSET_INTEL_STANDARD:
1494         case CFI_CMDSET_INTEL_EXTENDED:
1495                 if (!cfi_protect_bugfix(info, sector, prot)) {
1496                         flash_write_cmd(info, sector, 0,
1497                                         FLASH_CMD_CLEAR_STATUS);
1498                         flash_write_cmd(info, sector, 0,
1499                                         FLASH_CMD_PROTECT);
1500                         if (prot)
1501                                 flash_write_cmd(info, sector, 0,
1502                                                 FLASH_CMD_PROTECT_SET);
1503                         else
1504                                 flash_write_cmd(info, sector, 0,
1505                                                 FLASH_CMD_PROTECT_CLEAR);
1506                 }
1507                 break;
1508         case CFI_CMDSET_AMD_EXTENDED:
1509         case CFI_CMDSET_AMD_STANDARD:
1510                 /* U-Boot only checks the first byte */
1511                 if (manufact_match(info, ATM_MANUFACT)) {
1512                         if (prot) {
1513                                 flash_unlock_seq(info, 0);
1514                                 flash_write_cmd(info, 0,
1515                                                 info->addr_unlock1,
1516                                                 ATM_CMD_SOFTLOCK_START);
1517                                 flash_unlock_seq(info, 0);
1518                                 flash_write_cmd(info, sector, 0,
1519                                                 ATM_CMD_LOCK_SECT);
1520                         } else {
1521                                 flash_write_cmd(info, 0,
1522                                                 info->addr_unlock1,
1523                                                 AMD_CMD_UNLOCK_START);
1524                                 if (info->device_id == ATM_ID_BV6416)
1525                                         flash_write_cmd(info, sector,
1526                                                         0, ATM_CMD_UNLOCK_SECT);
1527                         }
1528                 }
1529                 if (info->legacy_unlock) {
1530                         int flag = disable_interrupts();
1531                         int lock_flag;
1532
1533                         flash_unlock_seq(info, 0);
1534                         flash_write_cmd(info, 0, info->addr_unlock1,
1535                                         AMD_CMD_SET_PPB_ENTRY);
1536                         lock_flag = flash_isset(info, sector, 0, 0x01);
1537                         if (prot) {
1538                                 if (lock_flag) {
1539                                         flash_write_cmd(info, sector, 0,
1540                                                         AMD_CMD_PPB_LOCK_BC1);
1541                                         flash_write_cmd(info, sector, 0,
1542                                                         AMD_CMD_PPB_LOCK_BC2);
1543                                 }
1544                                 debug("sector %ld %slocked\n", sector,
1545                                       lock_flag ? "" : "already ");
1546                         } else {
1547                                 if (!lock_flag) {
1548                                         debug("unlock %ld\n", sector);
1549                                         flash_write_cmd(info, 0, 0,
1550                                                         AMD_CMD_PPB_UNLOCK_BC1);
1551                                         flash_write_cmd(info, 0, 0,
1552                                                         AMD_CMD_PPB_UNLOCK_BC2);
1553                                 }
1554                                 debug("sector %ld %sunlocked\n", sector,
1555                                       !lock_flag ? "" : "already ");
1556                         }
1557                         if (flag)
1558                                 enable_interrupts();
1559
1560                         if (flash_status_check(info, sector,
1561                                                info->erase_blk_tout,
1562                                                prot ? "protect" : "unprotect"))
1563                                 printf("status check error\n");
1564
1565                         flash_write_cmd(info, 0, 0,
1566                                         AMD_CMD_SET_PPB_EXIT_BC1);
1567                         flash_write_cmd(info, 0, 0,
1568                                         AMD_CMD_SET_PPB_EXIT_BC2);
1569                 }
1570                 break;
1571 #ifdef CONFIG_FLASH_CFI_LEGACY
1572         case CFI_CMDSET_AMD_LEGACY:
1573                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1574                 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1575                 if (prot)
1576                         flash_write_cmd(info, sector, 0,
1577                                         FLASH_CMD_PROTECT_SET);
1578                 else
1579                         flash_write_cmd(info, sector, 0,
1580                                         FLASH_CMD_PROTECT_CLEAR);
1581 #endif
1582         };
1583
1584         /*
1585          * Flash needs to be in status register read mode for
1586          * flash_full_status_check() to work correctly
1587          */
1588         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1589         retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1590                                           prot ? "protect" : "unprotect");
1591         if (retcode == 0) {
1592                 info->protect[sector] = prot;
1593
1594                 /*
1595                  * On some of Intel's flash chips (marked via legacy_unlock)
1596                  * unprotect unprotects all locking.
1597                  */
1598                 if (prot == 0 && info->legacy_unlock) {
1599                         flash_sect_t i;
1600
1601                         for (i = 0; i < info->sector_count; i++) {
1602                                 if (info->protect[i])
1603                                         flash_real_protect(info, i, 1);
1604                         }
1605                 }
1606         }
1607         return retcode;
1608 }
1609
1610 /*-----------------------------------------------------------------------
1611  * flash_read_user_serial - read the OneTimeProgramming cells
1612  */
1613 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1614                             int len)
1615 {
1616         uchar *src;
1617         uchar *dst;
1618
1619         dst = buffer;
1620         src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1621         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1622         memcpy(dst, src + offset, len);
1623         flash_write_cmd(info, 0, 0, info->cmd_reset);
1624         udelay(1);
1625         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1626 }
1627
1628 /*
1629  * flash_read_factory_serial - read the device Id from the protection area
1630  */
1631 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1632                                int len)
1633 {
1634         uchar *src;
1635
1636         src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1637         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1638         memcpy(buffer, src + offset, len);
1639         flash_write_cmd(info, 0, 0, info->cmd_reset);
1640         udelay(1);
1641         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1642 }
1643
1644 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1645
1646 /*-----------------------------------------------------------------------
1647  * Reverse the order of the erase regions in the CFI QRY structure.
1648  * This is needed for chips that are either a) correctly detected as
1649  * top-boot, or b) buggy.
1650  */
1651 static void cfi_reverse_geometry(struct cfi_qry *qry)
1652 {
1653         unsigned int i, j;
1654         u32 tmp;
1655
1656         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1657                 tmp = get_unaligned(&qry->erase_region_info[i]);
1658                 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1659                               &qry->erase_region_info[i]);
1660                 put_unaligned(tmp, &qry->erase_region_info[j]);
1661         }
1662 }
1663
1664 /*-----------------------------------------------------------------------
1665  * read jedec ids from device and set corresponding fields in info struct
1666  *
1667  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1668  *
1669  */
1670 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1671 {
1672         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1673         udelay(1);
1674         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1675         udelay(1000); /* some flash are slow to respond */
1676         info->manufacturer_id = flash_read_uchar(info,
1677                                                  FLASH_OFFSET_MANUFACTURER_ID);
1678         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1679                         flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1680                         flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1681         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1682 }
1683
1684 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1685 {
1686         info->cmd_reset = FLASH_CMD_RESET;
1687
1688         cmdset_intel_read_jedec_ids(info);
1689         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1690
1691 #ifdef CONFIG_SYS_FLASH_PROTECTION
1692         /* read legacy lock/unlock bit from intel flash */
1693         if (info->ext_addr) {
1694                 info->legacy_unlock =
1695                         flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1696         }
1697 #endif
1698
1699         return 0;
1700 }
1701
1702 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1703 {
1704         ushort bank_id = 0;
1705         uchar  manu_id;
1706         uchar  feature;
1707
1708         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1709         flash_unlock_seq(info, 0);
1710         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1711         udelay(1000); /* some flash are slow to respond */
1712
1713         manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1714         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1715         while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1716                 bank_id += 0x100;
1717                 manu_id = flash_read_uchar(info,
1718                                            bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1719         }
1720         info->manufacturer_id = manu_id;
1721
1722         debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1723               info->ext_addr, info->cfi_version);
1724         if (info->ext_addr && info->cfi_version >= 0x3134) {
1725                 /* read software feature (at 0x53) */
1726                 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1727                 debug("feature = 0x%x\n", feature);
1728                 info->sr_supported = feature & 0x1;
1729         }
1730
1731         switch (info->chipwidth) {
1732         case FLASH_CFI_8BIT:
1733                 info->device_id = flash_read_uchar(info,
1734                                                    FLASH_OFFSET_DEVICE_ID);
1735                 if (info->device_id == 0x7E) {
1736                         /* AMD 3-byte (expanded) device ids */
1737                         info->device_id2 = flash_read_uchar(info,
1738                                                             FLASH_OFFSET_DEVICE_ID2);
1739                         info->device_id2 <<= 8;
1740                         info->device_id2 |= flash_read_uchar(info,
1741                                                 FLASH_OFFSET_DEVICE_ID3);
1742                 }
1743                 break;
1744         case FLASH_CFI_16BIT:
1745                 info->device_id = flash_read_word(info,
1746                                                   FLASH_OFFSET_DEVICE_ID);
1747                 if ((info->device_id & 0xff) == 0x7E) {
1748                         /* AMD 3-byte (expanded) device ids */
1749                         info->device_id2 = flash_read_uchar(info,
1750                                                             FLASH_OFFSET_DEVICE_ID2);
1751                         info->device_id2 <<= 8;
1752                         info->device_id2 |= flash_read_uchar(info,
1753                                                 FLASH_OFFSET_DEVICE_ID3);
1754                 }
1755                 break;
1756         default:
1757                 break;
1758         }
1759         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1760         udelay(1);
1761 }
1762
1763 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1764 {
1765         info->cmd_reset = AMD_CMD_RESET;
1766         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1767
1768         cmdset_amd_read_jedec_ids(info);
1769         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1770
1771 #ifdef CONFIG_SYS_FLASH_PROTECTION
1772         if (info->ext_addr) {
1773                 /* read sector protect/unprotect scheme (at 0x49) */
1774                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1775                         info->legacy_unlock = 1;
1776         }
1777 #endif
1778
1779         return 0;
1780 }
1781
1782 #ifdef CONFIG_FLASH_CFI_LEGACY
1783 static void flash_read_jedec_ids(flash_info_t *info)
1784 {
1785         info->manufacturer_id = 0;
1786         info->device_id       = 0;
1787         info->device_id2      = 0;
1788
1789         switch (info->vendor) {
1790         case CFI_CMDSET_INTEL_PROG_REGIONS:
1791         case CFI_CMDSET_INTEL_STANDARD:
1792         case CFI_CMDSET_INTEL_EXTENDED:
1793                 cmdset_intel_read_jedec_ids(info);
1794                 break;
1795         case CFI_CMDSET_AMD_STANDARD:
1796         case CFI_CMDSET_AMD_EXTENDED:
1797                 cmdset_amd_read_jedec_ids(info);
1798                 break;
1799         default:
1800                 break;
1801         }
1802 }
1803
1804 /*-----------------------------------------------------------------------
1805  * Call board code to request info about non-CFI flash.
1806  * board_flash_get_legacy needs to fill in at least:
1807  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1808  */
1809 static int flash_detect_legacy(phys_addr_t base, int banknum)
1810 {
1811         flash_info_t *info = &flash_info[banknum];
1812
1813         if (board_flash_get_legacy(base, banknum, info)) {
1814                 /* board code may have filled info completely. If not, we
1815                  * use JEDEC ID probing.
1816                  */
1817                 if (!info->vendor) {
1818                         int modes[] = {
1819                                 CFI_CMDSET_AMD_STANDARD,
1820                                 CFI_CMDSET_INTEL_STANDARD
1821                         };
1822                         int i;
1823
1824                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1825                                 info->vendor = modes[i];
1826                                 info->start[0] =
1827                                         (ulong)map_physmem(base,
1828                                                            info->portwidth,
1829                                                            MAP_NOCACHE);
1830                                 if (info->portwidth == FLASH_CFI_8BIT &&
1831                                     info->interface == FLASH_CFI_X8X16) {
1832                                         info->addr_unlock1 = 0x2AAA;
1833                                         info->addr_unlock2 = 0x5555;
1834                                 } else {
1835                                         info->addr_unlock1 = 0x5555;
1836                                         info->addr_unlock2 = 0x2AAA;
1837                                 }
1838                                 flash_read_jedec_ids(info);
1839                                 debug("JEDEC PROBE: ID %x %x %x\n",
1840                                       info->manufacturer_id,
1841                                       info->device_id,
1842                                       info->device_id2);
1843                                 if (jedec_flash_match(info, info->start[0]))
1844                                         break;
1845
1846                                 unmap_physmem((void *)info->start[0],
1847                                               info->portwidth);
1848                         }
1849                 }
1850
1851                 switch (info->vendor) {
1852                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1853                 case CFI_CMDSET_INTEL_STANDARD:
1854                 case CFI_CMDSET_INTEL_EXTENDED:
1855                         info->cmd_reset = FLASH_CMD_RESET;
1856                         break;
1857                 case CFI_CMDSET_AMD_STANDARD:
1858                 case CFI_CMDSET_AMD_EXTENDED:
1859                 case CFI_CMDSET_AMD_LEGACY:
1860                         info->cmd_reset = AMD_CMD_RESET;
1861                         break;
1862                 }
1863                 info->flash_id = FLASH_MAN_CFI;
1864                 return 1;
1865         }
1866         return 0; /* use CFI */
1867 }
1868 #else
1869 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1870 {
1871         return 0; /* use CFI */
1872 }
1873 #endif
1874
1875 /*-----------------------------------------------------------------------
1876  * detect if flash is compatible with the Common Flash Interface (CFI)
1877  * http://www.jedec.org/download/search/jesd68.pdf
1878  */
1879 static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1880                            size_t len)
1881 {
1882         u8 *p = buf;
1883         unsigned int i;
1884
1885         for (i = 0; i < len; i++)
1886                 p[i] = flash_read_uchar(info, start + i);
1887 }
1888
1889 static void __flash_cmd_reset(flash_info_t *info)
1890 {
1891         /*
1892          * We do not yet know what kind of commandset to use, so we issue
1893          * the reset command in both Intel and AMD variants, in the hope
1894          * that AMD flash roms ignore the Intel command.
1895          */
1896         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1897         udelay(1);
1898         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1899 }
1900
1901 void flash_cmd_reset(flash_info_t *info)
1902         __attribute__((weak, alias("__flash_cmd_reset")));
1903
1904 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1905 {
1906         int cfi_offset;
1907
1908         /* Issue FLASH reset command */
1909         flash_cmd_reset(info);
1910
1911         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1912              cfi_offset++) {
1913                 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1914                                 FLASH_CMD_CFI);
1915                 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1916                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1917                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1918                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1919                                        sizeof(struct cfi_qry));
1920                         info->interface = le16_to_cpu(qry->interface_desc);
1921                         /* Some flash chips can support multiple bus widths.
1922                          * In this case, override the interface width and
1923                          * limit it to the port width.
1924                          */
1925                         if ((info->interface == FLASH_CFI_X8X16) &&
1926                                         (info->portwidth == FLASH_CFI_8BIT)) {
1927                                 debug("Overriding 16-bit interface width to"
1928                                                 " 8-bit port width\n");
1929                                 info->interface = FLASH_CFI_X8;
1930                         } else if ((info->interface == FLASH_CFI_X16X32) &&
1931                                         (info->portwidth == FLASH_CFI_16BIT)) {
1932                                 debug("Overriding 16-bit interface width to"
1933                                                 " 16-bit port width\n");
1934                                 info->interface = FLASH_CFI_X16;
1935                         }
1936
1937                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1938                         debug("device interface is %d\n",
1939                               info->interface);
1940                         debug("found port %d chip %d chip_lsb %d ",
1941                               info->portwidth, info->chipwidth, info->chip_lsb);
1942                         debug("port %d bits chip %d bits\n",
1943                               info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1944                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1945
1946                         /* calculate command offsets as in the Linux driver */
1947                         info->addr_unlock1 = 0x555;
1948                         info->addr_unlock2 = 0x2aa;
1949
1950                         /*
1951                          * modify the unlock address if we are
1952                          * in compatibility mode
1953                          */
1954                         if (/* x8/x16 in x8 mode */
1955                             (info->chipwidth == FLASH_CFI_BY8 &&
1956                                 info->interface == FLASH_CFI_X8X16) ||
1957                             /* x16/x32 in x16 mode */
1958                             (info->chipwidth == FLASH_CFI_BY16 &&
1959                                 info->interface == FLASH_CFI_X16X32)) {
1960                                 info->addr_unlock1 = 0xaaa;
1961                                 info->addr_unlock2 = 0x555;
1962                         }
1963
1964                         info->name = "CFI conformant";
1965                         return 1;
1966                 }
1967         }
1968
1969         return 0;
1970 }
1971
1972 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1973 {
1974         debug("flash detect cfi\n");
1975
1976         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1977              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1978                 for (info->chipwidth = FLASH_CFI_BY8;
1979                      info->chipwidth <= info->portwidth;
1980                      info->chipwidth <<= 1) {
1981                         /*
1982                          * First, try detection without shifting the addresses
1983                          * for 8bit devices (16bit wide connection)
1984                          */
1985                         info->chip_lsb = 0;
1986                         if (__flash_detect_cfi(info, qry))
1987                                 return 1;
1988
1989                         /*
1990                          * Not detected, so let's try with shifting
1991                          * for 8bit devices
1992                          */
1993                         info->chip_lsb = 1;
1994                         if (__flash_detect_cfi(info, qry))
1995                                 return 1;
1996                 }
1997         }
1998         debug("not found\n");
1999         return 0;
2000 }
2001
2002 /*
2003  * Manufacturer-specific quirks. Add workarounds for geometry
2004  * reversal, etc. here.
2005  */
2006 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
2007 {
2008         /* check if flash geometry needs reversal */
2009         if (qry->num_erase_regions > 1) {
2010                 /* reverse geometry if top boot part */
2011                 if (info->cfi_version < 0x3131) {
2012                         /* CFI < 1.1, try to guess from device id */
2013                         if ((info->device_id & 0x80) != 0)
2014                                 cfi_reverse_geometry(qry);
2015                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2016                         /* CFI >= 1.1, deduct from top/bottom flag */
2017                         /* note: ext_addr is valid since cfi_version > 0 */
2018                         cfi_reverse_geometry(qry);
2019                 }
2020         }
2021 }
2022
2023 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
2024 {
2025         int reverse_geometry = 0;
2026
2027         /* Check the "top boot" bit in the PRI */
2028         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
2029                 reverse_geometry = 1;
2030
2031         /* AT49BV6416(T) list the erase regions in the wrong order.
2032          * However, the device ID is identical with the non-broken
2033          * AT49BV642D they differ in the high byte.
2034          */
2035         if (info->device_id == 0xd6 || info->device_id == 0xd2)
2036                 reverse_geometry = !reverse_geometry;
2037
2038         if (reverse_geometry)
2039                 cfi_reverse_geometry(qry);
2040 }
2041
2042 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2043 {
2044         /* check if flash geometry needs reversal */
2045         if (qry->num_erase_regions > 1) {
2046                 /* reverse geometry if top boot part */
2047                 if (info->cfi_version < 0x3131) {
2048                         /* CFI < 1.1, guess by device id */
2049                         if (info->device_id == 0x22CA || /* M29W320DT */
2050                             info->device_id == 0x2256 || /* M29W320ET */
2051                             info->device_id == 0x22D7) { /* M29W800DT */
2052                                 cfi_reverse_geometry(qry);
2053                         }
2054                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2055                         /* CFI >= 1.1, deduct from top/bottom flag */
2056                         /* note: ext_addr is valid since cfi_version > 0 */
2057                         cfi_reverse_geometry(qry);
2058                 }
2059         }
2060 }
2061
2062 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2063 {
2064         /*
2065          * SST, for many recent nor parallel flashes, says they are
2066          * CFI-conformant. This is not true, since qry struct.
2067          * reports a std. AMD command set (0x0002), while SST allows to
2068          * erase two different sector sizes for the same memory.
2069          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2070          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2071          * Since CFI query detect the 4KB number of sectors, users expects
2072          * a sector granularity of 4KB, and it is here set.
2073          */
2074         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2075             info->device_id == 0x5C23) { /* SST39VF3202B */
2076                 /* set sector granularity to 4KB */
2077                 info->cmd_erase_sector = 0x50;
2078         }
2079 }
2080
2081 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2082 {
2083         /*
2084          * The M29EW devices seem to report the CFI information wrong
2085          * when it's in 8 bit mode.
2086          * There's an app note from Numonyx on this issue.
2087          * So adjust the buffer size for M29EW while operating in 8-bit mode
2088          */
2089         if (qry->max_buf_write_size > 0x8 &&
2090             info->device_id == 0x7E &&
2091             (info->device_id2 == 0x2201 ||
2092              info->device_id2 == 0x2301 ||
2093              info->device_id2 == 0x2801 ||
2094              info->device_id2 == 0x4801)) {
2095                 debug("Adjusted buffer size on Numonyx flash");
2096                 debug(" M29EW family in 8 bit mode\n");
2097                 qry->max_buf_write_size = 0x8;
2098         }
2099 }
2100
2101 /*
2102  * The following code cannot be run from FLASH!
2103  *
2104  */
2105 ulong flash_get_size(phys_addr_t base, int banknum)
2106 {
2107         flash_info_t *info = &flash_info[banknum];
2108         int i, j;
2109         flash_sect_t sect_cnt;
2110         phys_addr_t sector;
2111         unsigned long tmp;
2112         int size_ratio;
2113         uchar num_erase_regions;
2114         int erase_region_size;
2115         int erase_region_count;
2116         struct cfi_qry qry;
2117         unsigned long max_size;
2118
2119         memset(&qry, 0, sizeof(qry));
2120
2121         info->ext_addr = 0;
2122         info->cfi_version = 0;
2123 #ifdef CONFIG_SYS_FLASH_PROTECTION
2124         info->legacy_unlock = 0;
2125 #endif
2126
2127         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2128
2129         if (flash_detect_cfi(info, &qry)) {
2130                 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2131                 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2132                 num_erase_regions = qry.num_erase_regions;
2133
2134                 if (info->ext_addr) {
2135                         info->cfi_version = (ushort)flash_read_uchar(info,
2136                                                 info->ext_addr + 3) << 8;
2137                         info->cfi_version |= (ushort)flash_read_uchar(info,
2138                                                 info->ext_addr + 4);
2139                 }
2140
2141 #ifdef DEBUG
2142                 flash_printqry(&qry);
2143 #endif
2144
2145                 switch (info->vendor) {
2146                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2147                 case CFI_CMDSET_INTEL_STANDARD:
2148                 case CFI_CMDSET_INTEL_EXTENDED:
2149                         cmdset_intel_init(info, &qry);
2150                         break;
2151                 case CFI_CMDSET_AMD_STANDARD:
2152                 case CFI_CMDSET_AMD_EXTENDED:
2153                         cmdset_amd_init(info, &qry);
2154                         break;
2155                 default:
2156                         printf("CFI: Unknown command set 0x%x\n",
2157                                info->vendor);
2158                         /*
2159                          * Unfortunately, this means we don't know how
2160                          * to get the chip back to Read mode. Might
2161                          * as well try an Intel-style reset...
2162                          */
2163                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2164                         return 0;
2165                 }
2166
2167                 /* Do manufacturer-specific fixups */
2168                 switch (info->manufacturer_id) {
2169                 case 0x0001: /* AMD */
2170                 case 0x0037: /* AMIC */
2171                         flash_fixup_amd(info, &qry);
2172                         break;
2173                 case 0x001f:
2174                         flash_fixup_atmel(info, &qry);
2175                         break;
2176                 case 0x0020:
2177                         flash_fixup_stm(info, &qry);
2178                         break;
2179                 case 0x00bf: /* SST */
2180                         flash_fixup_sst(info, &qry);
2181                         break;
2182                 case 0x0089: /* Numonyx */
2183                         flash_fixup_num(info, &qry);
2184                         break;
2185                 }
2186
2187                 debug("manufacturer is %d\n", info->vendor);
2188                 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2189                 debug("device id is 0x%x\n", info->device_id);
2190                 debug("device id2 is 0x%x\n", info->device_id2);
2191                 debug("cfi version is 0x%04x\n", info->cfi_version);
2192
2193                 size_ratio = info->portwidth / info->chipwidth;
2194                 /* if the chip is x8/x16 reduce the ratio by half */
2195                 if (info->interface == FLASH_CFI_X8X16 &&
2196                     info->chipwidth == FLASH_CFI_BY8) {
2197                         size_ratio >>= 1;
2198                 }
2199                 debug("size_ratio %d port %d bits chip %d bits\n",
2200                       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2201                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2202                 info->size = 1 << qry.dev_size;
2203                 /* multiply the size by the number of chips */
2204                 info->size *= size_ratio;
2205                 max_size = cfi_flash_bank_size(banknum);
2206                 if (max_size && info->size > max_size) {
2207                         debug("[truncated from %ldMiB]", info->size >> 20);
2208                         info->size = max_size;
2209                 }
2210                 debug("found %d erase regions\n", num_erase_regions);
2211                 sect_cnt = 0;
2212                 sector = base;
2213                 for (i = 0; i < num_erase_regions; i++) {
2214                         if (i > NUM_ERASE_REGIONS) {
2215                                 printf("%d erase regions found, only %d used\n",
2216                                        num_erase_regions, NUM_ERASE_REGIONS);
2217                                 break;
2218                         }
2219
2220                         tmp = le32_to_cpu(get_unaligned(
2221                                                 &qry.erase_region_info[i]));
2222                         debug("erase region %u: 0x%08lx\n", i, tmp);
2223
2224                         erase_region_count = (tmp & 0xffff) + 1;
2225                         tmp >>= 16;
2226                         erase_region_size =
2227                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2228                         debug("erase_region_count = %d ", erase_region_count);
2229                         debug("erase_region_size = %d\n", erase_region_size);
2230                         for (j = 0; j < erase_region_count; j++) {
2231                                 if (sector - base >= info->size)
2232                                         break;
2233                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2234                                         printf("ERROR: too many flash sectors\n");
2235                                         break;
2236                                 }
2237                                 info->start[sect_cnt] =
2238                                         (ulong)map_physmem(sector,
2239                                                            info->portwidth,
2240                                                            MAP_NOCACHE);
2241                                 sector += (erase_region_size * size_ratio);
2242
2243                                 /*
2244                                  * Only read protection status from
2245                                  * supported devices (intel...)
2246                                  */
2247                                 switch (info->vendor) {
2248                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2249                                 case CFI_CMDSET_INTEL_EXTENDED:
2250                                 case CFI_CMDSET_INTEL_STANDARD:
2251                                         /*
2252                                          * Set flash to read-id mode. Otherwise
2253                                          * reading protected status is not
2254                                          * guaranteed.
2255                                          */
2256                                         flash_write_cmd(info, sect_cnt, 0,
2257                                                         FLASH_CMD_READ_ID);
2258                                         info->protect[sect_cnt] =
2259                                                 flash_isset(info, sect_cnt,
2260                                                             FLASH_OFFSET_PROTECT,
2261                                                             FLASH_STATUS_PROTECT);
2262                                         flash_write_cmd(info, sect_cnt, 0,
2263                                                         FLASH_CMD_RESET);
2264                                         break;
2265                                 case CFI_CMDSET_AMD_EXTENDED:
2266                                 case CFI_CMDSET_AMD_STANDARD:
2267                                         if (!info->legacy_unlock) {
2268                                                 /* default: not protected */
2269                                                 info->protect[sect_cnt] = 0;
2270                                                 break;
2271                                         }
2272
2273                                         /* Read protection (PPB) from sector */
2274                                         flash_write_cmd(info, 0, 0,
2275                                                         info->cmd_reset);
2276                                         flash_unlock_seq(info, 0);
2277                                         flash_write_cmd(info, 0,
2278                                                         info->addr_unlock1,
2279                                                         AMD_CMD_SET_PPB_ENTRY);
2280                                         info->protect[sect_cnt] =
2281                                                 !flash_isset(info, sect_cnt,
2282                                                              0, 0x01);
2283                                         flash_write_cmd(info, 0, 0,
2284                                                         info->cmd_reset);
2285                                         break;
2286                                 default:
2287                                         /* default: not protected */
2288                                         info->protect[sect_cnt] = 0;
2289                                 }
2290
2291                                 sect_cnt++;
2292                         }
2293                 }
2294
2295                 info->sector_count = sect_cnt;
2296                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2297                 tmp = 1 << qry.block_erase_timeout_typ;
2298                 info->erase_blk_tout = tmp *
2299                         (1 << qry.block_erase_timeout_max);
2300                 tmp = (1 << qry.buf_write_timeout_typ) *
2301                         (1 << qry.buf_write_timeout_max);
2302
2303                 /* round up when converting to ms */
2304                 info->buffer_write_tout = (tmp + 999) / 1000;
2305                 tmp = (1 << qry.word_write_timeout_typ) *
2306                         (1 << qry.word_write_timeout_max);
2307                 /* round up when converting to ms */
2308                 info->write_tout = (tmp + 999) / 1000;
2309                 info->flash_id = FLASH_MAN_CFI;
2310                 if (info->interface == FLASH_CFI_X8X16 &&
2311                     info->chipwidth == FLASH_CFI_BY8) {
2312                         /* XXX - Need to test on x8/x16 in parallel. */
2313                         info->portwidth >>= 1;
2314                 }
2315
2316                 flash_write_cmd(info, 0, 0, info->cmd_reset);
2317         }
2318
2319         return (info->size);
2320 }
2321
2322 #ifdef CONFIG_FLASH_CFI_MTD
2323 void flash_set_verbose(uint v)
2324 {
2325         flash_verbose = v;
2326 }
2327 #endif
2328
2329 static void cfi_flash_set_config_reg(u32 base, u16 val)
2330 {
2331 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2332         /*
2333          * Only set this config register if really defined
2334          * to a valid value (0xffff is invalid)
2335          */
2336         if (val == 0xffff)
2337                 return;
2338
2339         /*
2340          * Set configuration register. Data is "encrypted" in the 16 lower
2341          * address bits.
2342          */
2343         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2344         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2345
2346         /*
2347          * Finally issue reset-command to bring device back to
2348          * read-array mode
2349          */
2350         flash_write16(FLASH_CMD_RESET, (void *)base);
2351 #endif
2352 }
2353
2354 /*-----------------------------------------------------------------------
2355  */
2356
2357 static void flash_protect_default(void)
2358 {
2359 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2360         int i;
2361         struct apl_s {
2362                 ulong start;
2363                 ulong size;
2364         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2365 #endif
2366
2367         /* Monitor protection ON by default */
2368 #if defined(CONFIG_SYS_MONITOR_BASE) && \
2369         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2370         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2371         flash_protect(FLAG_PROTECT_SET,
2372                       CONFIG_SYS_MONITOR_BASE,
2373                       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2374                       flash_get_info(CONFIG_SYS_MONITOR_BASE));
2375 #endif
2376
2377         /* Environment protection ON by default */
2378 #ifdef CONFIG_ENV_IS_IN_FLASH
2379         flash_protect(FLAG_PROTECT_SET,
2380                       CONFIG_ENV_ADDR,
2381                       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2382                       flash_get_info(CONFIG_ENV_ADDR));
2383 #endif
2384
2385         /* Redundant environment protection ON by default */
2386 #ifdef CONFIG_ENV_ADDR_REDUND
2387         flash_protect(FLAG_PROTECT_SET,
2388                       CONFIG_ENV_ADDR_REDUND,
2389                       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2390                       flash_get_info(CONFIG_ENV_ADDR_REDUND));
2391 #endif
2392
2393 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2394         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2395                 debug("autoprotecting from %08lx to %08lx\n",
2396                       apl[i].start, apl[i].start + apl[i].size - 1);
2397                 flash_protect(FLAG_PROTECT_SET,
2398                               apl[i].start,
2399                               apl[i].start + apl[i].size - 1,
2400                               flash_get_info(apl[i].start));
2401         }
2402 #endif
2403 }
2404
2405 unsigned long flash_init(void)
2406 {
2407         unsigned long size = 0;
2408         int i;
2409
2410 #ifdef CONFIG_SYS_FLASH_PROTECTION
2411         /* read environment from EEPROM */
2412         char s[64];
2413
2414         env_get_f("unlock", s, sizeof(s));
2415 #endif
2416
2417 #ifdef CONFIG_CFI_FLASH /* for driver model */
2418         cfi_flash_init_dm();
2419 #endif
2420
2421         /* Init: no FLASHes known */
2422         for (i = 0; i < CFI_FLASH_BANKS; ++i) {
2423                 flash_info[i].flash_id = FLASH_UNKNOWN;
2424
2425                 /* Optionally write flash configuration register */
2426                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2427                                          cfi_flash_config_reg(i));
2428
2429                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2430                         flash_get_size(cfi_flash_bank_addr(i), i);
2431                 size += flash_info[i].size;
2432                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2433 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2434                         printf("## Unknown flash on Bank %d ", i + 1);
2435                         printf("- Size = 0x%08lx = %ld MB\n",
2436                                flash_info[i].size,
2437                                flash_info[i].size >> 20);
2438 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2439                 }
2440 #ifdef CONFIG_SYS_FLASH_PROTECTION
2441                 else if (strcmp(s, "yes") == 0) {
2442                         /*
2443                          * Only the U-Boot image and it's environment
2444                          * is protected, all other sectors are
2445                          * unprotected (unlocked) if flash hardware
2446                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2447                          * and the environment variable "unlock" is
2448                          * set to "yes".
2449                          */
2450                         if (flash_info[i].legacy_unlock) {
2451                                 int k;
2452
2453                                 /*
2454                                  * Disable legacy_unlock temporarily,
2455                                  * since flash_real_protect would
2456                                  * relock all other sectors again
2457                                  * otherwise.
2458                                  */
2459                                 flash_info[i].legacy_unlock = 0;
2460
2461                                 /*
2462                                  * Legacy unlocking (e.g. Intel J3) ->
2463                                  * unlock only one sector. This will
2464                                  * unlock all sectors.
2465                                  */
2466                                 flash_real_protect(&flash_info[i], 0, 0);
2467
2468                                 flash_info[i].legacy_unlock = 1;
2469
2470                                 /*
2471                                  * Manually mark other sectors as
2472                                  * unlocked (unprotected)
2473                                  */
2474                                 for (k = 1; k < flash_info[i].sector_count; k++)
2475                                         flash_info[i].protect[k] = 0;
2476                         } else {
2477                                 /*
2478                                  * No legancy unlocking -> unlock all sectors
2479                                  */
2480                                 flash_protect(FLAG_PROTECT_CLEAR,
2481                                               flash_info[i].start[0],
2482                                               flash_info[i].start[0]
2483                                               + flash_info[i].size - 1,
2484                                               &flash_info[i]);
2485                         }
2486                 }
2487 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2488         }
2489
2490         flash_protect_default();
2491 #ifdef CONFIG_FLASH_CFI_MTD
2492         cfi_mtd_init();
2493 #endif
2494
2495         return (size);
2496 }
2497
2498 #ifdef CONFIG_CFI_FLASH /* for driver model */
2499 static int cfi_flash_probe(struct udevice *dev)
2500 {
2501         fdt_addr_t addr;
2502         int idx;
2503
2504         for (idx = 0; idx < CFI_MAX_FLASH_BANKS; idx++) {
2505                 addr = dev_read_addr_index(dev, idx);
2506                 if (addr == FDT_ADDR_T_NONE)
2507                         break;
2508
2509                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2510                 flash_info[cfi_flash_num_flash_banks].base = addr;
2511                 cfi_flash_num_flash_banks++;
2512         }
2513         gd->bd->bi_flashstart = flash_info[0].base;
2514
2515         return 0;
2516 }
2517
2518 static const struct udevice_id cfi_flash_ids[] = {
2519         { .compatible = "cfi-flash" },
2520         { .compatible = "jedec-flash" },
2521         {}
2522 };
2523
2524 U_BOOT_DRIVER(cfi_flash) = {
2525         .name   = "cfi_flash",
2526         .id     = UCLASS_MTD,
2527         .of_match = cfi_flash_ids,
2528         .probe = cfi_flash_probe,
2529 };
2530 #endif /* CONFIG_CFI_FLASH */