2 # I2C subsystem configuration
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
15 So at present there is no need to ever disable this option.
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
30 bool "Enable Driver Model for I2C drivers"
33 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
36 device (bus child) info is kept as parent plat. The interface
37 is defined in include/i2c.h.
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
51 bool "Enable legacy I2C subsystem and drivers"
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
58 config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
65 config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
72 config SYS_I2C_EARLY_INIT
73 bool "Enable legacy I2C subsystem early in boot"
74 depends on BOARD_EARLY_INIT_F && SPL_SYS_I2C_LEGACY && SYS_I2C_MXC
76 Add the function prototype for i2c_early_init_f which is called in
79 config I2C_CROS_EC_TUNNEL
80 tristate "Chrome OS EC tunnel I2C bus"
83 This provides an I2C bus that will tunnel i2c commands through to
84 the other side of the Chrome OS EC to the I2C bus connected there.
85 This will work whatever the interface used to talk to the EC (SPI,
86 I2C or LPC). Some Chromebooks use this when the hardware design
87 does not allow direct access to the main PMIC from the AP.
89 config I2C_CROS_EC_LDO
90 bool "Provide access to LDOs on the Chrome OS EC"
93 On many Chromebooks the main PMIC is inaccessible to the AP. This is
94 often dealt with by using an I2C pass-through interface provided by
95 the EC. On some unfortunate models (e.g. Spring) the pass-through
96 is not available, and an LDO message is available instead. This
97 option enables a driver which provides very basic access to those
98 regulators, via the EC. We implement this as an I2C bus which
99 emulates just the TPS65090 messages we know about. This is done to
100 avoid duplicating the logic in the TPS65090 regulator driver for
101 enabling/disabling an LDO.
103 config I2C_SET_DEFAULT_BUS_NUM
104 bool "Set default I2C bus number"
107 Set default number of I2C bus to be accessed. This option provides
108 behaviour similar to old (i.e. pre DM) I2C bus driver.
110 config I2C_DEFAULT_BUS_NUMBER
111 hex "I2C default bus number"
112 depends on I2C_SET_DEFAULT_BUS_NUM
115 Number of default I2C bus to use
118 bool "Enable Driver Model for software emulated I2C bus driver"
119 depends on DM_I2C && DM_GPIO
121 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
122 configuration is given by the device tree. Kernel-style device tree
123 bindings are supported.
124 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
126 config SPL_DM_I2C_GPIO
127 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
128 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
131 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
132 configuration is given by the device tree. Kernel-style device tree
133 bindings are supported.
134 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
137 bool "Atmel I2C driver"
138 depends on DM_I2C && ARCH_AT91
140 Add support for the Atmel I2C driver. A serious problem is that there
141 is no documented way to issue repeated START conditions for more than
142 two messages, as needed to support combined I2C messages. Use the
143 i2c-gpio driver unless your system can cope with this limitation.
144 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
147 bool "Broadcom I2C driver"
151 Add support for Broadcom I2C driver.
152 Say yes here to to enable the Broadco I2C driver.
155 bool "Freescale I2C bus driver"
157 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
160 if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
161 config SYS_FSL_I2C_OFFSET
162 hex "Offset from the IMMR of the address of the first I2C controller"
164 config SYS_FSL_HAS_I2C2_OFFSET
165 bool "Support a second I2C controller"
167 config SYS_FSL_I2C2_OFFSET
168 hex "Offset from the IMMR of the address of the second I2C controller"
169 depends on SYS_FSL_HAS_I2C2_OFFSET
171 config SYS_FSL_HAS_I2C3_OFFSET
172 bool "Support a third I2C controller"
174 config SYS_FSL_I2C3_OFFSET
175 hex "Offset from the IMMR of the address of the third I2C controller"
176 depends on SYS_FSL_HAS_I2C3_OFFSET
178 config SYS_FSL_HAS_I2C4_OFFSET
179 bool "Support a fourth I2C controller"
181 config SYS_FSL_I2C4_OFFSET
182 hex "Offset from the IMMR of the address of the fourth I2C controller"
183 depends on SYS_FSL_HAS_I2C4_OFFSET
186 config SYS_I2C_CADENCE
187 tristate "Cadence I2C Controller"
190 Say yes here to select Cadence I2C Host Controller. This controller is
191 e.g. used by Xilinx Zynq.
194 tristate "Cortina-Access I2C Controller"
195 depends on DM_I2C && CORTINA_PLATFORM
198 Add support for the Cortina Access I2C host controller.
199 Say yes here to select Cortina-Access I2C Host Controller.
201 config SYS_I2C_DAVINCI
202 bool "Davinci I2C Controller"
203 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
205 Say yes here to add support for Davinci and Keystone I2C controller
208 bool "Designware I2C Controller"
211 Say yes here to select the Designware I2C Host Controller. This
212 controller is used in various SoCs, e.g. the ST SPEAr, Altera
213 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
215 config SYS_I2C_ASPEED
216 bool "Aspeed I2C Controller"
217 depends on DM_I2C && ARCH_ASPEED
219 Say yes here to select Aspeed I2C Host Controller. The driver
220 supports AST2500 and AST2400 controllers, but is very limited.
221 Only single master mode is supported and only byte-by-byte
222 synchronous reads and writes are supported, no Pool Buffers or DMA.
225 bool "Intel I2C/SMBUS driver"
228 Add support for the Intel SMBUS driver. So far this driver is just
229 a stub which perhaps some basic init. There is no implementation of
230 the I2C API meaning that any I2C operations will immediately fail
233 config SYS_I2C_IMX_LPI2C
234 bool "NXP i.MX LPI2C driver"
236 Add support for the NXP i.MX LPI2C driver.
238 config SYS_I2C_LPC32XX
239 bool "LPC32XX I2C driver"
240 depends on ARCH_LPC32XX
242 Enable support for the LPC32xx I2C driver.
245 bool "Amlogic Meson I2C driver"
246 depends on DM_I2C && ARCH_MESON
248 Add support for the I2C controller available in Amlogic Meson
249 SoCs. The controller supports programmable bus speed including
250 standard (100kbits/s) and fast (400kbit/s) speed and allows the
251 software to define a flexible format of the bit streams. It has an
252 internal buffer holding up to 8 bytes for transfers and supports
253 both 7-bit and 10-bit addresses.
256 bool "NXP MXC I2C driver"
258 Add support for the NXP I2C driver. This supports up to four bus
259 channels and operating on standard mode up to 100 kbits/s and fast
260 mode up to 400 kbits/s.
262 if SYS_I2C_MXC && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY)
263 config SYS_I2C_MXC_I2C1
266 Add support for NXP MXC I2C Controller 1.
267 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
269 config SYS_I2C_MXC_I2C2
272 Add support for NXP MXC I2C Controller 2.
273 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
275 config SYS_I2C_MXC_I2C3
278 Add support for NXP MXC I2C Controller 3.
279 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
281 config SYS_I2C_MXC_I2C4
284 Add support for NXP MXC I2C Controller 4.
285 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
287 config SYS_I2C_MXC_I2C5
290 Add support for NXP MXC I2C Controller 5.
291 Required for SoCs which have I2C MXC controller 5 eg LX2160A
293 config SYS_I2C_MXC_I2C6
296 Add support for NXP MXC I2C Controller 6.
297 Required for SoCs which have I2C MXC controller 6 eg LX2160A
299 config SYS_I2C_MXC_I2C7
302 Add support for NXP MXC I2C Controller 7.
303 Required for SoCs which have I2C MXC controller 7 eg LX2160A
305 config SYS_I2C_MXC_I2C8
308 Add support for NXP MXC I2C Controller 8.
309 Required for SoCs which have I2C MXC controller 8 eg LX2160A
313 config SYS_MXC_I2C1_SPEED
314 int "I2C Channel 1 speed"
315 default 40000000 if TARGET_LS2080A_EMU
318 MXC I2C Channel 1 speed
320 config SYS_MXC_I2C1_SLAVE
328 config SYS_MXC_I2C2_SPEED
329 int "I2C Channel 2 speed"
330 default 40000000 if TARGET_LS2080A_EMU
333 MXC I2C Channel 2 speed
335 config SYS_MXC_I2C2_SLAVE
343 config SYS_MXC_I2C3_SPEED
344 int "I2C Channel 3 speed"
347 MXC I2C Channel 3 speed
349 config SYS_MXC_I2C3_SLAVE
357 config SYS_MXC_I2C4_SPEED
358 int "I2C Channel 4 speed"
361 MXC I2C Channel 4 speed
363 config SYS_MXC_I2C4_SLAVE
371 config SYS_MXC_I2C5_SPEED
372 int "I2C Channel 5 speed"
375 MXC I2C Channel 5 speed
377 config SYS_MXC_I2C5_SLAVE
385 config SYS_MXC_I2C6_SPEED
386 int "I2C Channel 6 speed"
389 MXC I2C Channel 6 speed
391 config SYS_MXC_I2C6_SLAVE
399 config SYS_MXC_I2C7_SPEED
400 int "I2C Channel 7 speed"
403 MXC I2C Channel 7 speed
405 config SYS_MXC_I2C7_SLAVE
413 config SYS_MXC_I2C8_SPEED
414 int "I2C Channel 8 speed"
417 MXC I2C Channel 8 speed
419 config SYS_MXC_I2C8_SLAVE
426 config SYS_I2C_NEXELL
427 bool "Nexell I2C driver"
430 Add support for the Nexell I2C driver. This is used with various
431 Nexell parts such as S5Pxx18 series SoCs. All chips
432 have several I2C ports and all are provided, controlled by the
435 config SYS_I2C_OCORES
436 bool "ocores I2C driver"
439 Add support for ocores I2C controller. For details see
440 https://opencores.org/projects/i2c
442 config SYS_I2C_OMAP24XX
443 bool "TI OMAP2+ I2C driver"
444 depends on ARCH_OMAP2PLUS || ARCH_K3
446 Add support for the OMAP2+ I2C driver.
448 config SYS_I2C_RCAR_I2C
449 bool "Renesas RCar I2C driver"
450 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
452 Support for Renesas RCar I2C controller.
454 config SYS_I2C_RCAR_IIC
455 bool "Renesas RCar Gen3 IIC driver"
456 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
458 Support for Renesas RCar Gen3 IIC controller.
460 config SYS_I2C_ROCKCHIP
461 bool "Rockchip I2C driver"
464 Add support for the Rockchip I2C driver. This is used with various
465 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
466 have several I2C ports and all are provided, controlled by the
469 config SYS_I2C_SANDBOX
470 bool "Sandbox I2C driver"
471 depends on SANDBOX && DM_I2C
473 Enable I2C support for sandbox. This is an emulation of a real I2C
474 bus. Devices can be attached to the bus using the device tree
475 which specifies the driver to use. See sandbox.dts as an example.
478 bool "Legacy SuperH I2C interface"
479 depends on ARCH_RMOBILE && SYS_I2C_LEGACY
481 Enable the legacy SuperH I2C interface.
484 config SYS_I2C_SH_NUM_CONTROLLERS
488 config SYS_I2C_SH_BASE0
492 config SYS_I2C_SH_BASE1
496 config SYS_I2C_SH_BASE2
500 config SYS_I2C_SH_BASE3
504 config SYS_I2C_SH_BASE4
512 config SH_I2C_DATA_HIGH
516 config SH_I2C_DATA_LOW
526 bool "Legacy software I2C interface"
528 Enable the legacy software defined I2C interface
530 config SYS_I2C_SOFT_SPEED
531 int "Software I2C bus speed"
532 depends on SYS_I2C_SOFT
535 Speed of the software I2C bus
537 config SYS_I2C_SOFT_SLAVE
538 hex "Software I2C slave address"
539 depends on SYS_I2C_SOFT
542 Slave address of the software I2C bus
544 config SYS_I2C_OCTEON
545 bool "Octeon II/III/TX/TX2 I2C driver"
546 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
549 Add support for the Marvell Octeon I2C driver. This is used with
550 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
551 chips have several I2C ports and all are provided, controlled by
554 config SYS_I2C_S3C24X0
555 bool "Samsung I2C driver"
556 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
558 Support for Samsung I2C controller as Samsung SoCs.
560 config SYS_I2C_STM32F7
561 bool "STMicroelectronics STM32F7 I2C support"
562 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
564 Enable this option to add support for STM32 I2C controller
565 introduced with STM32F7/H7 SoCs. This I2C controller supports :
566 _ Slave and master modes
567 _ Multimaster capability
568 _ Standard-mode (up to 100 kHz)
569 _ Fast-mode (up to 400 kHz)
570 _ Fast-mode Plus (up to 1 MHz)
571 _ 7-bit and 10-bit addressing mode
572 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
573 _ All 7-bit addresses acknowledge mode
575 _ Programmable setup and hold times
576 _ Easy to use event management
577 _ Optional clock stretching
580 config SYS_I2C_SYNQUACER
581 bool "Socionext SynQuacer I2C controller"
582 depends on ARCH_SYNQUACER && DM_I2C
584 Support for Socionext Synquacer I2C controller. This I2C controller
585 will be used for RTC and LS-connector on DeveloperBox.
588 bool "NVIDIA Tegra internal I2C controller"
589 depends on ARCH_TEGRA
591 Support for NVIDIA I2C controller available in Tegra SoCs.
593 config SYS_I2C_UNIPHIER
594 bool "UniPhier I2C driver"
595 depends on ARCH_UNIPHIER && DM_I2C
598 Support for UniPhier I2C controller driver. This I2C controller
599 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
601 config SYS_I2C_UNIPHIER_F
602 bool "UniPhier FIFO-builtin I2C driver"
603 depends on ARCH_UNIPHIER && DM_I2C
606 Support for UniPhier FIFO-builtin I2C controller driver.
607 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
609 config SYS_I2C_VERSATILE
610 bool "Arm Ltd Versatile I2C bus driver"
611 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
613 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
614 controller is present in the development boards manufactured by Arm Ltd.
616 config SYS_I2C_MVTWSI
617 bool "Marvell I2C driver"
619 Support for Marvell I2C controllers as used on the orion5x and
620 kirkwood SoC families.
622 config TEGRA186_BPMP_I2C
623 bool "Enable Tegra186 BPMP-based I2C driver"
624 depends on TEGRA186_BPMP
626 Support for Tegra I2C controllers managed by the BPMP (Boot and
627 Power Management Processor). On Tegra186, some I2C controllers are
628 directly controlled by the main CPU, whereas others are controlled
629 by the BPMP, and can only be accessed by the main CPU via IPC
630 requests to the BPMP. This driver covers the latter case.
633 hex "I2C Slave address channel (all buses)"
634 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
637 I2C Slave address channel 0 for all buses in the legacy drivers.
638 Many boards/controllers/drivers don't support an I2C slave
639 interface so provide a default slave address for them for use in
640 common code. A real value for CONFIG_SYS_I2C_SLAVE should be
641 defined for any board which does support a slave interface and
642 this default used otherwise.
645 int "I2C Slave channel 0 speed (all buses)"
646 depends on SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY || TPL_SYS_I2C_LEGACY
649 I2C Slave speed channel 0 for all buses in the legacy drivers.
651 config SYS_I2C_BUS_MAX
653 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
655 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
656 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
657 default 5 if OMAP54XX
659 Define the maximum number of available I2C buses.
661 config SYS_I2C_XILINX_XIIC
662 bool "Xilinx AXI I2C driver"
665 Support for Xilinx AXI I2C controller.
668 bool "gdsys IHS I2C driver"
671 Support for gdsys IHS I2C driver on FPGA bus.
673 source "drivers/i2c/muxes/Kconfig"