2 # I2C subsystem configuration
10 This is a stand-in for an option to enable I2C support. In fact this
11 simply enables building of the I2C directory for U-Boot. The actual
12 I2C feature is enabled by DM_I2C (for driver model) and
13 the #define CONFIG_SYS_I2C_LEGACY (for the legacy I2C stack).
15 So at present there is no need to ever disable this option.
19 Enable support for the I2C (Inter-Integrated Circuit) bus in U-Boot.
20 I2C works with a clock and data line which can be driven by a
21 one or more masters or slaves. It is a fairly complex bus but is
22 widely used as it only needs two lines for communication. Speeds of
23 400kbps are typical but up to 3.4Mbps is supported by some
24 hardware. Enable this option to build the drivers in drivers/i2c as
25 part of a U-Boot build.
30 bool "Enable Driver Model for I2C drivers"
33 Enable driver model for I2C. The I2C uclass interface: probe, read,
34 write and speed, is implemented with the bus drivers operations,
35 which provide methods for bus setting and data transfer. Each chip
36 device (bus child) info is kept as parent plat. The interface
37 is defined in include/i2c.h.
40 bool "Enable Driver Model for I2C drivers in SPL"
41 depends on SPL_DM && DM_I2C
44 Enable driver model for I2C. The I2C uclass interface: probe, read,
45 write and speed, is implemented with the bus drivers operations,
46 which provide methods for bus setting and data transfer. Each chip
47 device (bus child) info is kept as parent platdata. The interface
48 is defined in include/i2c.h.
51 bool "Enable legacy I2C subsystem and drivers"
54 Enable the legacy I2C subsystem and drivers. While this is
55 deprecated in U-Boot itself, this can be useful in some situations
58 config SPL_SYS_I2C_LEGACY
59 bool "Enable legacy I2C subsystem and drivers in SPL"
60 depends on SUPPORT_SPL && !SPL_DM_I2C
62 Enable the legacy I2C subsystem and drivers in SPL. This is useful
63 in some size constrained situations.
65 config TPL_SYS_I2C_LEGACY
66 bool "Enable legacy I2C subsystem and drivers in TPL"
67 depends on SUPPORT_TPL && !SPL_DM_I2C
69 Enable the legacy I2C subsystem and drivers in TPL. This is useful
70 in some size constrained situations.
72 config I2C_CROS_EC_TUNNEL
73 tristate "Chrome OS EC tunnel I2C bus"
76 This provides an I2C bus that will tunnel i2c commands through to
77 the other side of the Chrome OS EC to the I2C bus connected there.
78 This will work whatever the interface used to talk to the EC (SPI,
79 I2C or LPC). Some Chromebooks use this when the hardware design
80 does not allow direct access to the main PMIC from the AP.
82 config I2C_CROS_EC_LDO
83 bool "Provide access to LDOs on the Chrome OS EC"
86 On many Chromebooks the main PMIC is inaccessible to the AP. This is
87 often dealt with by using an I2C pass-through interface provided by
88 the EC. On some unfortunate models (e.g. Spring) the pass-through
89 is not available, and an LDO message is available instead. This
90 option enables a driver which provides very basic access to those
91 regulators, via the EC. We implement this as an I2C bus which
92 emulates just the TPS65090 messages we know about. This is done to
93 avoid duplicating the logic in the TPS65090 regulator driver for
94 enabling/disabling an LDO.
96 config I2C_SET_DEFAULT_BUS_NUM
97 bool "Set default I2C bus number"
100 Set default number of I2C bus to be accessed. This option provides
101 behaviour similar to old (i.e. pre DM) I2C bus driver.
103 config I2C_DEFAULT_BUS_NUMBER
104 hex "I2C default bus number"
105 depends on I2C_SET_DEFAULT_BUS_NUM
108 Number of default I2C bus to use
111 bool "Enable Driver Model for software emulated I2C bus driver"
112 depends on DM_I2C && DM_GPIO
114 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
115 configuration is given by the device tree. Kernel-style device tree
116 bindings are supported.
117 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
119 config SPL_DM_I2C_GPIO
120 bool "Enable Driver Model for software emulated I2C bus driver in SPL"
121 depends on SPL_DM && DM_I2C_GPIO && SPL_DM_GPIO && SPL_GPIO
124 Enable the i2c bus driver emulation by using the GPIOs. The bus GPIO
125 configuration is given by the device tree. Kernel-style device tree
126 bindings are supported.
127 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
130 bool "Atmel I2C driver"
131 depends on DM_I2C && ARCH_AT91
133 Add support for the Atmel I2C driver. A serious problem is that there
134 is no documented way to issue repeated START conditions for more than
135 two messages, as needed to support combined I2C messages. Use the
136 i2c-gpio driver unless your system can cope with this limitation.
137 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
140 bool "Broadcom I2C driver"
144 Add support for Broadcom I2C driver.
145 Say yes here to to enable the Broadco I2C driver.
148 bool "Freescale I2C bus driver"
151 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
154 config SYS_I2C_CADENCE
155 tristate "Cadence I2C Controller"
158 Say yes here to select Cadence I2C Host Controller. This controller is
159 e.g. used by Xilinx Zynq.
162 tristate "Cortina-Access I2C Controller"
163 depends on DM_I2C && CORTINA_PLATFORM
166 Add support for the Cortina Access I2C host controller.
167 Say yes here to select Cortina-Access I2C Host Controller.
169 config SYS_I2C_DAVINCI
170 bool "Davinci I2C Controller"
171 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
173 Say yes here to add support for Davinci and Keystone I2C controller
176 bool "Designware I2C Controller"
179 Say yes here to select the Designware I2C Host Controller. This
180 controller is used in various SoCs, e.g. the ST SPEAr, Altera
181 SoCFPGA, Synopsys ARC700 and some Intel x86 SoCs.
183 config SYS_I2C_ASPEED
184 bool "Aspeed I2C Controller"
185 depends on DM_I2C && ARCH_ASPEED
187 Say yes here to select Aspeed I2C Host Controller. The driver
188 supports AST2500 and AST2400 controllers, but is very limited.
189 Only single master mode is supported and only byte-by-byte
190 synchronous reads and writes are supported, no Pool Buffers or DMA.
193 bool "Intel I2C/SMBUS driver"
196 Add support for the Intel SMBUS driver. So far this driver is just
197 a stub which perhaps some basic init. There is no implementation of
198 the I2C API meaning that any I2C operations will immediately fail
201 config SYS_I2C_IMX_LPI2C
202 bool "NXP i.MX LPI2C driver"
204 Add support for the NXP i.MX LPI2C driver.
206 config SYS_I2C_LPC32XX
207 bool "LPC32XX I2C driver"
208 depends on ARCH_LPC32XX
210 Enable support for the LPC32xx I2C driver.
213 bool "Amlogic Meson I2C driver"
214 depends on DM_I2C && ARCH_MESON
216 Add support for the I2C controller available in Amlogic Meson
217 SoCs. The controller supports programmable bus speed including
218 standard (100kbits/s) and fast (400kbit/s) speed and allows the
219 software to define a flexible format of the bit streams. It has an
220 internal buffer holding up to 8 bytes for transfers and supports
221 both 7-bit and 10-bit addresses.
224 bool "NXP MXC I2C driver"
226 Add support for the NXP I2C driver. This supports up to four bus
227 channels and operating on standard mode up to 100 kbits/s and fast
228 mode up to 400 kbits/s.
230 # These settings are not used with DM_I2C, however SPL doesn't use
231 # DM_I2C even if DM_I2C is enabled, and so might use these settings even
232 # when main u-boot does not!
233 if SYS_I2C_MXC && (!DM_I2C || SPL)
234 config SYS_I2C_MXC_I2C1
237 Add support for NXP MXC I2C Controller 1.
238 Required for SoCs which have I2C MXC controller 1 eg LS1088A, LS2080A
240 config SYS_I2C_MXC_I2C2
243 Add support for NXP MXC I2C Controller 2.
244 Required for SoCs which have I2C MXC controller 2 eg LS1088A, LS2080A
246 config SYS_I2C_MXC_I2C3
249 Add support for NXP MXC I2C Controller 3.
250 Required for SoCs which have I2C MXC controller 3 eg LS1088A, LS2080A
252 config SYS_I2C_MXC_I2C4
255 Add support for NXP MXC I2C Controller 4.
256 Required for SoCs which have I2C MXC controller 4 eg LS1088A, LS2080A
258 config SYS_I2C_MXC_I2C5
261 Add support for NXP MXC I2C Controller 5.
262 Required for SoCs which have I2C MXC controller 5 eg LX2160A
264 config SYS_I2C_MXC_I2C6
267 Add support for NXP MXC I2C Controller 6.
268 Required for SoCs which have I2C MXC controller 6 eg LX2160A
270 config SYS_I2C_MXC_I2C7
273 Add support for NXP MXC I2C Controller 7.
274 Required for SoCs which have I2C MXC controller 7 eg LX2160A
276 config SYS_I2C_MXC_I2C8
279 Add support for NXP MXC I2C Controller 8.
280 Required for SoCs which have I2C MXC controller 8 eg LX2160A
284 config SYS_MXC_I2C1_SPEED
285 int "I2C Channel 1 speed"
286 default 40000000 if TARGET_LS2080A_EMU
289 MXC I2C Channel 1 speed
291 config SYS_MXC_I2C1_SLAVE
299 config SYS_MXC_I2C2_SPEED
300 int "I2C Channel 2 speed"
301 default 40000000 if TARGET_LS2080A_EMU
304 MXC I2C Channel 2 speed
306 config SYS_MXC_I2C2_SLAVE
314 config SYS_MXC_I2C3_SPEED
315 int "I2C Channel 3 speed"
318 MXC I2C Channel 3 speed
320 config SYS_MXC_I2C3_SLAVE
328 config SYS_MXC_I2C4_SPEED
329 int "I2C Channel 4 speed"
332 MXC I2C Channel 4 speed
334 config SYS_MXC_I2C4_SLAVE
342 config SYS_MXC_I2C5_SPEED
343 int "I2C Channel 5 speed"
346 MXC I2C Channel 5 speed
348 config SYS_MXC_I2C5_SLAVE
356 config SYS_MXC_I2C6_SPEED
357 int "I2C Channel 6 speed"
360 MXC I2C Channel 6 speed
362 config SYS_MXC_I2C6_SLAVE
370 config SYS_MXC_I2C7_SPEED
371 int "I2C Channel 7 speed"
374 MXC I2C Channel 7 speed
376 config SYS_MXC_I2C7_SLAVE
384 config SYS_MXC_I2C8_SPEED
385 int "I2C Channel 8 speed"
388 MXC I2C Channel 8 speed
390 config SYS_MXC_I2C8_SLAVE
397 config SYS_I2C_NEXELL
398 bool "Nexell I2C driver"
401 Add support for the Nexell I2C driver. This is used with various
402 Nexell parts such as S5Pxx18 series SoCs. All chips
403 have several I2C ports and all are provided, controlled by the
406 config SYS_I2C_OCORES
407 bool "ocores I2C driver"
410 Add support for ocores I2C controller. For details see
411 https://opencores.org/projects/i2c
413 config SYS_I2C_OMAP24XX
414 bool "TI OMAP2+ I2C driver"
415 depends on ARCH_OMAP2PLUS || ARCH_K3
417 Add support for the OMAP2+ I2C driver.
420 config SYS_OMAP24_I2C_SLAVE
421 int "I2C Slave addr channel 0"
424 OMAP24xx I2C Slave address channel 0
426 config SYS_OMAP24_I2C_SPEED
427 int "I2C Slave channel 0 speed"
430 OMAP24xx Slave speed channel 0
433 config SYS_I2C_RCAR_I2C
434 bool "Renesas RCar I2C driver"
435 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
437 Support for Renesas RCar I2C controller.
439 config SYS_I2C_RCAR_IIC
440 bool "Renesas RCar Gen3 IIC driver"
441 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
443 Support for Renesas RCar Gen3 IIC controller.
445 config SYS_I2C_ROCKCHIP
446 bool "Rockchip I2C driver"
449 Add support for the Rockchip I2C driver. This is used with various
450 Rockchip parts such as RK3126, RK3128, RK3036 and RK3288. All chips
451 have several I2C ports and all are provided, controlled by the
454 config SYS_I2C_SANDBOX
455 bool "Sandbox I2C driver"
456 depends on SANDBOX && DM_I2C
458 Enable I2C support for sandbox. This is an emulation of a real I2C
459 bus. Devices can be attached to the bus using the device tree
460 which specifies the driver to use. See sandbox.dts as an example.
463 bool "Legacy software I2C interface"
465 Enable the legacy software defined I2C interface
467 config SYS_I2C_SOFT_SPEED
468 int "Software I2C bus speed"
469 depends on SYS_I2C_SOFT
472 Speed of the software I2C bus
474 config SYS_I2C_SOFT_SLAVE
475 hex "Software I2C slave address"
476 depends on SYS_I2C_SOFT
479 Slave address of the software I2C bus
481 config SYS_I2C_OCTEON
482 bool "Octeon II/III/TX/TX2 I2C driver"
483 depends on (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) && DM_I2C
486 Add support for the Marvell Octeon I2C driver. This is used with
487 various Octeon parts such as Octeon II/III and OcteonTX/TX2. All
488 chips have several I2C ports and all are provided, controlled by
491 config SYS_I2C_S3C24X0
492 bool "Samsung I2C driver"
493 depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && DM_I2C
495 Support for Samsung I2C controller as Samsung SoCs.
497 config SYS_I2C_STM32F7
498 bool "STMicroelectronics STM32F7 I2C support"
499 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
501 Enable this option to add support for STM32 I2C controller
502 introduced with STM32F7/H7 SoCs. This I2C controller supports :
503 _ Slave and master modes
504 _ Multimaster capability
505 _ Standard-mode (up to 100 kHz)
506 _ Fast-mode (up to 400 kHz)
507 _ Fast-mode Plus (up to 1 MHz)
508 _ 7-bit and 10-bit addressing mode
509 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
510 _ All 7-bit addresses acknowledge mode
512 _ Programmable setup and hold times
513 _ Easy to use event management
514 _ Optional clock stretching
517 config SYS_I2C_SYNQUACER
518 bool "Socionext SynQuacer I2C controller"
519 depends on ARCH_SYNQUACER && DM_I2C
521 Support for Socionext Synquacer I2C controller. This I2C controller
522 will be used for RTC and LS-connector on DeveloperBox.
525 bool "NVIDIA Tegra internal I2C controller"
526 depends on ARCH_TEGRA
528 Support for NVIDIA I2C controller available in Tegra SoCs.
530 config SYS_I2C_UNIPHIER
531 bool "UniPhier I2C driver"
532 depends on ARCH_UNIPHIER && DM_I2C
535 Support for UniPhier I2C controller driver. This I2C controller
536 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
538 config SYS_I2C_UNIPHIER_F
539 bool "UniPhier FIFO-builtin I2C driver"
540 depends on ARCH_UNIPHIER && DM_I2C
543 Support for UniPhier FIFO-builtin I2C controller driver.
544 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
546 config SYS_I2C_VERSATILE
547 bool "Arm Ltd Versatile I2C bus driver"
548 depends on DM_I2C && TARGET_VEXPRESS64_JUNO
550 Add support for the Arm Ltd Versatile Express I2C driver. The I2C host
551 controller is present in the development boards manufactured by Arm Ltd.
553 config SYS_I2C_MVTWSI
554 bool "Marvell I2C driver"
556 Support for Marvell I2C controllers as used on the orion5x and
557 kirkwood SoC families.
559 config TEGRA186_BPMP_I2C
560 bool "Enable Tegra186 BPMP-based I2C driver"
561 depends on TEGRA186_BPMP
563 Support for Tegra I2C controllers managed by the BPMP (Boot and
564 Power Management Processor). On Tegra186, some I2C controllers are
565 directly controlled by the main CPU, whereas others are controlled
566 by the BPMP, and can only be accessed by the main CPU via IPC
567 requests to the BPMP. This driver covers the latter case.
569 config SYS_I2C_BUS_MAX
571 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
573 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
574 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
575 default 5 if OMAP54XX
577 Define the maximum number of available I2C buses.
579 config SYS_I2C_XILINX_XIIC
580 bool "Xilinx AXI I2C driver"
583 Support for Xilinx AXI I2C controller.
586 bool "gdsys IHS I2C driver"
589 Support for gdsys IHS I2C driver on FPGA bus.
591 source "drivers/i2c/muxes/Kconfig"