drivers/ddr/marvell/a38x/ddr3_training_ip_db.h

   1 /*
   2  * Copyright (C) Marvell International Ltd. and its affiliates
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0
   5  */
   6
   7 #ifndef _DDR3_TRAINING_IP_DB_H_
   8 #define _DDR3_TRAINING_IP_DB_H_
   9
  10 enum hws_pattern {
  11         PATTERN_PBS1,
  12         PATTERN_PBS2,
  13         PATTERN_RL,
  14         PATTERN_STATIC_PBS,
  15         PATTERN_KILLER_DQ0,
  16         PATTERN_KILLER_DQ1,
  17         PATTERN_KILLER_DQ2,
  18         PATTERN_KILLER_DQ3,
  19         PATTERN_KILLER_DQ4,
  20         PATTERN_KILLER_DQ5,
  21         PATTERN_KILLER_DQ6,
  22         PATTERN_KILLER_DQ7,
  23         PATTERN_PBS3,
  24         PATTERN_RL2,
  25         PATTERN_TEST,
  26         PATTERN_FULL_SSO0,
  27         PATTERN_FULL_SSO1,
  28         PATTERN_FULL_SSO2,
  29         PATTERN_FULL_SSO3,
  30         PATTERN_VREF,
  31         PATTERN_LIMIT
  32 };
  33
  34 #endif /* _DDR3_TRAINING_IP_DB_H_ */