Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.h
[platform/kernel/u-boot.git] / configs / chromebook_speedy_defconfig
1 CONFIG_ARM=y
2 CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
3 CONFIG_SYS_ARCH_TIMER=y
4 # CONFIG_SPL_USE_ARCH_MEMCPY is not set
5 CONFIG_ARCH_ROCKCHIP=y
6 CONFIG_SYS_TEXT_BASE=0x00100000
7 CONFIG_NR_DRAM_BANKS=1
8 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy"
9 CONFIG_SPL_TEXT_BASE=0xff704000
10 CONFIG_ROCKCHIP_RK3288=y
11 # CONFIG_SPL_MMC is not set
12 CONFIG_TARGET_CHROMEBOOK_SPEEDY=y
13 CONFIG_SPL_STACK_R_ADDR=0x80000
14 CONFIG_DEBUG_UART_BASE=0xff690000
15 CONFIG_DEBUG_UART_CLOCK=24000000
16 CONFIG_SPL_SPI_FLASH_SUPPORT=y
17 CONFIG_SPL_SPI=y
18 CONFIG_SYS_LOAD_ADDR=0x800800
19 CONFIG_SPL_PAYLOAD="u-boot.img"
20 CONFIG_DEBUG_UART=y
21 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
22 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
23 CONFIG_USE_PREBOOT=y
24 CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb"
25 CONFIG_SILENT_CONSOLE=y
26 # CONFIG_DISPLAY_CPUINFO is not set
27 CONFIG_DISPLAY_BOARDINFO_LATE=y
28 CONFIG_BOARD_EARLY_INIT_R=y
29 CONFIG_SPL_PAD_TO=0x7f8000
30 CONFIG_SPL_NO_BSS_LIMIT=y
31 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
32 CONFIG_SPL_STACK_R=y
33 CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
34 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
35 # CONFIG_SPL_CRC32 is not set
36 CONFIG_SPL_SPI_LOAD=y
37 CONFIG_SYS_SPI_U_BOOT_OFFS=0x20000
38 CONFIG_CMD_GPIO=y
39 CONFIG_CMD_GPT=y
40 CONFIG_CMD_I2C=y
41 CONFIG_CMD_MMC=y
42 CONFIG_CMD_SF_TEST=y
43 CONFIG_CMD_SPI=y
44 CONFIG_CMD_USB=y
45 # CONFIG_CMD_SETEXPR is not set
46 CONFIG_CMD_CACHE=y
47 CONFIG_CMD_TIME=y
48 CONFIG_CMD_PMIC=y
49 CONFIG_CMD_REGULATOR=y
50 # CONFIG_SPL_DOS_PARTITION is not set
51 # CONFIG_SPL_EFI_PARTITION is not set
52 CONFIG_SPL_OF_CONTROL=y
53 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
54 CONFIG_SPL_OF_PLATDATA=y
55 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
56 CONFIG_REGMAP=y
57 CONFIG_SPL_REGMAP=y
58 CONFIG_SYSCON=y
59 CONFIG_SPL_SYSCON=y
60 # CONFIG_SPL_SIMPLE_BUS is not set
61 # CONFIG_SPL_BLK is not set
62 CONFIG_CLK=y
63 CONFIG_SPL_CLK=y
64 CONFIG_ROCKCHIP_GPIO=y
65 CONFIG_I2C_CROS_EC_TUNNEL=y
66 CONFIG_SYS_I2C_ROCKCHIP=y
67 CONFIG_I2C_MUX=y
68 CONFIG_DM_KEYBOARD=y
69 CONFIG_KEYBOARD=y
70 CONFIG_CROS_EC_KEYB=y
71 CONFIG_CROS_EC=y
72 CONFIG_CROS_EC_SPI=y
73 CONFIG_PWRSEQ=y
74 CONFIG_MMC_PWRSEQ=y
75 # CONFIG_SPL_DM_MMC is not set
76 CONFIG_MMC_DW=y
77 CONFIG_MMC_DW_ROCKCHIP=y
78 CONFIG_MTD=y
79 CONFIG_SF_DEFAULT_BUS=2
80 CONFIG_SF_DEFAULT_SPEED=20000000
81 CONFIG_SPI_FLASH_GIGADEVICE=y
82 CONFIG_PINCTRL=y
83 CONFIG_PINCONF=y
84 CONFIG_SPL_PINCTRL=y
85 # CONFIG_SPL_PINCTRL_FULL is not set
86 CONFIG_DM_PMIC=y
87 # CONFIG_SPL_PMIC_CHILDREN is not set
88 CONFIG_PMIC_RK8XX=y
89 CONFIG_DM_REGULATOR_FIXED=y
90 CONFIG_REGULATOR_RK8XX=y
91 CONFIG_PWM_ROCKCHIP=y
92 CONFIG_RAM=y
93 CONFIG_SPL_RAM=y
94 CONFIG_DEBUG_UART_SHIFT=2
95 CONFIG_ROCKCHIP_SERIAL=y
96 CONFIG_ROCKCHIP_SPI=y
97 CONFIG_SYSRESET=y
98 CONFIG_USB=y
99 # CONFIG_SPL_DM_USB is not set
100 CONFIG_USB_DWC2=y
101 CONFIG_ROCKCHIP_USB2_PHY=y
102 CONFIG_DM_VIDEO=y
103 # CONFIG_VIDEO_BPP8 is not set
104 CONFIG_CONSOLE_TRUETYPE=y
105 CONFIG_DISPLAY=y
106 CONFIG_VIDEO_ROCKCHIP=y
107 CONFIG_DISPLAY_ROCKCHIP_EDP=y
108 CONFIG_DISPLAY_ROCKCHIP_HDMI=y
109 # CONFIG_USE_PRIVATE_LIBGCC is not set
110 CONFIG_SPL_TINY_MEMSET=y
111 CONFIG_CMD_DHRYSTONE=y
112 CONFIG_ERRNO_STR=y