board/ti/ks2_evm/board.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Keystone : Board initialization
   4  *
   5  * (C) Copyright 2014
   6  *     Texas Instruments Incorporated, <www.ti.com>
   7  */
   8
   9 #include <common.h>
  10 #include "board.h"
  11 #include <spl.h>
  12 #include <exports.h>
  13 #include <fdt_support.h>
  14 #include <asm/arch/ddr3.h>
  15 #include <asm/arch/psc_defs.h>
  16 #include <asm/arch/clock.h>
  17 #include <asm/ti-common/ti-aemif.h>
  18 #include <asm/ti-common/keystone_net.h>
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 #if defined(CONFIG_TI_AEMIF)
  23 static struct aemif_config aemif_configs[] = {
  24         {                       /* CS0 */
  25                 .mode           = AEMIF_MODE_NAND,
  26                 .wr_setup       = 0xf,
  27                 .wr_strobe      = 0x3f,
  28                 .wr_hold        = 7,
  29                 .rd_setup       = 0xf,
  30                 .rd_strobe      = 0x3f,
  31                 .rd_hold        = 7,
  32                 .turn_around    = 3,
  33                 .width          = AEMIF_WIDTH_8,
  34         },
  35 };
  36 #endif
  37
  38 int dram_init(void)
  39 {
  40         u32 ddr3_size;
  41
  42         ddr3_size = ddr3_init();
  43
  44         gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
  45                                     CONFIG_MAX_RAM_BANK_SIZE);
  46 #if defined(CONFIG_TI_AEMIF)
  47         if (!board_is_k2g_ice())
  48                 aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
  49 #endif
  50
  51         if (!board_is_k2g_ice()) {
  52                 if (ddr3_size)
  53                         ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
  54                 else
  55                         ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE,
  56                                       gd->ram_size >> 30);
  57         }
  58
  59         return 0;
  60 }
  61
  62 int board_init(void)
  63 {
  64         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
  65
  66         return 0;
  67 }
  68
  69 #ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
  70 #ifndef CONFIG_DM_ETH
  71 int get_eth_env_param(char *env_name)
  72 {
  73         char *env;
  74         int res = -1;
  75
  76         env = env_get(env_name);
  77         if (env)
  78                 res = simple_strtol(env, NULL, 0);
  79
  80         return res;
  81 }
  82
  83 int board_eth_init(bd_t *bis)
  84 {
  85         int j;
  86         int res;
  87         int port_num;
  88         char link_type_name[32];
  89
  90         if (cpu_is_k2g())
  91                 writel(KS2_ETHERNET_RGMII, KS2_ETHERNET_CFG);
  92
  93         /* By default, select PA PLL clock as PA clock source */
  94 #ifndef CONFIG_SOC_K2G
  95         if (psc_enable_module(KS2_LPSC_PA))
  96                 return -1;
  97 #endif
  98         if (psc_enable_module(KS2_LPSC_CPGMAC))
  99                 return -1;
 100         if (psc_enable_module(KS2_LPSC_CRYPTO))
 101                 return -1;
 102
 103         if (cpu_is_k2e() || cpu_is_k2l())
 104                 pll_pa_clk_sel();
 105
 106         port_num = get_num_eth_ports();
 107
 108         for (j = 0; j < port_num; j++) {
 109                 sprintf(link_type_name, "sgmii%d_link_type", j);
 110                 res = get_eth_env_param(link_type_name);
 111                 if (res >= 0)
 112                         eth_priv_cfg[j].sgmii_link_type = res;
 113
 114                 keystone2_emac_initialize(&eth_priv_cfg[j]);
 115         }
 116
 117         return 0;
 118 }
 119 #endif
 120 #endif
 121
 122 #ifdef CONFIG_SPL_BUILD
 123 void spl_board_init(void)
 124 {
 125         spl_init_keystone_plls();
 126         preloader_console_init();
 127 }
 128
 129 u32 spl_boot_device(void)
 130 {
 131 #if defined(CONFIG_SPL_SPI_LOAD)
 132         return BOOT_DEVICE_SPI;
 133 #else
 134         puts("Unknown boot device\n");
 135         hang();
 136 #endif
 137 }
 138 #endif
 139
 140 #ifdef CONFIG_OF_BOARD_SETUP
 141 int ft_board_setup(void *blob, bd_t *bd)
 142 {
 143         int lpae;
 144         char *env;
 145         char *endp;
 146         int nbanks;
 147         u64 size[2];
 148         u64 start[2];
 149         int nodeoffset;
 150         u32 ddr3a_size;
 151         int unitrd_fixup = 0;
 152
 153         env = env_get("mem_lpae");
 154         lpae = env && simple_strtol(env, NULL, 0);
 155         env = env_get("uinitrd_fixup");
 156         unitrd_fixup = env && simple_strtol(env, NULL, 0);
 157
 158         ddr3a_size = 0;
 159         if (lpae) {
 160                 ddr3a_size = ddr3_get_size();
 161                 if ((ddr3a_size != 8) && (ddr3a_size != 4))
 162                         ddr3a_size = 0;
 163         }
 164
 165         nbanks = 1;
 166         start[0] = bd->bi_dram[0].start;
 167         size[0]  = bd->bi_dram[0].size;
 168
 169         /* adjust memory start address for LPAE */
 170         if (lpae) {
 171                 start[0] -= CONFIG_SYS_SDRAM_BASE;
 172                 start[0] += CONFIG_SYS_LPAE_SDRAM_BASE;
 173         }
 174
 175         if ((size[0] == 0x80000000) && (ddr3a_size != 0)) {
 176                 size[1] = ((u64)ddr3a_size - 2) << 30;
 177                 start[1] = 0x880000000;
 178                 nbanks++;
 179         }
 180
 181         /* reserve memory at start of bank */
 182         env = env_get("mem_reserve_head");
 183         if (env) {
 184                 start[0] += ustrtoul(env, &endp, 0);
 185                 size[0] -= ustrtoul(env, &endp, 0);
 186         }
 187
 188         env = env_get("mem_reserve");
 189         if (env)
 190                 size[0] -= ustrtoul(env, &endp, 0);
 191
 192         fdt_fixup_memory_banks(blob, start, size, nbanks);
 193
 194         /* Fix up the initrd */
 195         if (lpae && unitrd_fixup) {
 196                 int err;
 197                 u32 *prop1, *prop2;
 198                 u64 initrd_start, initrd_end;
 199
 200                 nodeoffset = fdt_path_offset(blob, "/chosen");
 201                 if (nodeoffset >= 0) {
 202                         prop1 = (u32 *)fdt_getprop(blob, nodeoffset,
 203                                             "linux,initrd-start", NULL);
 204                         prop2 = (u32 *)fdt_getprop(blob, nodeoffset,
 205                                             "linux,initrd-end", NULL);
 206                         if (prop1 && prop2) {
 207                                 initrd_start = __be32_to_cpu(*prop1);
 208                                 initrd_start -= CONFIG_SYS_SDRAM_BASE;
 209                                 initrd_start += CONFIG_SYS_LPAE_SDRAM_BASE;
 210                                 initrd_start = __cpu_to_be64(initrd_start);
 211                                 initrd_end = __be32_to_cpu(*prop2);
 212                                 initrd_end -= CONFIG_SYS_SDRAM_BASE;
 213                                 initrd_end += CONFIG_SYS_LPAE_SDRAM_BASE;
 214                                 initrd_end = __cpu_to_be64(initrd_end);
 215
 216                                 err = fdt_delprop(blob, nodeoffset,
 217                                                   "linux,initrd-start");
 218                                 if (err < 0)
 219                                         puts("error deleting initrd-start\n");
 220
 221                                 err = fdt_delprop(blob, nodeoffset,
 222                                                   "linux,initrd-end");
 223                                 if (err < 0)
 224                                         puts("error deleting initrd-end\n");
 225
 226                                 err = fdt_setprop(blob, nodeoffset,
 227                                                   "linux,initrd-start",
 228                                                   &initrd_start,
 229                                                   sizeof(initrd_start));
 230                                 if (err < 0)
 231                                         puts("error adding initrd-start\n");
 232
 233                                 err = fdt_setprop(blob, nodeoffset,
 234                                                   "linux,initrd-end",
 235                                                   &initrd_end,
 236                                                   sizeof(initrd_end));
 237                                 if (err < 0)
 238                                         puts("error adding linux,initrd-end\n");
 239                         }
 240                 }
 241         }
 242
 243         return 0;
 244 }
 245
 246 void ft_board_setup_ex(void *blob, bd_t *bd)
 247 {
 248         int lpae;
 249         u64 size;
 250         char *env;
 251         u64 *reserve_start;
 252
 253         env = env_get("mem_lpae");
 254         lpae = env && simple_strtol(env, NULL, 0);
 255
 256         if (lpae) {
 257                 /*
 258                  * the initrd and other reserved memory areas are
 259                  * embedded in in the DTB itslef. fix up these addresses
 260                  * to 36 bit format
 261                  */
 262                 reserve_start = (u64 *)((char *)blob +
 263                                        fdt_off_mem_rsvmap(blob));
 264                 while (1) {
 265                         *reserve_start = __cpu_to_be64(*reserve_start);
 266                         size = __cpu_to_be64(*(reserve_start + 1));
 267                         if (size) {
 268                                 *reserve_start -= CONFIG_SYS_SDRAM_BASE;
 269                                 *reserve_start +=
 270                                         CONFIG_SYS_LPAE_SDRAM_BASE;
 271                                 *reserve_start =
 272                                         __cpu_to_be64(*reserve_start);
 273                         } else {
 274                                 break;
 275                         }
 276                         reserve_start += 2;
 277                 }
 278         }
 279
 280         ddr3_check_ecc_int(KS2_DDR3A_EMIF_CTRL_BASE);
 281 }
 282 #endif /* CONFIG_OF_BOARD_SETUP */
 283
 284 #if defined(CONFIG_DTB_RESELECT)
 285 int __weak embedded_dtb_select(void)
 286 {
 287         return 0;
 288 }
 289 #endif