drivers, block: remove sil680 driver
[platform/kernel/u-boot.git] / board / gdsys / 405ep / neo.c
1 /*
2  * (C) Copyright 2011
3  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #include <common.h>
9 #include <command.h>
10 #include <asm/processor.h>
11 #include <asm/io.h>
12 #include <asm/ppc4xx-gpio.h>
13
14 #include "405ep.h"
15 #include <gdsys_fpga.h>
16
17 #define LATCH0_BASE (CONFIG_SYS_LATCH_BASE)
18 #define LATCH1_BASE (CONFIG_SYS_LATCH_BASE + 0x100)
19 #define LATCH2_BASE (CONFIG_SYS_LATCH_BASE + 0x200)
20
21 enum {
22         UNITTYPE_CCX16 = 1,
23         UNITTYPE_CCIP216 = 2,
24 };
25
26 enum {
27         HWVER_300 = 3,
28 };
29
30 struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR;
31
32 int misc_init_r(void)
33 {
34         /*
35          * Note: DTT has been removed. Please use UCLASS_THERMAL.
36          *
37          * startup fans
38          *
39          * dtt_init();
40          */
41
42         return 0;
43 }
44
45 int checkboard(void)
46 {
47         char *s = getenv("serial#");
48
49         puts("Board: CATCenter Neo");
50
51         if (s != NULL) {
52                 puts(", serial# ");
53                 puts(s);
54         }
55
56         puts("\n");
57
58         return 0;
59 }
60
61 static void print_fpga_info(void)
62 {
63         u16 versions;
64         u16 fpga_version;
65         u16 fpga_features;
66         int fpga_state = get_fpga_state(0);
67         unsigned unit_type;
68         unsigned hardware_version;
69         unsigned feature_channels;
70
71         puts("FPGA:  ");
72         if (fpga_state & FPGA_STATE_DONE_FAILED) {
73                 printf(" done timed out\n");
74                 return;
75         }
76
77         if (fpga_state & FPGA_STATE_REFLECTION_FAILED) {
78                 printf(" refelectione test failed\n");
79                 return;
80         }
81
82         FPGA_GET_REG(0, versions, &versions);
83         FPGA_GET_REG(0, fpga_version, &fpga_version);
84         FPGA_GET_REG(0, fpga_features, &fpga_features);
85
86         unit_type = (versions & 0xf000) >> 12;
87         hardware_version = versions & 0x000f;
88         feature_channels = fpga_features & 0x007f;
89
90         switch (unit_type) {
91         case UNITTYPE_CCX16:
92                 printf("CCX-Switch");
93                 break;
94
95         default:
96                 printf("UnitType %d(not supported)", unit_type);
97                 break;
98         }
99
100         switch (hardware_version) {
101         case HWVER_300:
102                 printf(" HW-Ver 3.00-3.12\n");
103                 break;
104
105         default:
106                 printf(" HW-Ver %d(not supported)\n",
107                        hardware_version);
108                 break;
109         }
110
111         printf("       FPGA V %d.%02d, features:",
112                 fpga_version / 100, fpga_version % 100);
113
114         printf(" %d channel(s)\n", feature_channels);
115 }
116
117 int last_stage_init(void)
118 {
119         print_fpga_info();
120
121         return 0;
122 }
123
124 void gd405ep_init(void)
125 {
126 }
127
128 void gd405ep_set_fpga_reset(unsigned state)
129 {
130         if (state) {
131                 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_RESET);
132                 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_RESET);
133         } else {
134                 out_le16((void *)LATCH0_BASE, CONFIG_SYS_LATCH0_BOOT);
135                 out_le16((void *)LATCH1_BASE, CONFIG_SYS_LATCH1_BOOT);
136         }
137 }
138
139 void gd405ep_setup_hw(void)
140 {
141         /*
142          * set "startup-finished"-gpios
143          */
144         gpio_write_bit(21, 0);
145         gpio_write_bit(22, 1);
146 }
147
148 int gd405ep_get_fpga_done(unsigned fpga)
149 {
150         /*
151          * Neo hardware has no FPGA-DONE GPIO
152          */
153         return 1;
154 }