1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014 Freescale Semiconductor, Inc.
7 #include <asm/immap_85xx.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 void __weak board_mem_sleep_setup(void)
19 void __weak board_sleep_prepare(void)
23 bool is_warm_boot(void)
25 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
27 if (in_be32(&gur->scrtsr[0]) & DCFG_CCSR_CRSTSR_WDRFR)
33 void fsl_dp_disable_console(void)
35 gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
39 * When wakeup from deep sleep, the first 128 bytes space
40 * will be used to do DDR training which corrupts the data
41 * in there. This function will restore them.
43 static void dp_ddr_restore(void)
47 struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
49 /* get the address of ddr date from SPARECR3 */
50 src = (u64 *)(in_be32(&scfg->sparecr[2]) + DDR_BUFF_LEN - 8);
51 dst = (u64 *)(CONFIG_SYS_SDRAM_BASE + DDR_BUFF_LEN - 8);
53 for (i = 0; i < DDR_BUFF_LEN / 8; i++)
59 static void dp_resume_prepare(void)
63 board_sleep_prepare();
66 #if defined(CONFIG_RAMBOOT_PBL)
77 int fsl_dp_resume(void)
80 void (*kernel_resume)(void);
81 struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_MPC85xx_SCFG;
88 /* Get the entry address and jump to kernel */
89 start_addr = in_be32(&scfg->sparecr[1]);
90 debug("Entry address is 0x%08x\n", start_addr);
91 kernel_resume = (void (*)(void))start_addr;