2 * (C) Copyright 2006 DENX Software Engineering
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
26 #ifdef CONFIG_NEW_NAND_CODE
27 /* new NAND handling */
32 * hardware specific access to control-lines
33 * function borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
35 static void ppchameleonevb_hwcontrol(struct mtd_info *mtdinfo, int cmd)
37 struct nand_chip *this = mtdinfo->priv;
38 ulong base = (ulong) this->IO_ADDR_W;
42 MACRO_NAND_CTL_SETCLE((unsigned long)base);
45 MACRO_NAND_CTL_CLRCLE((unsigned long)base);
48 MACRO_NAND_CTL_SETALE((unsigned long)base);
51 MACRO_NAND_CTL_CLRALE((unsigned long)base);
54 MACRO_NAND_ENABLE_CE((unsigned long)base);
57 MACRO_NAND_DISABLE_CE((unsigned long)base);
64 * read device ready pin
65 * function +/- borrowed from Linux 2.6 (drivers/mtd/nand/ppchameleonevb.c)
67 static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
69 struct nand_chip *this = mtdinfo->priv;
72 /* use the base addr to find out which chip are we dealing with */
73 switch((ulong) this->IO_ADDR_W) {
75 rb_gpio_pin = CFG_NAND0_RDY;
78 rb_gpio_pin = CFG_NAND1_RDY;
80 default: /* this should never happen */
85 if (in32(GPIO0_IR) & rb_gpio_pin)
92 * Board-specific NAND initialization. The following members of the
93 * argument are board-specific (per include/linux/mtd/nand_new.h):
94 * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
95 * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
96 * - hwcontrol: hardwarespecific function for accesing control-lines
97 * - dev_ready: hardwarespecific function for accesing device ready/busy line
98 * - enable_hwecc?: function to enable (reset) hardware ecc generator. Must
99 * only be provided if a hardware ECC is available
100 * - eccmode: mode of ecc, see defines
101 * - chip_delay: chip dependent delay for transfering data from array to
103 * - options: various chip options. They can partly be set to inform
104 * nand_scan about special functionality. See the defines for further
106 * Members with a "?" were not set in the merged testing-NAND branch,
107 * so they are not set here either.
109 void board_nand_init(struct nand_chip *nand)
112 nand->hwcontrol = ppchameleonevb_hwcontrol;
113 nand->dev_ready = ppchameleonevb_device_ready;
114 nand->eccmode = NAND_ECC_SOFT;
115 nand->chip_delay = NAND_BIG_DELAY_US;
116 nand->options = NAND_SAMSUNG_LP_OPTIONS;
121 /* old NAND handling */
123 nand_probe(ulong physadr);
131 The HI model is equipped with a large block NAND chip not supported yet
133 (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
136 #if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME)
137 debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
138 totlen += nand_probe (CFG_NAND0_BASE);
139 #endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
141 debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
142 totlen += nand_probe (CFG_NAND1_BASE);
144 printf ("%3lu MB\n", totlen >>20);