arch/x86/include/asm/arch-broadwell/iomap.h

   1 /*
   2  * From Coreboot soc/intel/broadwell/include/soc/iomap.h
   3  *
   4  * Copyright (C) 2016 Google Inc.
   5  *
   6  * SPDX-License-Identifier:     BSD-3-Clause
   7  */
   8
   9 #ifndef __asm_arch_iomap_h
  10 #define __asm_arch_iomap_h
  11
  12 #define MCFG_BASE_ADDRESS       0xf0000000
  13 #define MCFG_BASE_SIZE          0x4000000
  14
  15 #define HPET_BASE_ADDRESS       0xfed00000
  16
  17 #define MCH_BASE_ADDRESS        0xfed10000
  18 #define MCH_BASE_SIZE           0x8000
  19
  20 #define DMI_BASE_ADDRESS        0xfed18000
  21 #define DMI_BASE_SIZE           0x1000
  22
  23 #define EP_BASE_ADDRESS         0xfed19000
  24 #define EP_BASE_SIZE            0x1000
  25
  26 #define EDRAM_BASE_ADDRESS      0xfed80000
  27 #define EDRAM_BASE_SIZE         0x4000
  28
  29 #define GDXC_BASE_ADDRESS       0xfed84000
  30 #define GDXC_BASE_SIZE          0x1000
  31
  32 #define RCBA_BASE_ADDRESS       0xfed1c000
  33 #define RCBA_BASE_SIZE          0x4000
  34
  35 #define HPET_BASE_ADDRESS       0xfed00000
  36
  37 #define ACPI_BASE_ADDRESS       0x1000
  38 #define ACPI_BASE_SIZE          0x100
  39
  40 #define GPIO_BASE_ADDRESS       0x1400
  41 #define GPIO_BASE_SIZE          0x400
  42
  43 #define SMBUS_BASE_ADDRESS      0x0400
  44 #define SMBUS_BASE_SIZE         0x10
  45
  46 /* Temporary addresses used before relocation */
  47 #define EARLY_GTT_BAR           0xe0000000
  48 #define EARLY_XHCI_BAR          0xd7000000
  49 #define EARLY_EHCI_BAR          0xd8000000
  50 #define EARLY_UART_BAR          0x3f8
  51 #define EARLY_TEMP_MMIO         0xfed08000
  52
  53 #endif