6 bool "Enable machine check int on mcp"
9 bool "Enable cache parity errors"
12 bool "Enable address parity checking"
15 bool "Enable data parity checking"
18 prompt "HID0 clock configuration"
20 config HID0_INIT_CLKOUT_OFF
21 bool "Clock output off"
23 config HID0_INIT_CLKOUT_CORE_HALF
26 config HID0_INIT_CLKOUT_CORE
29 config HID0_INIT_CLKOUT_BUS
35 bool "Disable precharge of artry_out"
38 bool "Enable doze mode"
41 bool "Enable nap mode"
43 config HID0_INIT_SLEEP
44 bool "Enable sleep mode"
47 bool "Enable dynamic power management"
50 bool "Enable instruction cache"
53 bool "Enable data cache"
55 config HID0_INIT_ILOCK
56 bool "Lock instruction cache"
58 config HID0_INIT_DLOCK
59 bool "Lock data cache"
62 bool "Flash invalidate instruction cache"
65 bool "Flash invalidate data cache"
68 bool "Enable m bit on bus for instruction fetches"
70 config HID0_INIT_DECAREN
71 bool "Decrementer auto reload"
73 config HID0_INIT_FBIOB
74 bool "Force indirect branch on the bus"
77 bool "Enable address broadcast"
79 config HID0_INIT_NOOPTI
80 bool "No-op data cache touch intructions"
86 config HID0_FINAL_EMCP
87 bool "Enable machine check int on mcp"
89 config HID0_FINAL_ECPE
90 bool "Enable cache parity errors"
93 bool "Enable address parity checking"
96 bool "Enable data parity checking"
99 prompt "HID0 clock configuration"
101 config HID0_FINAL_CLKOUT_OFF
102 bool "Clock output off"
104 config HID0_FINAL_CLKOUT_CORE_HALF
105 bool "Core clock / 2"
107 config HID0_FINAL_CLKOUT_CORE
110 config HID0_FINAL_CLKOUT_BUS
115 config HID0_FINAL_PAR
116 bool "Disable precharge of artry_out"
118 config HID0_FINAL_DOZE
119 bool "Enable doze mode"
121 config HID0_FINAL_NAP
122 bool "Enable nap mode"
124 config HID0_FINAL_SLEEP
125 bool "Enable sleep mode"
127 config HID0_FINAL_DPM
128 bool "Enable dynamic power management"
130 config HID0_FINAL_ICE
131 bool "Enable instruction cache"
133 config HID0_FINAL_DCE
134 bool "Enable data cache"
136 config HID0_FINAL_ILOCK
137 bool "Lock instruction cache"
139 config HID0_FINAL_DLOCK
140 bool "Lock data cache"
142 config HID0_FINAL_ICFI
143 bool "Flash invalidate instruction cache"
145 config HID0_FINAL_DCFI
146 bool "Flash invalidate data cache"
148 config HID0_FINAL_IFEM
149 bool "Enable m bit on bus for instruction fetches"
151 config HID0_FINAL_DECAREN
152 bool "Decrementer auto reload"
154 config HID0_FINAL_FBIOB
155 bool "Force indirect branch on the bus"
157 config HID0_FINAL_ABE
158 bool "Enable address broadcast"
160 config HID0_FINAL_NOOPTI
161 bool "No-op data cache touch intructions"
165 config HID0_INIT_EMCP_BIT
167 default 0x0 if !HID0_INIT_EMCP
168 default 0x80000000 if HID0_INIT_EMCP
170 config HID0_INIT_ECPE_BIT
172 default 0x0 if !HID0_INIT_ECPE
173 default 0x40000000 if HID0_INIT_ECPE
175 config HID0_INIT_EBA_BIT
177 default 0x0 if !HID0_INIT_EBA
178 default 0x20000000 if HID0_INIT_EBA
180 config HID0_INIT_EBD_BIT
182 default 0x0 if !HID0_INIT_EBD
183 default 0x10000000 if HID0_INIT_EBD
185 config HID0_INIT_CLKOUT
187 default 0x0 if HID0_INIT_CLKOUT_OFF
188 default 0x8000000 if HID0_INIT_CLKOUT_CORE_HALF
189 default 0x2000000 if HID0_INIT_CLKOUT_CORE
190 default 0xa000000 if HID0_INIT_CLKOUT_BUS
192 config HID0_INIT_PAR_BIT
194 default 0x0 if !HID0_INIT_PAR
195 default 0x1000000 if HID0_INIT_PAR
197 config HID0_INIT_DOZE_BIT
199 default 0x0 if !HID0_INIT_DOZE
200 default 0x800000 if HID0_INIT_DOZE
202 config HID0_INIT_NAP_BIT
204 default 0x0 if !HID0_INIT_NAP
205 default 0x400000 if HID0_INIT_NAP
207 config HID0_INIT_SLEEP_BIT
209 default 0x0 if !HID0_INIT_SLEEP
210 default 0x200000 if HID0_INIT_SLEEP
212 config HID0_INIT_DPM_BIT
214 default 0x0 if !HID0_INIT_DPM
215 default 0x100000 if HID0_INIT_DPM
217 config HID0_INIT_ICE_BIT
219 default 0x0 if !HID0_INIT_ICE
220 default 0x8000 if HID0_INIT_ICE
222 config HID0_INIT_DCE_BIT
224 default 0x0 if !HID0_INIT_DCE
225 default 0x4000 if HID0_INIT_DCE
227 config HID0_INIT_ILOCK_BIT
229 default 0x0 if !HID0_INIT_ILOCK
230 default 0x2000 if HID0_INIT_ILOCK
232 config HID0_INIT_DLOCK_BIT
234 default 0x0 if !HID0_INIT_DLOCK
235 default 0x1000 if HID0_INIT_DLOCK
237 config HID0_INIT_ICFI_BIT
239 default 0x0 if !HID0_INIT_ICFI
240 default 0x800 if HID0_INIT_ICFI
242 config HID0_INIT_DCFI_BIT
244 default 0x0 if !HID0_INIT_DCFI
245 default 0x400 if HID0_INIT_DCFI
247 config HID0_INIT_IFEM_BIT
249 default 0x0 if !HID0_INIT_IFEM
250 default 0x80 if HID0_INIT_IFEM
252 config HID0_INIT_DECAREN_BIT
254 default 0x0 if !HID0_INIT_DECAREN
255 default 0x40 if HID0_INIT_DECAREN
257 config HID0_INIT_FBIOB_BIT
259 default 0x0 if !HID0_INIT_FBIOB
260 default 0x10 if HID0_INIT_FBIOB
262 config HID0_INIT_ABE_BIT
264 default 0x0 if !HID0_INIT_ABE
265 default 0x8 if HID0_INIT_ABE
267 config HID0_INIT_NOOPTI_BIT
269 default 0x0 if !HID0_INIT_NOOPTI
270 default 0x1 if HID0_INIT_NOOPTI
272 config HID0_FINAL_EMCP_BIT
274 default 0x0 if !HID0_FINAL_EMCP
275 default 0x80000000 if HID0_FINAL_EMCP
277 config HID0_FINAL_ECPE_BIT
279 default 0x0 if !HID0_FINAL_ECPE
280 default 0x40000000 if HID0_FINAL_ECPE
282 config HID0_FINAL_EBA_BIT
284 default 0x0 if !HID0_FINAL_EBA
285 default 0x20000000 if HID0_FINAL_EBA
287 config HID0_FINAL_EBD_BIT
289 default 0x0 if !HID0_FINAL_EBD
290 default 0x10000000 if HID0_FINAL_EBD
292 config HID0_FINAL_CLKOUT
294 default 0x0 if HID0_FINAL_CLKOUT_OFF
295 default 0x8000000 if HID0_FINAL_CLKOUT_CORE_HALF
296 default 0x2000000 if HID0_FINAL_CLKOUT_CORE
297 default 0xa000000 if HID0_FINAL_CLKOUT_BUS
299 config HID0_FINAL_SBCLK_BIT
301 default 0x0 if !HID0_FINAL_SBCLK
302 default 0x8000000 if HID0_FINAL_SBCLK
304 config HID0_FINAL_ECLK_BIT
306 default 0x0 if !HID0_FINAL_ECLK
307 default 0x2000000 if HID0_FINAL_ECLK
309 config HID0_FINAL_PAR_BIT
311 default 0x0 if !HID0_FINAL_PAR
312 default 0x1000000 if HID0_FINAL_PAR
314 config HID0_FINAL_DOZE_BIT
316 default 0x0 if !HID0_FINAL_DOZE
317 default 0x800000 if HID0_FINAL_DOZE
319 config HID0_FINAL_NAP_BIT
321 default 0x0 if !HID0_FINAL_NAP
322 default 0x400000 if HID0_FINAL_NAP
324 config HID0_FINAL_SLEEP_BIT
326 default 0x0 if !HID0_FINAL_SLEEP
327 default 0x200000 if HID0_FINAL_SLEEP
329 config HID0_FINAL_DPM_BIT
331 default 0x0 if !HID0_FINAL_DPM
332 default 0x100000 if HID0_FINAL_DPM
334 config HID0_FINAL_ICE_BIT
336 default 0x0 if !HID0_FINAL_ICE
337 default 0x8000 if HID0_FINAL_ICE
339 config HID0_FINAL_DCE_BIT
341 default 0x0 if !HID0_FINAL_DCE
342 default 0x4000 if HID0_FINAL_DCE
344 config HID0_FINAL_ILOCK_BIT
346 default 0x0 if !HID0_FINAL_ILOCK
347 default 0x2000 if HID0_FINAL_ILOCK
349 config HID0_FINAL_DLOCK_BIT
351 default 0x0 if !HID0_FINAL_DLOCK
352 default 0x1000 if HID0_FINAL_DLOCK
354 config HID0_FINAL_ICFI_BIT
356 default 0x0 if !HID0_FINAL_ICFI
357 default 0x800 if HID0_FINAL_ICFI
359 config HID0_FINAL_DCFI_BIT
361 default 0x0 if !HID0_FINAL_DCFI
362 default 0x400 if HID0_FINAL_DCFI
364 config HID0_FINAL_IFEM_BIT
366 default 0x0 if !HID0_FINAL_IFEM
367 default 0x80 if HID0_FINAL_IFEM
369 config HID0_FINAL_DECAREN_BIT
371 default 0x0 if !HID0_FINAL_DECAREN
372 default 0x40 if HID0_FINAL_DECAREN
374 config HID0_FINAL_FBIOB_BIT
376 default 0x0 if !HID0_FINAL_FBIOB
377 default 0x10 if HID0_FINAL_FBIOB
379 config HID0_FINAL_ABE_BIT
381 default 0x0 if !HID0_FINAL_ABE
382 default 0x8 if HID0_FINAL_ABE
384 config HID0_FINAL_NOOPTI_BIT
386 default 0x0 if !HID0_FINAL_NOOPTI
387 default 0x1 if HID0_FINAL_NOOPTI
392 bool "True little-endian mode"
395 bool "Instruction fetch burst extension"
397 config HID2_MESISTATE
398 bool "MESI state enable"
401 bool "Instruction fetch cancel extension"
404 bool "BIU queue sharing"
407 bool "BIU pipeline extension"
415 bool "No kill for snoop"
420 bool "High bat enable"
423 prompt "Instruction cache way-lock"
425 config HID2_IWLCK_NONE
426 bool "No ways locked"
432 bool "Way 0 through 1 locked"
435 bool "Way 0 through 2 locked"
437 if ARCH_MPC8360 || ARCH_MPC8379
440 bool "Way 0 through 3 locked"
443 bool "Way 0 through 4 locked"
446 bool "Way 0 through 5 locked"
449 bool "Way 0 through 6 locked"
456 bool "Instruction cache way protection"
459 prompt "Data cache way-lock"
461 config HID2_DWLCK_NONE
462 bool "No ways locked"
468 bool "Way 0 through 1 locked"
471 bool "Way 0 through 2 locked"
473 if ARCH_MPC8360 || ARCH_MPC8379
476 bool "Way 0 through 3 locked"
479 bool "Way 0 through 4 locked"
482 bool "Way 0 through 5 locked"
485 bool "Way 0 through 6 locked"
493 default 0x0 if !HID2_LET
494 default 0x8000000 if HID2_LET
498 default 0x0 if !HID2_IFEB
499 default 0x4000000 if HID2_IFEB
501 config HID2_MESISTATE_BIT
503 default 0x0 if !HID2_MESISTATE
504 default 0x1000000 if HID2_MESISTATE
508 default 0x0 if !HID2_IFEC
509 default 0x800000 if HID2_IFEC
513 default 0x0 if !HID2_EBQS
514 default 0x400000 if HID2_EBQS
518 default 0x0 if !HID2_EBPX
519 default 0x200000 if HID2_EBPX
523 default 0x0 if !HID2_ELRW
524 default 0x100000 if HID2_ELRW
528 default 0x0 if !HID2_NOKS
529 default 0x80000 if HID2_NOKS
533 default 0x0 if !HID2_HBE
534 default 0x40000 if HID2_HBE
538 default 0x0 if HID2_IWLCK_NONE
539 default 0x2000 if HID2_IWLCK_0
540 default 0x4000 if HID2_IWLCK_1
541 default 0x6000 if HID2_IWLCK_2
542 default 0x8000 if HID2_IWLCK_3
543 default 0xA000 if HID2_IWLCK_4
544 default 0xC000 if HID2_IWLCK_5
545 default 0xE000 if HID2_IWLCK_6
549 default 0x0 if !HID2_ICWP
550 default 0x1000 if HID2_ICWP
554 default 0x0 if HID2_DWLCK_NONE
555 default 0x20 if HID2_DWLCK_0
556 default 0x40 if HID2_DWLCK_1
557 default 0x60 if HID2_DWLCK_2
558 default 0x80 if HID2_DWLCK_3
559 default 0xA0 if HID2_DWLCK_4
560 default 0xC0 if HID2_DWLCK_5
561 default 0xE0 if HID2_DWLCK_6