arch/powerpc/cpu/mpc83xx/fdt.c

   1 /*
   2  * Copyright 2007 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <linux/libfdt.h>
  12 #include <fdt_support.h>
  13 #include <asm/processor.h>
  14
  15 extern void ft_qe_setup(void *blob);
  16
  17 DECLARE_GLOBAL_DATA_PTR;
  18
  19 #if defined(CONFIG_BOOTCOUNT_LIMIT) && \
  20         (defined(CONFIG_QE) && !defined(CONFIG_MPC831x))
  21 #include <linux/immap_qe.h>
  22
  23 void fdt_fixup_muram (void *blob)
  24 {
  25         ulong data[2];
  26
  27         data[0] = 0;
  28         data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
  29         do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
  30                         data, sizeof (data), 0);
  31 }
  32 #endif
  33
  34 void ft_cpu_setup(void *blob, bd_t *bd)
  35 {
  36         immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  37         int spridr = immr->sysconf.spridr;
  38
  39         /*
  40          * delete crypto node if not on an E-processor
  41          * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
  42          * EA revisions got the SEC uprevved to 2.4 but since the default device
  43          * tree contains SEC 2.0 properties we uprev them here.
  44          */
  45         if (!IS_E_PROCESSOR(spridr))
  46                 fdt_fixup_crypto_node(blob, 0);
  47         else if (IS_E_PROCESSOR(spridr) &&
  48                  (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
  49                   SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
  50                  REVID_MAJOR(spridr) >= 2)
  51                 fdt_fixup_crypto_node(blob, 0x0204);
  52
  53 #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
  54     defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
  55     defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
  56 #ifdef CONFIG_MPC8313
  57         /*
  58         * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
  59         * h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
  60         * so if on Rev. 2 (and higher) h/w, we fix them up here
  61         */
  62         if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
  63                 int nodeoffset, path;
  64                 const char *prop;
  65
  66                 nodeoffset = fdt_path_offset(blob, "/aliases");
  67                 if (nodeoffset >= 0) {
  68 #if defined(CONFIG_HAS_ETH0)
  69                         prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
  70                         if (prop) {
  71                                 u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
  72
  73                                 path = fdt_path_offset(blob, prop);
  74                                 prop = fdt_getprop(blob, path, "interrupts",
  75                                                    NULL);
  76                                 if (prop)
  77                                         fdt_setprop(blob, path, "interrupts",
  78                                                     &tmp, sizeof(tmp));
  79                         }
  80 #endif
  81 #if defined(CONFIG_HAS_ETH1)
  82                         prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
  83                         if (prop) {
  84                                 u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
  85
  86                                 path = fdt_path_offset(blob, prop);
  87                                 prop = fdt_getprop(blob, path, "interrupts",
  88                                                    NULL);
  89                                 if (prop)
  90                                         fdt_setprop(blob, path, "interrupts",
  91                                                     &tmp, sizeof(tmp));
  92                         }
  93 #endif
  94                 }
  95         }
  96 #endif
  97 #endif
  98
  99         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 100                 "timebase-frequency", (bd->bi_busfreq / 4), 1);
 101         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 102                 "bus-frequency", bd->bi_busfreq, 1);
 103         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 104                 "clock-frequency", gd->arch.core_clk, 1);
 105         do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
 106                 "bus-frequency", bd->bi_busfreq, 1);
 107         do_fixup_by_compat_u32(blob, "fsl,soc",
 108                 "bus-frequency", bd->bi_busfreq, 1);
 109         do_fixup_by_compat_u32(blob, "fsl,soc",
 110                 "clock-frequency", bd->bi_busfreq, 1);
 111         do_fixup_by_compat_u32(blob, "fsl,immr",
 112                 "bus-frequency", bd->bi_busfreq, 1);
 113         do_fixup_by_compat_u32(blob, "fsl,immr",
 114                 "clock-frequency", bd->bi_busfreq, 1);
 115 #ifdef CONFIG_QE
 116         ft_qe_setup(blob);
 117 #endif
 118
 119 #ifdef CONFIG_SYS_NS16550
 120         do_fixup_by_compat_u32(blob, "ns16550",
 121                 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 122 #endif
 123
 124         fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 125
 126 #if defined(CONFIG_BOOTCOUNT_LIMIT) && \
 127         (defined(CONFIG_QE) && !defined(CONFIG_MPC831x))
 128         fdt_fixup_muram (blob);
 129 #endif
 130 }