4fbbcec1530dc7de5647831e5758b05b4170f85f
[platform/kernel/u-boot.git] / arch / mips / dts / brcm,bcm6328.dtsi
1 /*
2  * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <dt-bindings/clock/bcm6328-clock.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
11 #include "skeleton.dtsi"
12
13 / {
14         compatible = "brcm,bcm6328";
15
16         aliases {
17                 spi0 = &spi;
18         };
19
20         cpus {
21                 reg = <0x10000000 0x4>;
22                 #address-cells = <1>;
23                 #size-cells = <0>;
24                 u-boot,dm-pre-reloc;
25
26                 cpu@0 {
27                         compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
28                         device_type = "cpu";
29                         reg = <0>;
30                         u-boot,dm-pre-reloc;
31                 };
32
33                 cpu@1 {
34                         compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
35                         device_type = "cpu";
36                         reg = <1>;
37                         u-boot,dm-pre-reloc;
38                 };
39         };
40
41         clocks {
42                 compatible = "simple-bus";
43                 #address-cells = <1>;
44                 #size-cells = <1>;
45                 u-boot,dm-pre-reloc;
46
47                 hsspi_pll: hsspi-pll {
48                         compatible = "fixed-clock";
49                         #clock-cells = <0>;
50                         clock-frequency = <133333333>;
51                 };
52
53                 periph_osc: periph-osc {
54                         compatible = "fixed-clock";
55                         #clock-cells = <0>;
56                         clock-frequency = <50000000>;
57                         u-boot,dm-pre-reloc;
58                 };
59
60                 periph_clk: periph-clk {
61                         compatible = "brcm,bcm6345-clk";
62                         reg = <0x10000004 0x4>;
63                         #clock-cells = <1>;
64                 };
65         };
66
67         ubus {
68                 compatible = "simple-bus";
69                 #address-cells = <1>;
70                 #size-cells = <1>;
71                 u-boot,dm-pre-reloc;
72
73                 periph_rst: reset-controller@10000010 {
74                         compatible = "brcm,bcm6345-reset";
75                         reg = <0x10000010 0x4>;
76                         #reset-cells = <1>;
77                 };
78
79                 pll_cntl: syscon@10000068 {
80                         compatible = "syscon";
81                         reg = <0x10000068 0x4>;
82                 };
83
84                 syscon-reboot {
85                         compatible = "syscon-reboot";
86                         regmap = <&pll_cntl>;
87                         offset = <0x0>;
88                         mask = <0x1>;
89                 };
90
91                 wdt: watchdog@1000005c {
92                         compatible = "brcm,bcm6345-wdt";
93                         reg = <0x1000005c 0xc>;
94                         clocks = <&periph_osc>;
95                 };
96
97                 wdt-reboot {
98                         compatible = "wdt-reboot";
99                         wdt = <&wdt>;
100                 };
101
102                 gpio: gpio-controller@10000084 {
103                         compatible = "brcm,bcm6345-gpio";
104                         reg = <0x10000084 0x4>, <0x1000008c 0x4>;
105                         gpio-controller;
106                         #gpio-cells = <2>;
107
108                         status = "disabled";
109                 };
110
111                 uart0: serial@10000100 {
112                         compatible = "brcm,bcm6345-uart";
113                         reg = <0x10000100 0x18>;
114                         clocks = <&periph_osc>;
115
116                         status = "disabled";
117                 };
118
119                 uart1: serial@10000120 {
120                         compatible = "brcm,bcm6345-uart";
121                         reg = <0x10000120 0x18>;
122                         clocks = <&periph_osc>;
123
124                         status = "disabled";
125                 };
126
127                 leds: led-controller@10000800 {
128                         compatible = "brcm,bcm6328-leds";
129                         reg = <0x10000800 0x24>;
130                         #address-cells = <1>;
131                         #size-cells = <0>;
132
133                         status = "disabled";
134                 };
135
136                 spi: spi@10001000 {
137                         compatible = "brcm,bcm6328-hsspi";
138                         #address-cells = <1>;
139                         #size-cells = <0>;
140                         reg = <0x10001000 0x600>;
141                         clocks = <&periph_clk BCM6328_CLK_HSSPI>, <&hsspi_pll>;
142                         clock-names = "hsspi", "pll";
143                         resets = <&periph_rst BCM6328_RST_SPI>;
144                         spi-max-frequency = <33333334>;
145                         num-cs = <3>;
146
147                         status = "disabled";
148                 };
149
150                 periph_pwr: power-controller@10001848 {
151                         compatible = "brcm,bcm6328-power-domain";
152                         reg = <0x10001848 0x4>;
153                         #power-domain-cells = <1>;
154                 };
155
156                 ehci: usb-controller@10002500 {
157                         compatible = "brcm,bcm6328-ehci", "generic-ehci";
158                         reg = <0x10002500 0x100>;
159                         phys = <&usbh>;
160                         big-endian;
161
162                         status = "disabled";
163                 };
164
165                 ohci: usb-controller@10002600 {
166                         compatible = "brcm,bcm6328-ohci", "generic-ohci";
167                         reg = <0x10002600 0x100>;
168                         phys = <&usbh>;
169                         big-endian;
170
171                         status = "disabled";
172                 };
173
174                 usbh: usb-phy@10002700 {
175                         compatible = "brcm,bcm6328-usbh";
176                         reg = <0x10002700 0x38>;
177                         #phy-cells = <0>;
178                         clocks = <&periph_clk BCM6328_CLK_USBH>;
179                         clock-names = "usbh";
180                         power-domains = <&periph_pwr BCM6328_PWR_USBH>;
181                         resets = <&periph_rst BCM6328_RST_USBH>;
182
183                         status = "disabled";
184                 };
185
186                 memory-controller@10003000 {
187                         compatible = "brcm,bcm6328-mc";
188                         reg = <0x10003000 0x864>;
189                         u-boot,dm-pre-reloc;
190                 };
191         };
192 };