1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
6 * Copyright 2010-2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
11 #include <asm-offsets.h>
13 #include <asm/cache.h>
19 move.w #0x2700,%sr; /* disable intrs */ \
20 subl #60,%sp; /* space for 15 regs */ \
21 moveml %d0-%d7/%a0-%a6,%sp@;
24 moveml %sp@,%d0-%d7/%a0-%a6; \
25 addl #60,%sp; /* space for 15 regs */ \
28 #if defined(CONFIG_SERIAL_BOOT)
29 #define ASM_DRAMINIT (asm_dram_init - CONFIG_TEXT_BASE + \
30 CFG_SYS_INIT_RAM_ADDR)
31 #define ASM_DRAMINIT_N (asm_dram_init - CONFIG_TEXT_BASE)
32 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_TEXT_BASE + \
33 CFG_SYS_INIT_RAM_ADDR)
39 * Vector table. This is used for initial platform startup.
40 * These vectors are to catch any un-intended traps.
43 #if defined(CONFIG_SERIAL_BOOT)
45 INITSP: .long 0 /* Initial SP */
47 INITPC: .long ASM_DRAMINIT /* Initial PC */
49 #ifdef CONFIG_SYS_NAND_BOOT
50 INITPC: .long ASM_DRAMINIT_N /* Initial PC */
55 INITSP: .long 0 /* Initial SP */
56 INITPC: .long _START /* Initial PC */
61 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 #if !defined(CONFIG_SERIAL_BOOT)
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114 #if defined(CONFIG_SERIAL_BOOT)
115 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
117 .long 0x00000000 /* checksum, not yet implemented */
118 .long 0x00040000 /* image length */
119 .long CONFIG_TEXT_BASE /* image to be relocated at */
122 move.w #0x2700,%sr /* Mask off Interrupt */
124 #ifdef CONFIG_SYS_NAND_BOOT
125 /* for assembly stack */
126 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
129 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_SP_OFFSET), %sp
134 move.l #CFG_SYS_INIT_RAM_ADDR, %d0
137 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
140 /* initialize general use internal ram */
142 move.l #(ICACHE_STATUS), %a1 /* icache */
143 move.l #(DCACHE_STATUS), %a2 /* dcache */
147 /* invalidate and disable cache */
148 move.l #(CFG_SYS_ICACHE_INV + CFG_SYS_DCACHE_INV), %d0
149 movec %d0, %CACR /* Invalidate cache */
156 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_SP_OFFSET), %sp
159 #ifdef CFG_SYS_CS0_BASE
160 /* Must disable global address */
161 move.l #0xFC008000, %a1
162 move.l #(CFG_SYS_CS0_BASE), (%a1)
163 move.l #0xFC008008, %a1
164 move.l #(CFG_SYS_CS0_CTRL), (%a1)
165 move.l #0xFC008004, %a1
166 move.l #(CFG_SYS_CS0_MASK), (%a1)
168 #endif /* CONFIG_CF_SBF */
170 #ifdef CONFIG_MCF5441x
171 /* TC: enable all peripherals,
172 in the future only enable certain peripherals */
173 move.l #0xFC04002D, %a1
175 #if defined(CONFIG_CF_SBF)
176 move.b #23, (%a1) /* dspi */
178 #endif /* CONFIG_MCF5441x */
180 /* mandatory board level ddr-sdram init,
181 * for both 5441x and 5445x
187 * DSPI Initialization
188 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
194 /* Enable pins for DSPI mode - chip-selects are enabled later */
196 #ifdef CONFIG_MCF5441x
197 move.l #0xEC09404E, %a1
198 move.l #0xEC09404F, %a2
203 /* Configure DSPI module */
204 move.l #0xFC05C000, %a0
205 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
207 move.l #0xFC05C00C, %a0
208 #ifdef CONFIG_MCF5441x
209 move.l #0x3E000016, (%a0)
212 move.l #0xFC05C034, %a2 /* dtfr */
213 move.l #0xFC05C03B, %a3 /* drfr */
215 move.l #(ASM_SBF_IMG_HDR + 4), %a1
219 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_SBFHDR_DATA_OFFSET), %a0
220 move.l #(CFG_SYS_SBFHDR_SIZE), %d4
222 move.l #0xFC05C02C, %a1 /* dspi status */
224 /* Issue commands and address */
225 move.l #0x8002000B, %d2 /* Fast Read Cmd */
226 jsr asm_dspi_wr_status
227 jsr asm_dspi_rd_status
229 move.l #0x80020000, %d2 /* Address byte 2 */
230 jsr asm_dspi_wr_status
231 jsr asm_dspi_rd_status
233 move.l #0x80020000, %d2 /* Address byte 1 */
234 jsr asm_dspi_wr_status
235 jsr asm_dspi_rd_status
237 move.l #0x80020000, %d2 /* Address byte 0 */
238 jsr asm_dspi_wr_status
239 jsr asm_dspi_rd_status
241 move.l #0x80020000, %d2 /* Dummy Wr and Rd */
242 jsr asm_dspi_wr_status
243 jsr asm_dspi_rd_status
245 /* Transfer serial boot header to sram */
247 move.l #0x80020000, %d2
248 jsr asm_dspi_wr_status
249 jsr asm_dspi_rd_status
251 move.b %d1, (%a0) /* read, copy to dst */
253 add.l #1, %a0 /* inc dst by 1 */
254 sub.l #1, %d4 /* dec cnt by 1 */
255 bne asm_dspi_rd_loop1
257 /* Transfer u-boot from serial flash to memory */
259 move.l #0x80020000, %d2
260 jsr asm_dspi_wr_status
261 jsr asm_dspi_rd_status
263 move.b %d1, (%a4) /* read, copy to dst */
265 add.l #1, %a4 /* inc dst by 1 */
266 sub.l #1, %d5 /* dec cnt by 1 */
267 bne asm_dspi_rd_loop2
269 move.l #0x00020000, %d2 /* Terminate */
270 jsr asm_dspi_wr_status
271 jsr asm_dspi_rd_status
273 /* jump to memory and execute */
274 move.l #(CONFIG_TEXT_BASE + 0x400), %a0
278 move.l (%a1), %d0 /* status */
279 and.l #0x0000F000, %d0
280 cmp.l #0x00003000, %d0
281 bgt asm_dspi_wr_status
287 move.l (%a1), %d0 /* status */
288 and.l #0x000000F0, %d0
291 beq asm_dspi_rd_status
295 #endif /* CONFIG_CF_SBF */
297 #ifdef CONFIG_SYS_NAND_BOOT
298 /* copy 4 boot pages to dram as soon as possible */
299 /* each page is 996 bytes (1056 total with 60 ECC bytes */
300 move.l #0x00000000, %a1 /* src */
301 move.l #CONFIG_TEXT_BASE, %a2 /* dst */
302 move.l #0x3E0, %d0 /* sz in long */
305 move.l (%a1)+, (%a2)+
307 bne asm_boot_nand_copy
309 /* jump to memory and execute */
310 move.l #(asm_nand_init), %a0
314 /* exit nand boot-mode */
315 move.l #0xFC0FFF30, %a1
316 or.l #0x00000040, %d1
319 /* initialize general use internal ram */
321 move.l #(CACR_STATUS), %a1 /* CACR */
322 move.l #(ICACHE_STATUS), %a2 /* icache */
323 move.l #(DCACHE_STATUS), %a3 /* dcache */
328 /* invalidate and disable cache */
329 move.l #0x01004100, %d0 /* Invalidate cache cmd */
330 movec %d0, %CACR /* Invalidate cache */
337 #ifdef CFG_SYS_CS0_BASE
338 /* Must disable global address */
339 move.l #0xFC008000, %a1
340 move.l #(CFG_SYS_CS0_BASE), (%a1)
341 move.l #0xFC008008, %a1
342 move.l #(CFG_SYS_CS0_CTRL), (%a1)
343 move.l #0xFC008004, %a1
344 move.l #(CFG_SYS_CS0_MASK), (%a1)
347 /* NAND port configuration */
348 move.l #0xEC094048, %a1
354 move.l #0xFC0FFF38, %a1 /* isr */
355 move.l #0x000e0000, (%a1)
356 move.l #0xFC0FFF08, %a2
357 move.l #0x00000000, (%a2)+ /* car */
358 move.l #0x11000000, (%a2)+ /* rar */
359 move.l #0x00000000, (%a2)+ /* rpt */
360 move.l #0x00000000, (%a2)+ /* rai */
361 move.l #0xFC0FFF2c, %a2 /* cfg */
362 move.l #0x00000000, (%a2)+ /* secsz */
363 move.l #0x000e0681, (%a2)+
364 move.l #0xFC0FFF04, %a2 /* cmd2 */
365 move.l #0xFF404001, (%a2)
366 move.l #0x000e0000, (%a1)
372 move.l #0xFC0FFF00, %a1
373 move.l #0x30700000, (%a1)+ /* cmd1 */
374 move.l #0x007EF000, (%a1)+ /* cmd2 */
376 move.l #0xFC0FFF2C, %a1
377 move.l #0x00000841, (%a1)+ /* secsz */
378 move.l #0x000e0681, (%a1)+ /* cfg */
380 move.l #100, %d4 /* 100 pages ~200KB */
381 move.l #4, %d2 /* start at 4 */
382 move.l #0xFC0FFF04, %a0 /* cmd2 */
383 move.l #0xFC0FFF0C, %a1 /* rar */
384 move.l #(CONFIG_TEXT_BASE + 0xF80), %a2
387 move.l #0x11000000, %d0 /* rar */
392 move.l (%a0), %d0 /* cmd2 */
400 move.l #0xFC0FFF38, %a4 /* isr */
402 and.l #0x40000000, %d0
404 beq asm_nand_chk_status
406 move.l #0xFC0FFF38, %a4 /* isr */
408 or.l #0x000E0000, %d0
412 move.l #0xFC0FC000, %a3 /* buf 1 */
414 move.l (%a3)+, (%a2)+
421 /* jump to memory and execute */
422 move.l #(CONFIG_TEXT_BASE + 0x400), %a0
425 #endif /* CONFIG_SYS_NAND_BOOT */
433 #endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
439 #if !defined(CONFIG_SERIAL_BOOT)
442 move.w #0x2700,%sr /* Mask off Interrupt */
444 /* Set vector base register at the beginning of the Flash */
445 move.l #CFG_SYS_FLASH_BASE, %d0
448 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
451 /* initialize general use internal ram */
453 move.l #(ICACHE_STATUS), %a1 /* icache */
454 move.l #(DCACHE_STATUS), %a2 /* dcache */
458 /* invalidate and disable cache */
459 move.l #(CFG_SYS_ICACHE_INV + CFG_SYS_DCACHE_INV), %d0
460 movec %d0, %CACR /* Invalidate cache */
467 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
471 /* put relocation table address to a5 */
472 move.l #__got_start, %a5
474 /* setup stack initially on top of internal static ram */
475 move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_SIZE), %sp
478 * if configured, malloc_f arena will be reserved first,
479 * then (and always) gd struct space will be reserved
482 move.l #board_init_f_alloc_reserve, %a1
485 /* update stack and frame-pointers */
489 /* initialize reserved area */
491 move.l #board_init_f_init_reserve, %a1
494 /* run low-level CPU init code (from flash) */
495 move.l #cpu_init_f, %a1
498 /* run low-level board init code (from flash) */
500 move.l #board_init_f, %a1
503 /* board_init_f() does not return */
505 /******************************************************************************/
508 * void relocate_code(addr_sp, gd, addr_moni)
510 * This "function" does not return, instead it continues in RAM
511 * after relocating the monitor code.
515 * r5 = length in bytes
521 move.l 8(%a6), %sp /* set new stack pointer */
523 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
524 move.l 16(%a6), %a0 /* Save copy of Destination Address */
526 move.l #CONFIG_SYS_MONITOR_BASE, %a1
527 move.l #__init_end, %a2
530 /* copy the code to RAM */
532 move.l (%a1)+, (%a3)+
537 * We are done. Do not return, instead branch to second part of board
538 * initialization, now running from RAM.
541 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
548 * Now clear BSS segment
551 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
553 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
560 * fix got table in RAM
563 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
564 move.l %a1,%a5 /* fix got pointer register a5 */
567 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
577 /* calculate relative jump to board_init_r in ram */
579 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
581 /* set parameters for board_init_r */
582 move.l %a0,-(%sp) /* dest_addr */
583 move.l %d0,-(%sp) /* gd */
586 /******************************************************************************/
609 /******************************************************************************/