2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * Copyright 2010-2012 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm-offsets.h>
14 #include <timestamp.h>
16 #include <asm/cache.h>
22 move.w #0x2700,%sr; /* disable intrs */ \
23 subl #60,%sp; /* space for 15 regs */ \
24 moveml %d0-%d7/%a0-%a6,%sp@;
27 moveml %sp@,%d0-%d7/%a0-%a6; \
28 addl #60,%sp; /* space for 15 regs */ \
31 #if defined(CONFIG_SERIAL_BOOT)
32 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
33 CONFIG_SYS_INIT_RAM_ADDR)
34 #define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
35 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
36 CONFIG_SYS_INIT_RAM_ADDR)
42 * Vector table. This is used for initial platform startup.
43 * These vectors are to catch any un-intended traps.
46 #if defined(CONFIG_SERIAL_BOOT)
48 INITSP: .long 0 /* Initial SP */
50 INITPC: .long ASM_DRAMINIT /* Initial PC */
52 #ifdef CONFIG_SYS_NAND_BOOT
53 INITPC: .long ASM_DRAMINIT_N /* Initial PC */
58 INITSP: .long 0 /* Initial SP */
59 INITPC: .long _START /* Initial PC */
64 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74 #if !defined(CONFIG_SERIAL_BOOT)
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
104 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
114 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117 #if defined(CONFIG_SERIAL_BOOT)
118 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
120 .long 0x00000000 /* checksum, not yet implemented */
121 .long 0x00040000 /* image length */
122 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
125 move.w #0x2700,%sr /* Mask off Interrupt */
127 #ifdef CONFIG_SYS_NAND_BOOT
128 /* for assembly stack */
129 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
132 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
137 move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
140 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
143 /* initialize general use internal ram */
145 move.l #(ICACHE_STATUS), %a1 /* icache */
146 move.l #(DCACHE_STATUS), %a2 /* dcache */
150 /* invalidate and disable cache */
151 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
152 movec %d0, %CACR /* Invalidate cache */
159 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
162 /* Must disable global address */
163 move.l #0xFC008000, %a1
164 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
165 move.l #0xFC008008, %a1
166 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
167 move.l #0xFC008004, %a1
168 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
169 #endif /* CONFIG_CF_SBF */
171 #ifdef CONFIG_MCF5441x
172 /* TC: enable all peripherals,
173 in the future only enable certain peripherals */
174 move.l #0xFC04002D, %a1
176 #if defined(CONFIG_CF_SBF)
177 move.b #23, (%a1) /* dspi */
179 #endif /* CONFIG_MCF5441x */
181 /* mandatory board level ddr-sdram init,
182 * for both 5441x and 5445x
188 * DSPI Initialization
189 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
195 /* Enable pins for DSPI mode - chip-selects are enabled later */
197 #ifdef CONFIG_MCF5441x
198 move.l #0xEC09404E, %a1
199 move.l #0xEC09404F, %a2
204 #ifdef CONFIG_MCF5445x
205 move.l #0xFC0A4063, %a0
208 /* Configure DSPI module */
209 move.l #0xFC05C000, %a0
210 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
212 move.l #0xFC05C00C, %a0
213 #ifdef CONFIG_MCF5441x
214 move.l #0x3E000016, (%a0)
216 #ifdef CONFIG_MCF5445x
217 move.l #0x3E000011, (%a0)
220 move.l #0xFC05C034, %a2 /* dtfr */
221 move.l #0xFC05C03B, %a3 /* drfr */
223 move.l #(ASM_SBF_IMG_HDR + 4), %a1
227 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
228 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
230 move.l #0xFC05C02C, %a1 /* dspi status */
232 /* Issue commands and address */
233 move.l #0x8002000B, %d2 /* Fast Read Cmd */
234 jsr asm_dspi_wr_status
235 jsr asm_dspi_rd_status
237 move.l #0x80020000, %d2 /* Address byte 2 */
238 jsr asm_dspi_wr_status
239 jsr asm_dspi_rd_status
241 move.l #0x80020000, %d2 /* Address byte 1 */
242 jsr asm_dspi_wr_status
243 jsr asm_dspi_rd_status
245 move.l #0x80020000, %d2 /* Address byte 0 */
246 jsr asm_dspi_wr_status
247 jsr asm_dspi_rd_status
249 move.l #0x80020000, %d2 /* Dummy Wr and Rd */
250 jsr asm_dspi_wr_status
251 jsr asm_dspi_rd_status
253 /* Transfer serial boot header to sram */
255 move.l #0x80020000, %d2
256 jsr asm_dspi_wr_status
257 jsr asm_dspi_rd_status
259 move.b %d1, (%a0) /* read, copy to dst */
261 add.l #1, %a0 /* inc dst by 1 */
262 sub.l #1, %d4 /* dec cnt by 1 */
263 bne asm_dspi_rd_loop1
265 /* Transfer u-boot from serial flash to memory */
267 move.l #0x80020000, %d2
268 jsr asm_dspi_wr_status
269 jsr asm_dspi_rd_status
271 move.b %d1, (%a4) /* read, copy to dst */
273 add.l #1, %a4 /* inc dst by 1 */
274 sub.l #1, %d5 /* dec cnt by 1 */
275 bne asm_dspi_rd_loop2
277 move.l #0x00020000, %d2 /* Terminate */
278 jsr asm_dspi_wr_status
279 jsr asm_dspi_rd_status
281 /* jump to memory and execute */
282 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
286 move.l (%a1), %d0 /* status */
287 and.l #0x0000F000, %d0
288 cmp.l #0x00003000, %d0
289 bgt asm_dspi_wr_status
295 move.l (%a1), %d0 /* status */
296 and.l #0x000000F0, %d0
299 beq asm_dspi_rd_status
303 #endif /* CONFIG_CF_SBF */
305 #ifdef CONFIG_SYS_NAND_BOOT
306 /* copy 4 boot pages to dram as soon as possible */
307 /* each page is 996 bytes (1056 total with 60 ECC bytes */
308 move.l #0x00000000, %a1 /* src */
309 move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
310 move.l #0x3E0, %d0 /* sz in long */
313 move.l (%a1)+, (%a2)+
315 bne asm_boot_nand_copy
317 /* jump to memory and execute */
318 move.l #(asm_nand_init), %a0
322 /* exit nand boot-mode */
323 move.l #0xFC0FFF30, %a1
324 or.l #0x00000040, %d1
327 /* initialize general use internal ram */
329 move.l #(CACR_STATUS), %a1 /* CACR */
330 move.l #(ICACHE_STATUS), %a2 /* icache */
331 move.l #(DCACHE_STATUS), %a3 /* dcache */
336 /* invalidate and disable cache */
337 move.l #0x01004100, %d0 /* Invalidate cache cmd */
338 movec %d0, %CACR /* Invalidate cache */
345 /* Must disable global address */
346 move.l #0xFC008000, %a1
347 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
348 move.l #0xFC008008, %a1
349 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
350 move.l #0xFC008004, %a1
351 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
353 /* NAND port configuration */
354 move.l #0xEC094048, %a1
360 move.l #0xFC0FFF38, %a1 /* isr */
361 move.l #0x000e0000, (%a1)
362 move.l #0xFC0FFF08, %a2
363 move.l #0x00000000, (%a2)+ /* car */
364 move.l #0x11000000, (%a2)+ /* rar */
365 move.l #0x00000000, (%a2)+ /* rpt */
366 move.l #0x00000000, (%a2)+ /* rai */
367 move.l #0xFC0FFF2c, %a2 /* cfg */
368 move.l #0x00000000, (%a2)+ /* secsz */
369 move.l #0x000e0681, (%a2)+
370 move.l #0xFC0FFF04, %a2 /* cmd2 */
371 move.l #0xFF404001, (%a2)
372 move.l #0x000e0000, (%a1)
378 move.l #0xFC0FFF00, %a1
379 move.l #0x30700000, (%a1)+ /* cmd1 */
380 move.l #0x007EF000, (%a1)+ /* cmd2 */
382 move.l #0xFC0FFF2C, %a1
383 move.l #0x00000841, (%a1)+ /* secsz */
384 move.l #0x000e0681, (%a1)+ /* cfg */
386 move.l #100, %d4 /* 100 pages ~200KB */
387 move.l #4, %d2 /* start at 4 */
388 move.l #0xFC0FFF04, %a0 /* cmd2 */
389 move.l #0xFC0FFF0C, %a1 /* rar */
390 move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
393 move.l #0x11000000, %d0 /* rar */
398 move.l (%a0), %d0 /* cmd2 */
406 move.l #0xFC0FFF38, %a4 /* isr */
408 and.l #0x40000000, %d0
410 beq asm_nand_chk_status
412 move.l #0xFC0FFF38, %a4 /* isr */
414 or.l #0x000E0000, %d0
418 move.l #0xFC0FC000, %a3 /* buf 1 */
420 move.l (%a3)+, (%a2)+
427 /* jump to memory and execute */
428 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
431 #endif /* CONFIG_SYS_NAND_BOOT */
439 #endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
445 #if !defined(CONFIG_SERIAL_BOOT)
448 move.w #0x2700,%sr /* Mask off Interrupt */
450 /* Set vector base register at the beginning of the Flash */
451 move.l #CONFIG_SYS_FLASH_BASE, %d0
454 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
457 /* initialize general use internal ram */
459 move.l #(ICACHE_STATUS), %a1 /* icache */
460 move.l #(DCACHE_STATUS), %a2 /* dcache */
464 /* invalidate and disable cache */
465 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
466 movec %d0, %CACR /* Invalidate cache */
473 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
477 /* put relocation table address to a5 */
478 move.l #__got_start, %a5
480 /* setup stack initially on top of internal static ram */
481 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
484 * if configured, malloc_f arena will be reserved first,
485 * then (and always) gd struct space will be reserved
488 move.l #board_init_f_alloc_reserve, %a1
491 /* update stack and frame-pointers */
495 /* initialize reserved area */
497 move.l #board_init_f_init_reserve, %a1
500 /* run low-level CPU init code (from flash) */
501 move.l #cpu_init_f, %a1
504 /* run low-level board init code (from flash) */
506 move.l #board_init_f, %a1
509 /* board_init_f() does not return */
511 /******************************************************************************/
514 * void relocate_code (addr_sp, gd, addr_moni)
516 * This "function" does not return, instead it continues in RAM
517 * after relocating the monitor code.
521 * r5 = length in bytes
527 move.l 8(%a6), %sp /* set new stack pointer */
529 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
530 move.l 16(%a6), %a0 /* Save copy of Destination Address */
532 move.l #CONFIG_SYS_MONITOR_BASE, %a1
533 move.l #__init_end, %a2
536 /* copy the code to RAM */
538 move.l (%a1)+, (%a3)+
543 * We are done. Do not return, instead branch to second part of board
544 * initialization, now running from RAM.
547 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
554 * Now clear BSS segment
557 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
559 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
566 * fix got table in RAM
569 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
570 move.l %a1,%a5 /* fix got pointer register a5 */
573 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
583 /* calculate relative jump to board_init_r in ram */
585 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
587 /* set parameters for board_init_r */
588 move.l %a0,-(%sp) /* dest_addr */
589 move.l %d0,-(%sp) /* gd */
592 /******************************************************************************/
615 /******************************************************************************/
617 .globl version_string
619 .ascii U_BOOT_VERSION_STRING, "\0"