arch/arm/mach-socfpga/Kconfig

   1 if ARCH_SOCFPGA
   2
   3 config SPL_LIBCOMMON_SUPPORT
   4         default y
   5
   6 config TARGET_SOCFPGA_ARRIA5
   7         bool
   8         select TARGET_SOCFPGA_GEN5
   9
  10 config TARGET_SOCFPGA_CYCLONE5
  11         bool
  12         select TARGET_SOCFPGA_GEN5
  13
  14 config TARGET_SOCFPGA_GEN5
  15         bool
  16
  17 choice
  18         prompt "Altera SOCFPGA board select"
  19         optional
  20
  21 config TARGET_SOCFPGA_ARRIA5_SOCDK
  22         bool "Altera SOCFPGA SoCDK (Arria V)"
  23         select TARGET_SOCFPGA_ARRIA5
  24
  25 config TARGET_SOCFPGA_CYCLONE5_SOCDK
  26         bool "Altera SOCFPGA SoCDK (Cyclone V)"
  27         select TARGET_SOCFPGA_CYCLONE5
  28
  29 config TARGET_SOCFPGA_DENX_MCVEVK
  30         bool "DENX MCVEVK (Cyclone V)"
  31         select TARGET_SOCFPGA_CYCLONE5
  32
  33 config TARGET_SOCFPGA_EBV_SOCRATES
  34         bool "EBV SoCrates (Cyclone V)"
  35         select TARGET_SOCFPGA_CYCLONE5
  36
  37 config TARGET_SOCFPGA_IS1
  38         bool "IS1 (Cyclone V)"
  39         select TARGET_SOCFPGA_CYCLONE5
  40
  41 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  42         bool "samtec VIN|ING FPGA (Cyclone V)"
  43         select TARGET_SOCFPGA_CYCLONE5
  44
  45 config TARGET_SOCFPGA_SR1500
  46         bool "SR1500 (Cyclone V)"
  47         select TARGET_SOCFPGA_CYCLONE5
  48
  49 config TARGET_SOCFPGA_TERASIC_DE0_NANO
  50         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
  51         select TARGET_SOCFPGA_CYCLONE5
  52
  53 config TARGET_SOCFPGA_TERASIC_SOCKIT
  54         bool "Terasic SoCkit (Cyclone V)"
  55         select TARGET_SOCFPGA_CYCLONE5
  56
  57 endchoice
  58
  59 config SYS_BOARD
  60         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  61         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  62         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  63         default "is1" if TARGET_SOCFPGA_IS1
  64         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  65         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  66         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  67         default "sr1500" if TARGET_SOCFPGA_SR1500
  68         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  69
  70 config SYS_VENDOR
  71         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
  72         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  73         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
  74         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
  75         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  76         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  77         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
  78
  79 config SYS_SOC
  80         default "socfpga"
  81
  82 config SYS_CONFIG_NAME
  83         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  84         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  85         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  86         default "socfpga_is1" if TARGET_SOCFPGA_IS1
  87         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  88         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  89         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  90         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
  91         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  92
  93 endif