arch/arm/mach-socfpga/Kconfig

   1 if ARCH_SOCFPGA
   2
   3 config SPL_LIBCOMMON_SUPPORT
   4         default y
   5
   6 config SPL_LIBDISK_SUPPORT
   7         default y
   8
   9 config SPL_LIBGENERIC_SUPPORT
  10         default y
  11
  12 config SPL_MMC_SUPPORT
  13         default y if DM_MMC
  14
  15 config SPL_NAND_SUPPORT
  16         default y if SPL_NAND_DENALI
  17
  18 config SPL_SERIAL_SUPPORT
  19         default y
  20
  21 config SPL_SPI_FLASH_SUPPORT
  22         default y if SPL_SPI_SUPPORT
  23
  24 config SPL_SPI_SUPPORT
  25         default y if DM_SPI
  26
  27 config SPL_WATCHDOG_SUPPORT
  28         default y
  29
  30 config SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  31         default y
  32
  33 config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_TYPE
  34         default 0xa2
  35
  36 config TARGET_SOCFPGA_ARRIA5
  37         bool
  38         select TARGET_SOCFPGA_GEN5
  39
  40 config TARGET_SOCFPGA_ARRIA10
  41         bool
  42
  43 config TARGET_SOCFPGA_CYCLONE5
  44         bool
  45         select TARGET_SOCFPGA_GEN5
  46
  47 config TARGET_SOCFPGA_GEN5
  48         bool
  49         select ALTERA_SDRAM
  50
  51 choice
  52         prompt "Altera SOCFPGA board select"
  53         optional
  54
  55 config TARGET_SOCFPGA_ARRIA10_SOCDK
  56         bool "Altera SOCFPGA SoCDK (Arria 10)"
  57         select TARGET_SOCFPGA_ARRIA10
  58
  59 config TARGET_SOCFPGA_ARRIA5_SOCDK
  60         bool "Altera SOCFPGA SoCDK (Arria V)"
  61         select TARGET_SOCFPGA_ARRIA5
  62
  63 config TARGET_SOCFPGA_CYCLONE5_SOCDK
  64         bool "Altera SOCFPGA SoCDK (Cyclone V)"
  65         select TARGET_SOCFPGA_CYCLONE5
  66
  67 config TARGET_SOCFPGA_ARIES_MCVEVK
  68         bool "Aries MCVEVK (Cyclone V)"
  69         select TARGET_SOCFPGA_CYCLONE5
  70
  71 config TARGET_SOCFPGA_EBV_SOCRATES
  72         bool "EBV SoCrates (Cyclone V)"
  73         select TARGET_SOCFPGA_CYCLONE5
  74
  75 config TARGET_SOCFPGA_IS1
  76         bool "IS1 (Cyclone V)"
  77         select TARGET_SOCFPGA_CYCLONE5
  78
  79 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  80         bool "samtec VIN|ING FPGA (Cyclone V)"
  81         select BOARD_LATE_INIT
  82         select TARGET_SOCFPGA_CYCLONE5
  83
  84 config TARGET_SOCFPGA_SR1500
  85         bool "SR1500 (Cyclone V)"
  86         select TARGET_SOCFPGA_CYCLONE5
  87
  88 config TARGET_SOCFPGA_TERASIC_DE0_NANO
  89         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
  90         select TARGET_SOCFPGA_CYCLONE5
  91
  92 config TARGET_SOCFPGA_TERASIC_DE10_NANO
  93         bool "Terasic DE10-Nano (Cyclone V)"
  94         select TARGET_SOCFPGA_CYCLONE5
  95
  96 config TARGET_SOCFPGA_TERASIC_DE1_SOC
  97         bool "Terasic DE1-SoC (Cyclone V)"
  98         select TARGET_SOCFPGA_CYCLONE5
  99
 100 config TARGET_SOCFPGA_TERASIC_SOCKIT
 101         bool "Terasic SoCkit (Cyclone V)"
 102         select TARGET_SOCFPGA_CYCLONE5
 103
 104 endchoice
 105
 106 config SYS_BOARD
 107         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
 108         default "arria10-socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
 109         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 110         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 111         default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
 112         default "de10-nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
 113         default "is1" if TARGET_SOCFPGA_IS1
 114         default "mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
 115         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 116         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
 117         default "sr1500" if TARGET_SOCFPGA_SR1500
 118         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 119
 120 config SYS_VENDOR
 121         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
 122         default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
 123         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 124         default "aries" if TARGET_SOCFPGA_ARIES_MCVEVK
 125         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
 126         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 127         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 128         default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC
 129         default "terasic" if TARGET_SOCFPGA_TERASIC_DE10_NANO
 130         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
 131
 132 config SYS_SOC
 133         default "socfpga"
 134
 135 config SYS_CONFIG_NAME
 136         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
 137         default "socfpga_arria10_socdk" if TARGET_SOCFPGA_ARRIA10_SOCDK
 138         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 139         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 140         default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC
 141         default "socfpga_de10_nano" if TARGET_SOCFPGA_TERASIC_DE10_NANO
 142         default "socfpga_is1" if TARGET_SOCFPGA_IS1
 143         default "socfpga_mcvevk" if TARGET_SOCFPGA_ARIES_MCVEVK
 144         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 145         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
 146         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
 147         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 148
 149 endif