1 // SPDX-License-Identifier: GPL-2.0
3 * dts file for Xilinx Versal a2197 RevA System Controller
5 * (C) Copyright 2019, Xilinx, Inc.
7 * Michal Simek <michal.simek@xilinx.com>
11 #include "zynqmp.dtsi"
12 #include "zynqmp-clk-ccf.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/phy/phy.h>
17 model = "Versal System Controller on a2197 Processor Char board RevA"; /* Tenzing */
18 compatible = "xlnx,zynqmp-p-a2197-00-revA", "xlnx,zynqmp-a2197-revA",
19 "xlnx,zynqmp-a2197", "xlnx,zynqmp";
37 bootargs = "earlycon";
38 stdout-path = "serial0:115200n8";
42 device_type = "memory";
43 reg = <0x0 0x0 0x0 0x80000000>;
46 si5332_1: si5332_1 { /* clk0_sgmii - u142 */
47 compatible = "fixed-clock";
49 clock-frequency = <33333333>; /* FIXME */
52 si5332_2: si5332_2 { /* clk1_usb - u142 */
53 compatible = "fixed-clock";
55 clock-frequency = <27000000>;
59 &sdhci0 { /* emmc MIO 13-23 - with some settings 16GB */
67 &uart0 { /* uart0 MIO38-39 */
71 &uart1 { /* uart1 MIO40-41 */
75 &sdhci1 { /* sd1 MIO45-51 cd in place */
85 clocks = <&si5332_1>, <&si5332_2>;
86 clock-names = "ref0", "ref1";
92 phy-mode = "sgmii"; /* DTG generates this properly 1512 */
94 /* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
95 phy0: ethernet-phy@0 {
102 gpio-line-names = "", "", "", "", "", /* 0 - 4 */
103 "", "", "DC_SYS_CTRL0", "DC_SYS_CTRL1", "DC_SYS_CTRL2", /* 5 - 9 */
104 "DC_SYS_CTRL3", "DC_SYS_CTRL4", "DC_SYS_CTRL5", "EMMC_DAT0", "EMMC_DAT1", /* 10 - 14 */
105 "EMMC_DAT2", "EMMC_DAT3", "EMMC_DAT4", "EMMC_DAT5", "EMMC_DAT6", /* 15 - 19 */
106 "EMMC_DAT7", "EMMC_CMD", "EMMC_CLK", "EMMC_RST_B", "", /* 20 - 24 */
107 "", "", "", "", "", /* 25 - 29 */
108 "", "", "", "", "LP_I2C0_PMC_SCL", /* 30 - 34 */
109 "LP_I2C0_PMC_SDA", "LP_I2C1_SCL", "LP_I2C1_SDA", "UART0_RXD_IN", "UART0_TXD_OUT", /* 35 - 39 */
110 "UART1_TXD_OUT", "UART1_RXD_IN", "ETH_RESET_B", "", "", /* 40 - 44 */
111 "SD1_CD_B", "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3", /* 45 - 49 */
112 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2", /* 50 - 54 */
113 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3", /* 55 - 59 */
114 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK", /* 60 - 64 */
115 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1", /* 65 - 69 */
116 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6", /* 70 - 74 */
117 "USB1_DATA7", "ETH_MDC", "ETH_MDIO", /* 75 - 77, MIO end and EMIO start */
118 "SYSCTLR_VERSAL_MODE0", "SYSCTLR_VERSAL_MODE1", /* 78 - 79 */
119 "SYSCTLR_VERSAL_MODE2", "SYSCTLR_VERSAL_MODE3", "SYSCTLR_POR_B_LS", "DC_PRSNT", "SYSCTLR_POWER_EN", /* 80 - 84 */
120 "SYSCTLR_JTAG_S0", "SYSCTLR_JTAG_S1", "SYSCTLR_IIC_MUX0_RESET_B", "SYSCTLR_IIC_MUX1_RESET_B", "SYSCTLR_LP_I2C_SM_ALERT", /* 85 -89 */
121 "SYSCTLR_GPIO0", "SYSCTLR_GPIO1", "SYSCTLR_GPIO2", "SYSCTLR_GPIO3", "SYSCTLR_GPIO4", /* 90 - 94 */
122 "SYSCTLR_GPIO5", "VCCO_500_RBIAS", "VCCO_501_RBIAS", "VCCO_502_RBIAS", "VCCO_500_RBIAS_LED", /* 95 - 99 */
123 "VCCO_501_RBIAS_LED", "VCCO_502_RBIAS_LED", "SYSCTLR_VCCINT_EN", "SYSCTLR_VCC_IO_SOC_EN", "SYSCTLR_VCC_PMC_EN", /* 100 - 104 */
124 "SYSCTLR_VCC_RAM_EN", "SYSCTLR_VCC_PSLP_EN", "SYSCTLR_VCC_PSFP_EN", "SYSCTLR_VCCAUX_EN", "SYSCTLR_VCCAUX_PMC_EN", /* 105 - 109 */
125 "SYSCTLR_VCCO_500_EN", "SYSCTLR_VCCO_501_EN", "SYSCTLR_VCCO_502_EN", "SYSCTLR_VCCO_503_EN", "SYSCTLR_VCC1V8_EN", /* 110 - 114 */
126 "SYSCTLR_VCC3V3_EN", "SYSCTLR_VCC1V2_DDR4_EN", "SYSCTLR_VCC1V1_LP4_EN", "SYSCTLR_VDD1_1V8_LP4_EN", "SYSCTLR_VADJ_FMC_EN", /* 115 - 119 */
127 "SYSCTLR_MGTYAVCC_EN", "SYSCTLR_MGTYAVTT_EN", "SYSCTLR_MGTYVCCAUX_EN", "SYSCTLR_UTIL_1V13_EN", "SYSCTLR_UTIL_1V8_EN", /* 120 - 124 */
128 "SYSCTLR_UTIL_2V5_EN", "FMCP1_FMC_PRSNT_M2C_B", "FMCP2_FMC_PRSNT_M2C_B", "FMCP1_FMCP_PRSNT_M2C_B", "FMCP2_FMCP_PRSNT_M2C_B", /* 125 - 129 */
129 "PMBUS1_INA226_ALERT", "PMBUS2_INA226_ALERT", "SYSCTLR_USBC_SBU1", "SYSCTLR_USBC_SBU2", "TI_CABLE1", /* 130 - 134 */
130 "TI_CABLE2", "SYSCTLR_MIC2005_EN_B", "SYSCTLR_MIC2005_FAULT_B", "SYSCTLR_TUSB320_INT_B", "SYSCTLR_TUSB320_ID", /* 135 - 139 */
131 "PMBUS1_ALERT", "PMBUS2_ALERT", "SYSCTLR_ETH_RESET_B", "SYSCTLR_VCC0V85_TG", "MAX6643_OT_B", /* 140 - 144 */
132 "MAX6643_FANFINAL_B", "MAX6643_FULLSPD", "", "", "", /* 145 - 149 */
133 "", "", "", "", "", /* 150 - 154 */
134 "", "", "", "", "", /* 155 - 159 */
135 "", "", "", "", "", /* 160 - 164 */
136 "", "", "", "", "", /* 165 - 169 */
137 "", "", "", ""; /* 170 - 174 */
140 &i2c0 { /* MIO 34-35 - can't stay here */
142 clock-frequency = <400000>;
143 i2c-mux@74 { /* u33 */
144 compatible = "nxp,pca9548";
145 #address-cells = <1>;
148 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
150 #address-cells = <1>;
153 /* On connector J98 */
154 reg_vcc_fmc: tps544@7 { /* u80 - FIXME name - don't know what it does */
155 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
157 regulator-name = "reg_vcc_fmc";
158 regulator-min-microvolt = <1800000>;
159 regulator-max-microvolt = <2600000>;
160 /* enable-gpio = <&gpio0 23 0x4>; optional */
162 reg_vcc_ram: tps544@8 { /* u83 - FIXME name - don't know what it does */
163 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
166 reg_vcc_pslp: tps544@9 { /* u85 - FIXME name - don't know what it does */
167 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
170 reg_vcc_psfp: tps544@a { /* u86 - FIXME name - don't know what it does */
171 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
174 reg_vccint: tps53681@60 { /* u70 - FIXME name - don't know what it does - also vcc_io_soc */
175 compatible = "ti,tps53681", "ti,tps53679";
177 /* vccint, vcc_io_soc */
180 i2c@1 { /* PMBUS1_INA226 */
181 #address-cells = <1>;
184 /* FIXME check alerts coming to SC */
185 vcc_fmc: ina226@42 { /* u81 */
186 compatible = "ti,ina226";
188 shunt-resistor = <5000>;
190 vcc_ram: ina226@43 { /* u82 */
191 compatible = "ti,ina226";
193 shunt-resistor = <5000>;
195 vcc_pslp: ina226@44 { /* u84 */
196 compatible = "ti,ina226";
198 shunt-resistor = <5000>;
200 vcc_psfp: ina226@45 { /* u87 */
201 compatible = "ti,ina226";
203 shunt-resistor = <5000>;
207 #address-cells = <1>;
210 /* On connector J104 */
211 reg_vccaus: tps544@d { /* u88 - FIXME name - don't know what it does */
212 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
215 reg_vccaux_fmc: tps544@e { /* u90 - FIXME name - don't know what it does */
216 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
219 reg_vcco_500: tps544@f { /* u93 - FIXME name - don't know what it does */
220 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
223 reg_vcco_501: tps544@10 { /* u95 - FIXME name - don't know what it does */
224 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
227 reg_vcco_502: tps544@11 { /* u97 - FIXME name - don't know what it does */
228 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
231 reg_vcco_503: tps544@12 { /* u99 - FIXME name - don't know what it does */
232 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
235 reg_vcc1v8: tps544@13 { /* u101 - FIXME name - don't know what it does */
236 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
239 reg_vcc3v3: tps544@14 { /* u102 - FIXME name - don't know what it does */
240 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
243 reg_vcc1v2_ddr4: tps544@15 { /* u104 - FIXME name - don't know what it does */
244 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
247 reg_vcc1v1_lp4: tps544@16 { /* u106 - FIXME name - don't know what it does */
248 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
251 reg_vcc1_1V8_lp4: tps544@17 { /* u108 - FIXME name - don't know what it does */
252 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
255 reg_vadj_fmc: tps544@19 { /* u109 - FIXME name - don't know what it does */
256 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
259 reg_mgtyavcc: tps544@1a { /* u111 - FIXME name - don't know what it does */
260 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
263 reg_mgtyavtt: tps544@1b { /* u114 - FIXME name - don't know what it does */
264 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
267 reg_mgtyvccaux: tps544@1c { /* u115 - FIXME name - don't know what it does */
268 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
271 reg_util_1v13: tps544@1d { /* u117 - FIXME name - don't know what it does */
272 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
275 reg_util_1v8: tps544@1e { /* u118 - FIXME name - don't know what it does */
276 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
279 reg_util_2v5: tps544@1f { /* u119 - FIXME name - don't know what it does */
280 compatible = "ti,tps544b25"; /* Documentation/hwmon/pmbus - wiring is missing */
284 i2c@3 { /* PMBUS2_INA226 */
285 #address-cells = <1>;
288 /* FIXME check alerts coming to SC */
289 vccaux: ina226@40 { /* u89 */
290 compatible = "ti,ina226";
292 shunt-resistor = <5000>;
294 vccaux_fmc: ina226@41 { /* u91 */
295 compatible = "ti,ina226";
297 shunt-resistor = <5000>;
299 vcco_500: ina226@42 { /* u92 */
300 compatible = "ti,ina226";
302 shunt-resistor = <5000>;
304 vcco_501: ina226@43 { /* u94 */
305 compatible = "ti,ina226";
307 shunt-resistor = <5000>;
309 vcco_502: ina226@44 { /* u96 */
310 compatible = "ti,ina226";
312 shunt-resistor = <5000>;
314 vcco_503: ina226@45 { /* u98 */
315 compatible = "ti,ina226";
317 shunt-resistor = <5000>;
319 vcc_1v8: ina226@46 { /* u100 */
320 compatible = "ti,ina226";
322 shunt-resistor = <5000>;
324 vcc_3v3: ina226@47 { /* u103 */
325 compatible = "ti,ina226";
327 shunt-resistor = <5000>;
329 vcc_1v2_ddr4: ina226@48 { /* u105 */
330 compatible = "ti,ina226";
332 shunt-resistor = <1000>;
334 vcc1v1_lp4: ina226@49 { /* u107 */
335 compatible = "ti,ina226";
337 shunt-resistor = <5000>;
339 vadj_fmc: ina226@4a { /* u110 */
340 compatible = "ti,ina226";
342 shunt-resistor = <5000>;
344 mgtyavcc: ina226@4b { /* u112 */
345 compatible = "ti,ina226";
347 shunt-resistor = <1000>;
349 mgtyavtt: ina226@4c { /* u113 */
350 compatible = "ti,ina226";
352 shunt-resistor = <1000>;
354 mgtyvccaux: ina226@4d { /* u116 */
355 compatible = "ti,ina226";
357 shunt-resistor = <5000>;
359 vcc_bat: ina226@4e { /* u12 */
360 compatible = "ti,ina226";
362 shunt-resistor = <10000000>; /* 10 ohm */
365 i2c@4 { /* LP_I2C_SM */
366 #address-cells = <1>;
369 /* connected to J212G */
370 /* zynqmp sm alert or samtec J212H */
376 &i2c1 { /* i2c1 MIO 36-37 */
378 clock-frequency = <400000>;
380 /* Must be enabled via J242 */
381 eeprom_versal: eeprom@51 { /* x-prc-01-revA u116, x-prc-02-revA u12 */
382 compatible = "atmel,24c02";
386 i2c-mux@74 { /* u35 */
387 compatible = "nxp,pca9548";
388 #address-cells = <1>;
391 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX1_RESET_B GPIO_ACTIVE_HIGH>; */
392 dc_i2c: i2c@0 { /* DC_I2C */
393 #address-cells = <1>;
396 /* Use for storing information about SC board */
397 eeprom: eeprom@54 { /* u34 - m24128 16kB */
398 compatible = "st,24c128", "atmel,24c128";
401 si570_ref_clk: clock-generator@5d { /* u32 */
403 compatible = "silabs,si570";
404 reg = <0x5d>; /* 570JAC000900DG */
405 temperature-stability = <50>;
406 factory-fout = <33333333>;
407 clock-frequency = <33333333>;
408 clock-output-names = "ref_clk";
411 /* Connection via Samtec J212D */
412 /* Use for storing information about X-PRC card */
413 x_prc_eeprom: eeprom@52 { /* x-prc-01-revA u120, x-prc-02-revA u16 */
414 compatible = "atmel,24c02";
418 /* Use for setting up certain features on X-PRC card */
419 x_prc_tca9534: gpio@22 { /* x-prc-01-revA u121, x-prc-02-revA u17 */
420 compatible = "nxp,pca9534";
422 gpio-controller; /* IRQ not connected */
424 gpio-line-names = "sw4_1", "sw4_2", "sw4_3", "sw4_4",
429 input; /* FIXME add meaning */
435 input; /* FIXME add meaning */
441 input; /* FIXME add meaning */
447 input; /* FIXME add meaning */
452 i2c@1 { /* FMCP1_IIC */
453 #address-cells = <1>;
456 /* FIXME connection to Samtec J51C */
457 /* expected eeprom 0x50 SE cards */
459 i2c@2 { /* FMCP2_IIC */
460 #address-cells = <1>;
463 /* FIXME connection to Samtec J53C */
464 /* expected eeprom 0x50 SE cards */
466 i2c@3 { /* DDR4_DIMM1 */
467 #address-cells = <1>;
470 si570_ddr_dimm1: clock-generator@60 { /* u2 */
472 compatible = "silabs,si570";
473 reg = <0x60>; /* 570BAB000299DG */
474 temperature-stability = <50>;
475 factory-fout = <200000000>;
476 clock-frequency = <200000000>;
477 clock-output-names = "si570_ddrdimm1_clk";
481 i2c@4 { /* DDR4_DIMM2 */
482 #address-cells = <1>;
485 si570_ddr_dimm2: clock-generator@60 { /* u3 */
487 compatible = "silabs,si570";
488 reg = <0x60>; /* 570BAB000299DG */
489 temperature-stability = <50>;
490 factory-fout = <200000000>;
491 clock-frequency = <200000000>;
492 clock-output-names = "si570_ddrdimm2_clk";
496 i2c@5 { /* LPDDR4_SI570_CLK */
497 #address-cells = <1>;
500 si570_lpddr4: clock-generator@60 { /* u4 */
502 compatible = "silabs,si570";
503 reg = <0x60>; /* 570BAB000299DG */
504 temperature-stability = <50>;
505 factory-fout = <200000000>;
506 clock-frequency = <200000000>;
507 clock-output-names = "si570_lpddr4_clk";
510 i2c@6 { /* HSDP_SI570 */
511 #address-cells = <1>;
514 si570_hsdp: clock-generator@5d { /* u5 */
516 compatible = "silabs,si570";
517 reg = <0x5d>; /* 570JAC000900DG */
518 temperature-stability = <50>;
519 factory-fout = <156250000>;
520 clock-frequency = <156250000>;
521 clock-output-names = "si570_hsdp_clk";
524 i2c@7 { /* PCIE_CLK */
525 #address-cells = <1>;
528 /* u36 0xd8 or 0xde - pcie clk buf - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
529 /* u37 0xd0 DNP - pcie clocking 1 - 9FGV1006BQ505LTGI - PCIe GEN 4 CLOCK GENERATOR FIXME - no linux driver */
530 /* u38 0xca - pcie clocking 2 - 9ZML1241EKILF PCIe GEN 4 CLOCK BUFFER FIXME - no driver */
531 clock_8t49n287: clock-generator@d8 { /* u39 8T49N240 - pcie clocking 3 */
532 #clock-cells = <1>; /* author David Cater <david.cater@idt.com>*/
533 compatible = "idt,8t49n240", "idt,8t49n241"; /* FIXME no driver for 240 */
535 /* Documentation/devicetree/bindings/clock/idt,idt8t49n24x.txt */
536 /* FIXME there input via J241 Samtec CLK1 and CLK0 from U38 - selection PIN */
546 xlnx,usb-polarity = <0>;
547 xlnx,usb-reset-mode = <0>;
548 phy-names = "usb3-phy";
549 phys = <&psgtr 1 PHY_TYPE_USB3 0 1>;
554 dr_mode = "peripheral";
555 snps,dis_u2_susphy_quirk;
556 snps,dis_u3_susphy_quirk;
557 maximum-speed = "super-speed";
562 xlnx,usb-polarity = <0>;
563 xlnx,usb-reset-mode = <0>;
567 /delete-property/ phy-names ;
568 /delete-property/ phys ;
570 maximum-speed = "high-speed";
571 snps,dis_u2_susphy_quirk ;
572 snps,dis_u3_susphy_quirk ;