arch/arm/dts/rk356x-u-boot.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * (C) Copyright 2021 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include "rockchip-u-boot.dtsi"
   7
   8 / {
   9         aliases {
  10                 mmc0 = &sdhci;
  11                 mmc1 = &sdmmc0;
  12         };
  13
  14         chosen {
  15                 u-boot,spl-boot-order = &sdhci, &sdmmc0;
  16         };
  17
  18         dmc: dmc {
  19                 compatible = "rockchip,rk3568-dmc";
  20                 bootph-all;
  21                 status = "okay";
  22         };
  23
  24         otp: nvmem@fe38c000 {
  25                 compatible = "rockchip,rk3568-otp";
  26                 reg = <0x0 0xfe38c000 0x0 0x4000>;
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29                 status = "okay";
  30
  31                 cpu_id: id@a {
  32                         reg = <0x0a 0x10>;
  33                 };
  34         };
  35 };
  36
  37 &combphy1 {
  38         /delete-property/ assigned-clocks;
  39         /delete-property/ assigned-clock-rates;
  40 };
  41
  42 &cru {
  43         bootph-all;
  44         status = "okay";
  45 };
  46
  47 &pmucru {
  48         bootph-all;
  49         status = "okay";
  50 };
  51
  52 &grf {
  53         bootph-all;
  54         status = "okay";
  55 };
  56
  57 &pmugrf {
  58         bootph-all;
  59         status = "okay";
  60 };
  61
  62 &sdhci {
  63         bootph-pre-ram;
  64         status = "okay";
  65 };
  66
  67 &sdmmc0 {
  68         bootph-pre-ram;
  69         status = "okay";
  70 };