arch/arm/dts/r8a7794.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a7794 SoC
   4  *
   5  * Copyright (C) 2014 Renesas Electronics Corporation
   6  * Copyright (C) 2014 Ulrich Hecht
   7  */
   8
   9 #include <dt-bindings/clock/r8a7794-cpg-mssr.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/interrupt-controller/irq.h>
  12 #include <dt-bindings/power/r8a7794-sysc.h>
  13
  14 / {
  15         compatible = "renesas,r8a7794";
  16         interrupt-parent = <&gic>;
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28                 i2c7 = &i2c7;
  29                 spi0 = &qspi;
  30                 vin0 = &vin0;
  31                 vin1 = &vin1;
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 cpu0: cpu@0 {
  39                         device_type = "cpu";
  40                         compatible = "arm,cortex-a7";
  41                         reg = <0>;
  42                         clock-frequency = <1000000000>;
  43                         clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
  44                         power-domains = <&sysc R8A7794_PD_CA7_CPU0>;
  45                         next-level-cache = <&L2_CA7>;
  46                 };
  47
  48                 cpu1: cpu@1 {
  49                         device_type = "cpu";
  50                         compatible = "arm,cortex-a7";
  51                         reg = <1>;
  52                         clock-frequency = <1000000000>;
  53                         clocks = <&cpg CPG_CORE R8A7794_CLK_Z2>;
  54                         power-domains = <&sysc R8A7794_PD_CA7_CPU1>;
  55                         next-level-cache = <&L2_CA7>;
  56                 };
  57
  58                 L2_CA7: cache-controller-0 {
  59                         compatible = "cache";
  60                         power-domains = <&sysc R8A7794_PD_CA7_SCU>;
  61                         cache-unified;
  62                         cache-level = <2>;
  63                 };
  64         };
  65
  66         gic: interrupt-controller@f1001000 {
  67                 compatible = "arm,gic-400";
  68                 #interrupt-cells = <3>;
  69                 #address-cells = <0>;
  70                 interrupt-controller;
  71                 reg = <0 0xf1001000 0 0x1000>,
  72                         <0 0xf1002000 0 0x2000>,
  73                         <0 0xf1004000 0 0x2000>,
  74                         <0 0xf1006000 0 0x2000>;
  75                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
  76                 clocks = <&cpg CPG_MOD 408>;
  77                 clock-names = "clk";
  78                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
  79                 resets = <&cpg 408>;
  80         };
  81
  82         gpio0: gpio@e6050000 {
  83                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
  84                 reg = <0 0xe6050000 0 0x50>;
  85                 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
  86                 #gpio-cells = <2>;
  87                 gpio-controller;
  88                 gpio-ranges = <&pfc 0 0 32>;
  89                 #interrupt-cells = <2>;
  90                 interrupt-controller;
  91                 clocks = <&cpg CPG_MOD 912>;
  92                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
  93                 resets = <&cpg 912>;
  94         };
  95
  96         gpio1: gpio@e6051000 {
  97                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
  98                 reg = <0 0xe6051000 0 0x50>;
  99                 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 100                 #gpio-cells = <2>;
 101                 gpio-controller;
 102                 gpio-ranges = <&pfc 0 32 26>;
 103                 #interrupt-cells = <2>;
 104                 interrupt-controller;
 105                 clocks = <&cpg CPG_MOD 911>;
 106                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 107                 resets = <&cpg 911>;
 108         };
 109
 110         gpio2: gpio@e6052000 {
 111                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 112                 reg = <0 0xe6052000 0 0x50>;
 113                 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 114                 #gpio-cells = <2>;
 115                 gpio-controller;
 116                 gpio-ranges = <&pfc 0 64 32>;
 117                 #interrupt-cells = <2>;
 118                 interrupt-controller;
 119                 clocks = <&cpg CPG_MOD 910>;
 120                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 121                 resets = <&cpg 910>;
 122         };
 123
 124         gpio3: gpio@e6053000 {
 125                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 126                 reg = <0 0xe6053000 0 0x50>;
 127                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 128                 #gpio-cells = <2>;
 129                 gpio-controller;
 130                 gpio-ranges = <&pfc 0 96 32>;
 131                 #interrupt-cells = <2>;
 132                 interrupt-controller;
 133                 clocks = <&cpg CPG_MOD 909>;
 134                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 135                 resets = <&cpg 909>;
 136         };
 137
 138         gpio4: gpio@e6054000 {
 139                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 140                 reg = <0 0xe6054000 0 0x50>;
 141                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 142                 #gpio-cells = <2>;
 143                 gpio-controller;
 144                 gpio-ranges = <&pfc 0 128 32>;
 145                 #interrupt-cells = <2>;
 146                 interrupt-controller;
 147                 clocks = <&cpg CPG_MOD 908>;
 148                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 149                 resets = <&cpg 908>;
 150         };
 151
 152         gpio5: gpio@e6055000 {
 153                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 154                 reg = <0 0xe6055000 0 0x50>;
 155                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 156                 #gpio-cells = <2>;
 157                 gpio-controller;
 158                 gpio-ranges = <&pfc 0 160 28>;
 159                 #interrupt-cells = <2>;
 160                 interrupt-controller;
 161                 clocks = <&cpg CPG_MOD 907>;
 162                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 163                 resets = <&cpg 907>;
 164         };
 165
 166         gpio6: gpio@e6055400 {
 167                 compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio";
 168                 reg = <0 0xe6055400 0 0x50>;
 169                 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 170                 #gpio-cells = <2>;
 171                 gpio-controller;
 172                 gpio-ranges = <&pfc 0 192 26>;
 173                 #interrupt-cells = <2>;
 174                 interrupt-controller;
 175                 clocks = <&cpg CPG_MOD 905>;
 176                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 177                 resets = <&cpg 905>;
 178         };
 179
 180         cmt0: timer@ffca0000 {
 181                 compatible = "renesas,cmt-48-gen2";
 182                 reg = <0 0xffca0000 0 0x1004>;
 183                 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 184                              <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 185                 clocks = <&cpg CPG_MOD 124>;
 186                 clock-names = "fck";
 187                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 188                 resets = <&cpg 124>;
 189
 190                 renesas,channels-mask = <0x60>;
 191
 192                 status = "disabled";
 193         };
 194
 195         cmt1: timer@e6130000 {
 196                 compatible = "renesas,cmt-48-gen2";
 197                 reg = <0 0xe6130000 0 0x1004>;
 198                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 199                              <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 200                              <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 201                              <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 202                              <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 203                              <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 204                              <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 205                              <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 206                 clocks = <&cpg CPG_MOD 329>;
 207                 clock-names = "fck";
 208                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 209                 resets = <&cpg 329>;
 210
 211                 renesas,channels-mask = <0xff>;
 212
 213                 status = "disabled";
 214         };
 215
 216         timer {
 217                 compatible = "arm,armv7-timer";
 218                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 219                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 220                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
 221                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
 222         };
 223
 224         irqc0: interrupt-controller@e61c0000 {
 225                 compatible = "renesas,irqc-r8a7794", "renesas,irqc";
 226                 #interrupt-cells = <2>;
 227                 interrupt-controller;
 228                 reg = <0 0xe61c0000 0 0x200>;
 229                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 230                              <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 231                              <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 232                              <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 233                              <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 234                              <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 235                              <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 236                              <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
 237                              <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
 238                              <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 239                 clocks = <&cpg CPG_MOD 407>;
 240                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 241                 resets = <&cpg 407>;
 242         };
 243
 244         pfc: pin-controller@e6060000 {
 245                 compatible = "renesas,pfc-r8a7794";
 246                 reg = <0 0xe6060000 0 0x11c>;
 247         };
 248
 249         dmac0: dma-controller@e6700000 {
 250                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 251                 reg = <0 0xe6700000 0 0x20000>;
 252                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
 253                               GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 254                               GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 255                               GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 256                               GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 257                               GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 258                               GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 259                               GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 260                               GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 261                               GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 262                               GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 263                               GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 264                               GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 265                               GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 266                               GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 267                               GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
 268                 interrupt-names = "error",
 269                                 "ch0", "ch1", "ch2", "ch3",
 270                                 "ch4", "ch5", "ch6", "ch7",
 271                                 "ch8", "ch9", "ch10", "ch11",
 272                                 "ch12", "ch13", "ch14";
 273                 clocks = <&cpg CPG_MOD 219>;
 274                 clock-names = "fck";
 275                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 276                 resets = <&cpg 219>;
 277                 #dma-cells = <1>;
 278                 dma-channels = <15>;
 279         };
 280
 281         dmac1: dma-controller@e6720000 {
 282                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 283                 reg = <0 0xe6720000 0 0x20000>;
 284                 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 285                               GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 286                               GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 287                               GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 288                               GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 289                               GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 290                               GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 291                               GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 292                               GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 293                               GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 294                               GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 295                               GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 296                               GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 297                               GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 298                               GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 299                               GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
 300                 interrupt-names = "error",
 301                                 "ch0", "ch1", "ch2", "ch3",
 302                                 "ch4", "ch5", "ch6", "ch7",
 303                                 "ch8", "ch9", "ch10", "ch11",
 304                                 "ch12", "ch13", "ch14";
 305                 clocks = <&cpg CPG_MOD 218>;
 306                 clock-names = "fck";
 307                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 308                 resets = <&cpg 218>;
 309                 #dma-cells = <1>;
 310                 dma-channels = <15>;
 311         };
 312
 313         audma0: dma-controller@ec700000 {
 314                 compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac";
 315                 reg = <0 0xec700000 0 0x10000>;
 316                 interrupts =    <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 317                                  GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 318                                  GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 319                                  GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 320                                  GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 321                                  GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 322                                  GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 323                                  GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 324                                  GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 325                                  GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 326                                  GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 327                                  GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 328                                  GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 329                                  GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
 330                 interrupt-names = "error",
 331                                   "ch0", "ch1", "ch2", "ch3", "ch4", "ch5",
 332                                   "ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
 333                                   "ch12";
 334                 clocks = <&cpg CPG_MOD 502>;
 335                 clock-names = "fck";
 336                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 337                 resets = <&cpg 502>;
 338                 #dma-cells = <1>;
 339                 dma-channels = <13>;
 340         };
 341
 342         scifa0: serial@e6c40000 {
 343                 compatible = "renesas,scifa-r8a7794",
 344                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 345                 reg = <0 0xe6c40000 0 64>;
 346                 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 347                 clocks = <&cpg CPG_MOD 204>;
 348                 clock-names = "fck";
 349                 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
 350                        <&dmac1 0x21>, <&dmac1 0x22>;
 351                 dma-names = "tx", "rx", "tx", "rx";
 352                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 353                 resets = <&cpg 204>;
 354                 status = "disabled";
 355         };
 356
 357         scifa1: serial@e6c50000 {
 358                 compatible = "renesas,scifa-r8a7794",
 359                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 360                 reg = <0 0xe6c50000 0 64>;
 361                 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 362                 clocks = <&cpg CPG_MOD 203>;
 363                 clock-names = "fck";
 364                 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
 365                        <&dmac1 0x25>, <&dmac1 0x26>;
 366                 dma-names = "tx", "rx", "tx", "rx";
 367                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 368                 resets = <&cpg 203>;
 369                 status = "disabled";
 370         };
 371
 372         scifa2: serial@e6c60000 {
 373                 compatible = "renesas,scifa-r8a7794",
 374                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 375                 reg = <0 0xe6c60000 0 64>;
 376                 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
 377                 clocks = <&cpg CPG_MOD 202>;
 378                 clock-names = "fck";
 379                 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
 380                        <&dmac1 0x27>, <&dmac1 0x28>;
 381                 dma-names = "tx", "rx", "tx", "rx";
 382                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 383                 resets = <&cpg 202>;
 384                 status = "disabled";
 385         };
 386
 387         scifa3: serial@e6c70000 {
 388                 compatible = "renesas,scifa-r8a7794",
 389                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 390                 reg = <0 0xe6c70000 0 64>;
 391                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 392                 clocks = <&cpg CPG_MOD 1106>;
 393                 clock-names = "fck";
 394                 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
 395                        <&dmac1 0x1b>, <&dmac1 0x1c>;
 396                 dma-names = "tx", "rx", "tx", "rx";
 397                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 398                 resets = <&cpg 1106>;
 399                 status = "disabled";
 400         };
 401
 402         scifa4: serial@e6c78000 {
 403                 compatible = "renesas,scifa-r8a7794",
 404                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 405                 reg = <0 0xe6c78000 0 64>;
 406                 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 407                 clocks = <&cpg CPG_MOD 1107>;
 408                 clock-names = "fck";
 409                 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
 410                        <&dmac1 0x1f>, <&dmac1 0x20>;
 411                 dma-names = "tx", "rx", "tx", "rx";
 412                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 413                 resets = <&cpg 1107>;
 414                 status = "disabled";
 415         };
 416
 417         scifa5: serial@e6c80000 {
 418                 compatible = "renesas,scifa-r8a7794",
 419                              "renesas,rcar-gen2-scifa", "renesas,scifa";
 420                 reg = <0 0xe6c80000 0 64>;
 421                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 422                 clocks = <&cpg CPG_MOD 1108>;
 423                 clock-names = "fck";
 424                 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
 425                        <&dmac1 0x23>, <&dmac1 0x24>;
 426                 dma-names = "tx", "rx", "tx", "rx";
 427                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 428                 resets = <&cpg 1108>;
 429                 status = "disabled";
 430         };
 431
 432         scifb0: serial@e6c20000 {
 433                 compatible = "renesas,scifb-r8a7794",
 434                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 435                 reg = <0 0xe6c20000 0 0x100>;
 436                 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
 437                 clocks = <&cpg CPG_MOD 206>;
 438                 clock-names = "fck";
 439                 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
 440                        <&dmac1 0x3d>, <&dmac1 0x3e>;
 441                 dma-names = "tx", "rx", "tx", "rx";
 442                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 443                 resets = <&cpg 206>;
 444                 status = "disabled";
 445         };
 446
 447         scifb1: serial@e6c30000 {
 448                 compatible = "renesas,scifb-r8a7794",
 449                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 450                 reg = <0 0xe6c30000 0 0x100>;
 451                 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
 452                 clocks = <&cpg CPG_MOD 207>;
 453                 clock-names = "fck";
 454                 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
 455                        <&dmac1 0x19>, <&dmac1 0x1a>;
 456                 dma-names = "tx", "rx", "tx", "rx";
 457                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 458                 resets = <&cpg 207>;
 459                 status = "disabled";
 460         };
 461
 462         scifb2: serial@e6ce0000 {
 463                 compatible = "renesas,scifb-r8a7794",
 464                              "renesas,rcar-gen2-scifb", "renesas,scifb";
 465                 reg = <0 0xe6ce0000 0 0x100>;
 466                 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
 467                 clocks = <&cpg CPG_MOD 216>;
 468                 clock-names = "fck";
 469                 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
 470                        <&dmac1 0x1d>, <&dmac1 0x1e>;
 471                 dma-names = "tx", "rx", "tx", "rx";
 472                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 473                 resets = <&cpg 216>;
 474                 status = "disabled";
 475         };
 476
 477         scif0: serial@e6e60000 {
 478                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 479                              "renesas,scif";
 480                 reg = <0 0xe6e60000 0 64>;
 481                 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 482                 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 483                          <&scif_clk>;
 484                 clock-names = "fck", "brg_int", "scif_clk";
 485                 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
 486                        <&dmac1 0x29>, <&dmac1 0x2a>;
 487                 dma-names = "tx", "rx", "tx", "rx";
 488                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 489                 resets = <&cpg 721>;
 490                 status = "disabled";
 491         };
 492
 493         scif1: serial@e6e68000 {
 494                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 495                              "renesas,scif";
 496                 reg = <0 0xe6e68000 0 64>;
 497                 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 498                 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 499                          <&scif_clk>;
 500                 clock-names = "fck", "brg_int", "scif_clk";
 501                 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
 502                        <&dmac1 0x2d>, <&dmac1 0x2e>;
 503                 dma-names = "tx", "rx", "tx", "rx";
 504                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 505                 resets = <&cpg 720>;
 506                 status = "disabled";
 507         };
 508
 509         scif2: serial@e6e58000 {
 510                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 511                              "renesas,scif";
 512                 reg = <0 0xe6e58000 0 64>;
 513                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 514                 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 515                          <&scif_clk>;
 516                 clock-names = "fck", "brg_int", "scif_clk";
 517                 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
 518                        <&dmac1 0x2b>, <&dmac1 0x2c>;
 519                 dma-names = "tx", "rx", "tx", "rx";
 520                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 521                 resets = <&cpg 719>;
 522                 status = "disabled";
 523         };
 524
 525         scif3: serial@e6ea8000 {
 526                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 527                              "renesas,scif";
 528                 reg = <0 0xe6ea8000 0 64>;
 529                 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 530                 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 531                          <&scif_clk>;
 532                 clock-names = "fck", "brg_int", "scif_clk";
 533                 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
 534                        <&dmac1 0x2f>, <&dmac1 0x30>;
 535                 dma-names = "tx", "rx", "tx", "rx";
 536                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 537                 resets = <&cpg 718>;
 538                 status = "disabled";
 539         };
 540
 541         scif4: serial@e6ee0000 {
 542                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 543                              "renesas,scif";
 544                 reg = <0 0xe6ee0000 0 64>;
 545                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 546                 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 547                          <&scif_clk>;
 548                 clock-names = "fck", "brg_int", "scif_clk";
 549                 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
 550                        <&dmac1 0xfb>, <&dmac1 0xfc>;
 551                 dma-names = "tx", "rx", "tx", "rx";
 552                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 553                 resets = <&cpg 715>;
 554                 status = "disabled";
 555         };
 556
 557         scif5: serial@e6ee8000 {
 558                 compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif",
 559                              "renesas,scif";
 560                 reg = <0 0xe6ee8000 0 64>;
 561                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 562                 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 563                          <&scif_clk>;
 564                 clock-names = "fck", "brg_int", "scif_clk";
 565                 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
 566                        <&dmac1 0xfd>, <&dmac1 0xfe>;
 567                 dma-names = "tx", "rx", "tx", "rx";
 568                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 569                 resets = <&cpg 714>;
 570                 status = "disabled";
 571         };
 572
 573         hscif0: serial@e62c0000 {
 574                 compatible = "renesas,hscif-r8a7794",
 575                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 576                 reg = <0 0xe62c0000 0 96>;
 577                 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 578                 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 579                          <&scif_clk>;
 580                 clock-names = "fck", "brg_int", "scif_clk";
 581                 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
 582                        <&dmac1 0x39>, <&dmac1 0x3a>;
 583                 dma-names = "tx", "rx", "tx", "rx";
 584                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 585                 resets = <&cpg 717>;
 586                 status = "disabled";
 587         };
 588
 589         hscif1: serial@e62c8000 {
 590                 compatible = "renesas,hscif-r8a7794",
 591                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 592                 reg = <0 0xe62c8000 0 96>;
 593                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 594                 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 595                          <&scif_clk>;
 596                 clock-names = "fck", "brg_int", "scif_clk";
 597                 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
 598                        <&dmac1 0x4d>, <&dmac1 0x4e>;
 599                 dma-names = "tx", "rx", "tx", "rx";
 600                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 601                 resets = <&cpg 716>;
 602                 status = "disabled";
 603         };
 604
 605         hscif2: serial@e62d0000 {
 606                 compatible = "renesas,hscif-r8a7794",
 607                              "renesas,rcar-gen2-hscif", "renesas,hscif";
 608                 reg = <0 0xe62d0000 0 96>;
 609                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 610                 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
 611                          <&scif_clk>;
 612                 clock-names = "fck", "brg_int", "scif_clk";
 613                 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
 614                        <&dmac1 0x3b>, <&dmac1 0x3c>;
 615                 dma-names = "tx", "rx", "tx", "rx";
 616                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 617                 resets = <&cpg 713>;
 618                 status = "disabled";
 619         };
 620
 621         icram0: sram@e63a0000 {
 622                 compatible = "mmio-sram";
 623                 reg = <0 0xe63a0000 0 0x12000>;
 624         };
 625
 626         icram1: sram@e63c0000 {
 627                 compatible = "mmio-sram";
 628                 reg = <0 0xe63c0000 0 0x1000>;
 629                 #address-cells = <1>;
 630                 #size-cells = <1>;
 631                 ranges = <0 0 0xe63c0000 0x1000>;
 632
 633                 smp-sram@0 {
 634                         compatible = "renesas,smp-sram";
 635                         reg = <0 0x10>;
 636                 };
 637         };
 638
 639         ether: ethernet@ee700000 {
 640                 compatible = "renesas,ether-r8a7794";
 641                 reg = <0 0xee700000 0 0x400>;
 642                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 643                 clocks = <&cpg CPG_MOD 813>;
 644                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 645                 resets = <&cpg 813>;
 646                 phy-mode = "rmii";
 647                 #address-cells = <1>;
 648                 #size-cells = <0>;
 649                 status = "disabled";
 650         };
 651
 652         avb: ethernet@e6800000 {
 653                 compatible = "renesas,etheravb-r8a7794",
 654                              "renesas,etheravb-rcar-gen2";
 655                 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
 656                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 657                 clocks = <&cpg CPG_MOD 812>;
 658                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 659                 resets = <&cpg 812>;
 660                 #address-cells = <1>;
 661                 #size-cells = <0>;
 662                 status = "disabled";
 663         };
 664
 665         /* The memory map in the User's Manual maps the cores to bus numbers */
 666         i2c0: i2c@e6508000 {
 667                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 668                 reg = <0 0xe6508000 0 0x40>;
 669                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 670                 clocks = <&cpg CPG_MOD 931>;
 671                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 672                 resets = <&cpg 931>;
 673                 #address-cells = <1>;
 674                 #size-cells = <0>;
 675                 i2c-scl-internal-delay-ns = <6>;
 676                 status = "disabled";
 677         };
 678
 679         i2c1: i2c@e6518000 {
 680                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 681                 reg = <0 0xe6518000 0 0x40>;
 682                 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 683                 clocks = <&cpg CPG_MOD 930>;
 684                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 685                 resets = <&cpg 930>;
 686                 #address-cells = <1>;
 687                 #size-cells = <0>;
 688                 i2c-scl-internal-delay-ns = <6>;
 689                 status = "disabled";
 690         };
 691
 692         i2c2: i2c@e6530000 {
 693                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 694                 reg = <0 0xe6530000 0 0x40>;
 695                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 696                 clocks = <&cpg CPG_MOD 929>;
 697                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 698                 resets = <&cpg 929>;
 699                 #address-cells = <1>;
 700                 #size-cells = <0>;
 701                 i2c-scl-internal-delay-ns = <6>;
 702                 status = "disabled";
 703         };
 704
 705         i2c3: i2c@e6540000 {
 706                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 707                 reg = <0 0xe6540000 0 0x40>;
 708                 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 709                 clocks = <&cpg CPG_MOD 928>;
 710                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 711                 resets = <&cpg 928>;
 712                 #address-cells = <1>;
 713                 #size-cells = <0>;
 714                 i2c-scl-internal-delay-ns = <6>;
 715                 status = "disabled";
 716         };
 717
 718         i2c4: i2c@e6520000 {
 719                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 720                 reg = <0 0xe6520000 0 0x40>;
 721                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 722                 clocks = <&cpg CPG_MOD 927>;
 723                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 724                 resets = <&cpg 927>;
 725                 #address-cells = <1>;
 726                 #size-cells = <0>;
 727                 i2c-scl-internal-delay-ns = <6>;
 728                 status = "disabled";
 729         };
 730
 731         i2c5: i2c@e6528000 {
 732                 compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c";
 733                 reg = <0 0xe6528000 0 0x40>;
 734                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 735                 clocks = <&cpg CPG_MOD 925>;
 736                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 737                 resets = <&cpg 925>;
 738                 #address-cells = <1>;
 739                 #size-cells = <0>;
 740                 i2c-scl-internal-delay-ns = <6>;
 741                 status = "disabled";
 742         };
 743
 744         i2c6: i2c@e6500000 {
 745                 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
 746                              "renesas,rmobile-iic";
 747                 reg = <0 0xe6500000 0 0x425>;
 748                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 749                 clocks = <&cpg CPG_MOD 318>;
 750                 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
 751                        <&dmac1 0x61>, <&dmac1 0x62>;
 752                 dma-names = "tx", "rx", "tx", "rx";
 753                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 754                 resets = <&cpg 318>;
 755                 #address-cells = <1>;
 756                 #size-cells = <0>;
 757                 status = "disabled";
 758         };
 759
 760         i2c7: i2c@e6510000 {
 761                 compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic",
 762                              "renesas,rmobile-iic";
 763                 reg = <0 0xe6510000 0 0x425>;
 764                 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
 765                 clocks = <&cpg CPG_MOD 323>;
 766                 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
 767                        <&dmac1 0x65>, <&dmac1 0x66>;
 768                 dma-names = "tx", "rx", "tx", "rx";
 769                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 770                 resets = <&cpg 323>;
 771                 #address-cells = <1>;
 772                 #size-cells = <0>;
 773                 status = "disabled";
 774         };
 775
 776         mmcif0: mmc@ee200000 {
 777                 compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif";
 778                 reg = <0 0xee200000 0 0x80>;
 779                 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
 780                 clocks = <&cpg CPG_MOD 315>;
 781                 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
 782                        <&dmac1 0xd1>, <&dmac1 0xd2>;
 783                 dma-names = "tx", "rx", "tx", "rx";
 784                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 785                 resets = <&cpg 315>;
 786                 reg-io-width = <4>;
 787                 status = "disabled";
 788         };
 789
 790         sdhi0: sd@ee100000 {
 791                 compatible = "renesas,sdhi-r8a7794";
 792                 reg = <0 0xee100000 0 0x328>;
 793                 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 794                 clocks = <&cpg CPG_MOD 314>;
 795                 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
 796                        <&dmac1 0xcd>, <&dmac1 0xce>;
 797                 dma-names = "tx", "rx", "tx", "rx";
 798                 max-frequency = <195000000>;
 799                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 800                 resets = <&cpg 314>;
 801                 status = "disabled";
 802         };
 803
 804         sdhi1: sd@ee140000 {
 805                 compatible = "renesas,sdhi-r8a7794";
 806                 reg = <0 0xee140000 0 0x100>;
 807                 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
 808                 clocks = <&cpg CPG_MOD 312>;
 809                 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
 810                        <&dmac1 0xc1>, <&dmac1 0xc2>;
 811                 dma-names = "tx", "rx", "tx", "rx";
 812                 max-frequency = <97500000>;
 813                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 814                 resets = <&cpg 312>;
 815                 status = "disabled";
 816         };
 817
 818         sdhi2: sd@ee160000 {
 819                 compatible = "renesas,sdhi-r8a7794";
 820                 reg = <0 0xee160000 0 0x100>;
 821                 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 822                 clocks = <&cpg CPG_MOD 311>;
 823                 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
 824                        <&dmac1 0xd3>, <&dmac1 0xd4>;
 825                 dma-names = "tx", "rx", "tx", "rx";
 826                 max-frequency = <97500000>;
 827                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 828                 resets = <&cpg 311>;
 829                 status = "disabled";
 830         };
 831
 832         qspi: spi@e6b10000 {
 833                 compatible = "renesas,qspi-r8a7794", "renesas,qspi";
 834                 reg = <0 0xe6b10000 0 0x2c>;
 835                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 836                 clocks = <&cpg CPG_MOD 917>;
 837                 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
 838                        <&dmac1 0x17>, <&dmac1 0x18>;
 839                 dma-names = "tx", "rx", "tx", "rx";
 840                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 841                 resets = <&cpg 917>;
 842                 num-cs = <1>;
 843                 #address-cells = <1>;
 844                 #size-cells = <0>;
 845                 status = "disabled";
 846         };
 847
 848         vin0: video@e6ef0000 {
 849                 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
 850                 reg = <0 0xe6ef0000 0 0x1000>;
 851                 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 852                 clocks = <&cpg CPG_MOD 811>;
 853                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 854                 resets = <&cpg 811>;
 855                 status = "disabled";
 856         };
 857
 858         vin1: video@e6ef1000 {
 859                 compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin";
 860                 reg = <0 0xe6ef1000 0 0x1000>;
 861                 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 862                 clocks = <&cpg CPG_MOD 810>;
 863                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 864                 resets = <&cpg 810>;
 865                 status = "disabled";
 866         };
 867
 868         pci0: pci@ee090000 {
 869                 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
 870                 device_type = "pci";
 871                 reg = <0 0xee090000 0 0xc00>,
 872                       <0 0xee080000 0 0x1100>;
 873                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 874                 clocks = <&cpg CPG_MOD 703>;
 875                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 876                 resets = <&cpg 703>;
 877                 status = "disabled";
 878
 879                 bus-range = <0 0>;
 880                 #address-cells = <3>;
 881                 #size-cells = <2>;
 882                 #interrupt-cells = <1>;
 883                 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
 884                 interrupt-map-mask = <0xff00 0 0 0x7>;
 885                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 886                                  0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
 887                                  0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 888
 889                 usb@1,0 {
 890                         reg = <0x800 0 0 0 0>;
 891                         phys = <&usb0 0>;
 892                         phy-names = "usb";
 893                 };
 894
 895                 usb@2,0 {
 896                         reg = <0x1000 0 0 0 0>;
 897                         phys = <&usb0 0>;
 898                         phy-names = "usb";
 899                 };
 900         };
 901
 902         pci1: pci@ee0d0000 {
 903                 compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2";
 904                 device_type = "pci";
 905                 reg = <0 0xee0d0000 0 0xc00>,
 906                       <0 0xee0c0000 0 0x1100>;
 907                 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 908                 clocks = <&cpg CPG_MOD 703>;
 909                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 910                 resets = <&cpg 703>;
 911                 status = "disabled";
 912
 913                 bus-range = <1 1>;
 914                 #address-cells = <3>;
 915                 #size-cells = <2>;
 916                 #interrupt-cells = <1>;
 917                 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
 918                 interrupt-map-mask = <0xff00 0 0 0x7>;
 919                 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 920                                  0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
 921                                  0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
 922
 923                 usb@1,0 {
 924                         reg = <0x10800 0 0 0 0>;
 925                         phys = <&usb2 0>;
 926                         phy-names = "usb";
 927                 };
 928
 929                 usb@2,0 {
 930                         reg = <0x11000 0 0 0 0>;
 931                         phys = <&usb2 0>;
 932                         phy-names = "usb";
 933                 };
 934         };
 935
 936         hsusb: usb@e6590000 {
 937                 compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs";
 938                 reg = <0 0xe6590000 0 0x100>;
 939                 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 940                 clocks = <&cpg CPG_MOD 704>;
 941                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 942                 resets = <&cpg 704>;
 943                 renesas,buswait = <4>;
 944                 phys = <&usb0 1>;
 945                 phy-names = "usb";
 946                 status = "disabled";
 947         };
 948
 949         usbphy: usb-phy@e6590100 {
 950                 compatible = "renesas,usb-phy-r8a7794",
 951                              "renesas,rcar-gen2-usb-phy";
 952                 reg = <0 0xe6590100 0 0x100>;
 953                 #address-cells = <1>;
 954                 #size-cells = <0>;
 955                 clocks = <&cpg CPG_MOD 704>;
 956                 clock-names = "usbhs";
 957                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 958                 resets = <&cpg 704>;
 959                 status = "disabled";
 960
 961                 usb0: usb-channel@0 {
 962                         reg = <0>;
 963                         #phy-cells = <1>;
 964                 };
 965                 usb2: usb-channel@2 {
 966                         reg = <2>;
 967                         #phy-cells = <1>;
 968                 };
 969         };
 970
 971         vsp@fe928000 {
 972                 compatible = "renesas,vsp1";
 973                 reg = <0 0xfe928000 0 0x8000>;
 974                 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
 975                 clocks = <&cpg CPG_MOD 131>;
 976                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 977                 resets = <&cpg 131>;
 978         };
 979
 980         vsp@fe930000 {
 981                 compatible = "renesas,vsp1";
 982                 reg = <0 0xfe930000 0 0x8000>;
 983                 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
 984                 clocks = <&cpg CPG_MOD 128>;
 985                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
 986                 resets = <&cpg 128>;
 987         };
 988
 989         du: display@feb00000 {
 990                 compatible = "renesas,du-r8a7794";
 991                 reg = <0 0xfeb00000 0 0x40000>;
 992                 reg-names = "du";
 993                 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
 994                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 995                 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
 996                 clock-names = "du.0", "du.1";
 997                 status = "disabled";
 998
 999                 ports {
1000                         #address-cells = <1>;
1001                         #size-cells = <0>;
1002
1003                         port@0 {
1004                                 reg = <0>;
1005                                 du_out_rgb0: endpoint {
1006                                 };
1007                         };
1008                         port@1 {
1009                                 reg = <1>;
1010                                 du_out_rgb1: endpoint {
1011                                 };
1012                         };
1013                 };
1014         };
1015
1016         can0: can@e6e80000 {
1017                 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1018                 reg = <0 0xe6e80000 0 0x1000>;
1019                 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1020                 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1021                          <&can_clk>;
1022                 clock-names = "clkp1", "clkp2", "can_clk";
1023                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1024                 resets = <&cpg 916>;
1025                 status = "disabled";
1026         };
1027
1028         can1: can@e6e88000 {
1029                 compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
1030                 reg = <0 0xe6e88000 0 0x1000>;
1031                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1032                 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
1033                          <&can_clk>;
1034                 clock-names = "clkp1", "clkp2", "can_clk";
1035                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1036                 resets = <&cpg 915>;
1037                 status = "disabled";
1038         };
1039
1040         /* External root clock */
1041         extal_clk: extal {
1042                 compatible = "fixed-clock";
1043                 #clock-cells = <0>;
1044                 /* This value must be overridden by the board. */
1045                 clock-frequency = <0>;
1046         };
1047
1048         /* External USB clock - can be overridden by the board */
1049         usb_extal_clk: usb_extal {
1050                 compatible = "fixed-clock";
1051                 #clock-cells = <0>;
1052                 clock-frequency = <48000000>;
1053         };
1054
1055         /* External CAN clock */
1056         can_clk: can {
1057                 compatible = "fixed-clock";
1058                 #clock-cells = <0>;
1059                 /* This value must be overridden by the board. */
1060                 clock-frequency = <0>;
1061         };
1062
1063         /* External SCIF clock */
1064         scif_clk: scif {
1065                 compatible = "fixed-clock";
1066                 #clock-cells = <0>;
1067                 /* This value must be overridden by the board. */
1068                 clock-frequency = <0>;
1069         };
1070
1071         /*
1072          * The external audio clocks are configured  as 0 Hz fixed
1073          * frequency clocks by default.  Boards that provide audio
1074          * clocks should override them.
1075          */
1076         audio_clka: audio_clka {
1077                 compatible = "fixed-clock";
1078                 #clock-cells = <0>;
1079                 clock-frequency = <0>;
1080         };
1081         audio_clkb: audio_clkb {
1082                 compatible = "fixed-clock";
1083                 #clock-cells = <0>;
1084                 clock-frequency = <0>;
1085         };
1086         audio_clkc: audio_clkc {
1087                 compatible = "fixed-clock";
1088                 #clock-cells = <0>;
1089                 clock-frequency = <0>;
1090         };
1091
1092         cpg: clock-controller@e6150000 {
1093                 compatible = "renesas,r8a7794-cpg-mssr";
1094                 reg = <0 0xe6150000 0 0x1000>;
1095                 clocks = <&extal_clk>, <&usb_extal_clk>;
1096                 clock-names = "extal", "usb_extal";
1097                 #clock-cells = <2>;
1098                 #power-domain-cells = <0>;
1099                 #reset-cells = <1>;
1100         };
1101
1102         rst: reset-controller@e6160000 {
1103                 compatible = "renesas,r8a7794-rst";
1104                 reg = <0 0xe6160000 0 0x0100>;
1105         };
1106
1107         prr: chipid@ff000044 {
1108                 compatible = "renesas,prr";
1109                 reg = <0 0xff000044 0 4>;
1110         };
1111
1112         sysc: system-controller@e6180000 {
1113                 compatible = "renesas,r8a7794-sysc";
1114                 reg = <0 0xe6180000 0 0x0200>;
1115                 #power-domain-cells = <1>;
1116         };
1117
1118         ipmmu_sy0: mmu@e6280000 {
1119                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1120                 reg = <0 0xe6280000 0 0x1000>;
1121                 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1122                              <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1123                 #iommu-cells = <1>;
1124                 status = "disabled";
1125         };
1126
1127         ipmmu_sy1: mmu@e6290000 {
1128                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1129                 reg = <0 0xe6290000 0 0x1000>;
1130                 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1131                 #iommu-cells = <1>;
1132                 status = "disabled";
1133         };
1134
1135         ipmmu_ds: mmu@e6740000 {
1136                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1137                 reg = <0 0xe6740000 0 0x1000>;
1138                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1139                              <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1140                 #iommu-cells = <1>;
1141                 status = "disabled";
1142         };
1143
1144         ipmmu_mp: mmu@ec680000 {
1145                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1146                 reg = <0 0xec680000 0 0x1000>;
1147                 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1148                 #iommu-cells = <1>;
1149                 status = "disabled";
1150         };
1151
1152         ipmmu_mx: mmu@fe951000 {
1153                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1154                 reg = <0 0xfe951000 0 0x1000>;
1155                 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1156                              <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1157                 #iommu-cells = <1>;
1158                 status = "disabled";
1159         };
1160
1161         ipmmu_gp: mmu@e62a0000 {
1162                 compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa";
1163                 reg = <0 0xe62a0000 0 0x1000>;
1164                 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
1165                              <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
1166                 #iommu-cells = <1>;
1167                 status = "disabled";
1168         };
1169
1170         rcar_sound: sound@ec500000 {
1171                 /*
1172                  * #sound-dai-cells is required
1173                  *
1174                  * Single DAI : #sound-dai-cells = <0>;         <&rcar_sound>;
1175                  * Multi  DAI : #sound-dai-cells = <1>;         <&rcar_sound N>;
1176                  */
1177                 compatible = "renesas,rcar_sound-r8a7794",
1178                              "renesas,rcar_sound-gen2";
1179                 reg =   <0 0xec500000 0 0x1000>, /* SCU */
1180                         <0 0xec5a0000 0 0x100>,  /* ADG */
1181                         <0 0xec540000 0 0x1000>, /* SSIU */
1182                         <0 0xec541000 0 0x280>,  /* SSI */
1183                         <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri */
1184                 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1185
1186                 clocks = <&cpg CPG_MOD 1005>,
1187                          <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1188                          <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1189                          <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1190                          <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1191                          <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1192                          <&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
1193                          <&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
1194                          <&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
1195                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1196                          <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1197                          <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1198                          <&audio_clka>, <&audio_clkb>, <&audio_clkc>,
1199                          <&cpg CPG_CORE R8A7794_CLK_M2>;
1200                 clock-names = "ssi-all",
1201                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1202                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1203                               "src.6", "src.5", "src.4", "src.3", "src.2",
1204                               "src.1",
1205                               "ctu.0", "ctu.1",
1206                               "mix.0", "mix.1",
1207                               "dvc.0", "dvc.1",
1208                               "clk_a", "clk_b", "clk_c", "clk_i";
1209                 power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
1210                 resets = <&cpg 1005>,
1211                          <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1212                          <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1213                          <&cpg 1014>, <&cpg 1015>;
1214                 reset-names = "ssi-all",
1215                               "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1216                               "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1217
1218                 status = "disabled";
1219
1220                 rcar_sound,dvc {
1221                         dvc0: dvc-0 {
1222                                 dmas = <&audma0 0xbc>;
1223                                 dma-names = "tx";
1224                         };
1225                         dvc1: dvc-1 {
1226                                 dmas = <&audma0 0xbe>;
1227                                 dma-names = "tx";
1228                         };
1229                 };
1230
1231                 rcar_sound,mix {
1232                         mix0: mix-0 { };
1233                         mix1: mix-1 { };
1234                 };
1235
1236                 rcar_sound,ctu {
1237                         ctu00: ctu-0 { };
1238                         ctu01: ctu-1 { };
1239                         ctu02: ctu-2 { };
1240                         ctu03: ctu-3 { };
1241                         ctu10: ctu-4 { };
1242                         ctu11: ctu-5 { };
1243                         ctu12: ctu-6 { };
1244                         ctu13: ctu-7 { };
1245                 };
1246
1247                 rcar_sound,src {
1248                         src-0 {
1249                                 status = "disabled";
1250                         };
1251                         src1: src-1 {
1252                                 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1253                                 dmas = <&audma0 0x87>, <&audma0 0x9c>;
1254                                 dma-names = "rx", "tx";
1255                         };
1256                         src2: src-2 {
1257                                 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1258                                 dmas = <&audma0 0x89>, <&audma0 0x9e>;
1259                                 dma-names = "rx", "tx";
1260                         };
1261                         src3: src-3 {
1262                                 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1263                                 dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1264                                 dma-names = "rx", "tx";
1265                         };
1266                         src4: src-4 {
1267                                 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1268                                 dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1269                                 dma-names = "rx", "tx";
1270                         };
1271                         src5: src-5 {
1272                                 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1273                                 dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1274                                 dma-names = "rx", "tx";
1275                         };
1276                         src6: src-6 {
1277                                 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1278                                 dmas = <&audma0 0x91>, <&audma0 0xb4>;
1279                                 dma-names = "rx", "tx";
1280                         };
1281                 };
1282
1283                 rcar_sound,ssi {
1284                         ssi0: ssi-0 {
1285                                 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1286                                 dmas = <&audma0 0x01>, <&audma0 0x02>,
1287                                        <&audma0 0x15>, <&audma0 0x16>;
1288                                 dma-names = "rx", "tx", "rxu", "txu";
1289                         };
1290                         ssi1: ssi-1 {
1291                                 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1292                                 dmas = <&audma0 0x03>, <&audma0 0x04>,
1293                                        <&audma0 0x49>, <&audma0 0x4a>;
1294                                 dma-names = "rx", "tx", "rxu", "txu";
1295                         };
1296                         ssi2: ssi-2 {
1297                                 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1298                                 dmas = <&audma0 0x05>, <&audma0 0x06>,
1299                                        <&audma0 0x63>, <&audma0 0x64>;
1300                                 dma-names = "rx", "tx", "rxu", "txu";
1301                         };
1302                         ssi3: ssi-3 {
1303                                 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1304                                 dmas = <&audma0 0x07>, <&audma0 0x08>,
1305                                        <&audma0 0x6f>, <&audma0 0x70>;
1306                                 dma-names = "rx", "tx", "rxu", "txu";
1307                         };
1308                         ssi4: ssi-4 {
1309                                 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1310                                 dmas = <&audma0 0x09>, <&audma0 0x0a>,
1311                                        <&audma0 0x71>, <&audma0 0x72>;
1312                                 dma-names = "rx", "tx", "rxu", "txu";
1313                         };
1314                         ssi5: ssi-5 {
1315                                 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1316                                 dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1317                                        <&audma0 0x73>, <&audma0 0x74>;
1318                                 dma-names = "rx", "tx", "rxu", "txu";
1319                         };
1320                         ssi6: ssi-6 {
1321                                 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1322                                 dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1323                                        <&audma0 0x75>, <&audma0 0x76>;
1324                                 dma-names = "rx", "tx", "rxu", "txu";
1325                         };
1326                         ssi7: ssi-7 {
1327                                 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1328                                 dmas = <&audma0 0x0f>, <&audma0 0x10>,
1329                                        <&audma0 0x79>, <&audma0 0x7a>;
1330                                 dma-names = "rx", "tx", "rxu", "txu";
1331                         };
1332                         ssi8: ssi-8 {
1333                                 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1334                                 dmas = <&audma0 0x11>, <&audma0 0x12>,
1335                                        <&audma0 0x7b>, <&audma0 0x7c>;
1336                                 dma-names = "rx", "tx", "rxu", "txu";
1337                         };
1338                         ssi9: ssi-9 {
1339                                 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1340                                 dmas = <&audma0 0x13>, <&audma0 0x14>,
1341                                        <&audma0 0x7d>, <&audma0 0x7e>;
1342                                 dma-names = "rx", "tx", "rxu", "txu";
1343                         };
1344                 };
1345         };
1346 };