arch/arm/dts/armada-38x-controlcenterdc.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Device Tree file for the Guntermann & Drunck ControlCenter-Compact board
   4  *
   5  * Copyright (C) 2016 Mario Six <mario.six@gdsys.cc>
   6  *
   7  * based on the Device Tree file for Marvell Armada 388 evaluation board
   8  * (DB-88F6820), which is
   9  *
  10  * Copyright (C) 2014 Marvell
  11  *
  12  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  13  */
  14
  15 /dts-v1/;
  16
  17 #include "armada-388.dtsi"
  18
  19 &gpio0 {
  20         u-boot,dm-pre-reloc;
  21 };
  22
  23 &gpio1 {
  24         u-boot,dm-pre-reloc;
  25 };
  26
  27 &uart0 {
  28         u-boot,dm-pre-reloc;
  29 };
  30
  31 &uart1 {
  32         u-boot,dm-pre-reloc;
  33 };
  34
  35 / {
  36         model = "Controlcenter Digital Compact";
  37         compatible = "marvell,a385-db", "marvell,armada388",
  38                 "marvell,armada385", "marvell,armada380";
  39
  40         chosen {
  41                 bootargs = "console=ttyS1,115200 earlyprintk";
  42                 stdout-path = "/soc/internal-regs/serial@12100";
  43         };
  44
  45         aliases {
  46                 ethernet0 = &eth0;
  47                 ethernet2 = &eth2;
  48                 mdio-gpio0 = &MDIO0;
  49                 mdio-gpio1 = &MDIO1;
  50                 mdio-gpio2 = &MDIO2;
  51                 spi0 = &spi0;
  52                 spi1 = &spi1;
  53                 i2c0 = &I2C0;
  54                 i2c1 = &I2C1;
  55         };
  56
  57         memory {
  58                 device_type = "memory";
  59                 reg = <0x00000000 0x10000000>; /* 256 MB */
  60         };
  61
  62         clocks {
  63                 sc16isclk: sc16isclk {
  64                         compatible = "fixed-clock";
  65                         #clock-cells = <0>;
  66                         clock-frequency = <11059200>;
  67                 };
  68         };
  69
  70         soc {
  71                 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  72                           MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
  73
  74                 internal-regs {
  75                         spi0: spi@10600 {
  76                                 status = "okay";
  77                                 sc16is741: sc16is741@0 {
  78                                         compatible = "nxp,sc16is741";
  79                                         reg = <0>;
  80                                         clocks = <&sc16isclk>;
  81                                         spi-max-frequency = <4000000>;
  82                                         interrupt-parent = <&gpio0>;
  83                                         interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
  84                                         gpio-controller;
  85                                         #gpio-cells = <2>;
  86                                 };
  87                         };
  88
  89                         spi1: spi@10680 {
  90                                 status = "okay";
  91                                 u-boot,dm-pre-reloc;
  92                                 spi-flash@0 {
  93                                         #address-cells = <1>;
  94                                         #size-cells = <1>;
  95                                         compatible = "n25q016a";
  96                                         reg = <0>; /* Chip select 0 */
  97                                         spi-max-frequency = <108000000>;
  98                                 };
  99                                 spi-flash@1 {
 100                                         #address-cells = <1>;
 101                                         #size-cells = <1>;
 102                                         compatible = "n25q128a11";
 103                                         reg = <1>; /* Chip select 1 */
 104                                         spi-max-frequency = <108000000>;
 105                                         u-boot,dm-pre-reloc;
 106                                 };
 107                         };
 108
 109                         I2C0: i2c@11000 {
 110                                 status = "okay";
 111                                 clock-frequency = <1000000>;
 112                                 u-boot,dm-pre-reloc;
 113                                 PCA21: pca9698@21 {
 114                                         compatible = "nxp,pca9698";
 115                                         reg = <0x21>;
 116                                         #gpio-cells = <2>;
 117                                         gpio-controller;
 118                                 };
 119                                 PCA22: pca9698@22 {
 120                                         compatible = "nxp,pca9698";
 121                                         u-boot,dm-pre-reloc;
 122                                         reg = <0x22>;
 123                                         #gpio-cells = <2>;
 124                                         gpio-controller;
 125                                 };
 126                                 PCA23: pca9698@23 {
 127                                         compatible = "nxp,pca9698";
 128                                         reg = <0x23>;
 129                                         #gpio-cells = <2>;
 130                                         gpio-controller;
 131                                 };
 132                                 PCA24: pca9698@24 {
 133                                         compatible = "nxp,pca9698";
 134                                         reg = <0x24>;
 135                                         #gpio-cells = <2>;
 136                                         gpio-controller;
 137                                 };
 138                                 PCA25: pca9698@25 {
 139                                         compatible = "nxp,pca9698";
 140                                         reg = <0x25>;
 141                                         #gpio-cells = <2>;
 142                                         gpio-controller;
 143                                 };
 144                                 PCA26: pca9698@26 {
 145                                         compatible = "nxp,pca9698";
 146                                         reg = <0x26>;
 147                                         #gpio-cells = <2>;
 148                                         gpio-controller;
 149                                 };
 150                         };
 151
 152                         I2C1: i2c@11100 {
 153                                 status = "okay";
 154                                 clock-frequency = <400000>;
 155                                 at97sc3205t@29 {
 156                                         compatible = "atmel,at97sc3204t";
 157                                         reg = <0x29>;
 158                                         u-boot,i2c-offset-len = <0>;
 159                                 };
 160                                 emc2305@2d {
 161                                         compatible = "smsc,emc2305";
 162                                         #address-cells = <1>;
 163                                         #size-cells = <0>;
 164                                         reg = <0x2d>;
 165                                         fan@0 {
 166                                                 reg = <0>;
 167                                         };
 168                                         fan@1 {
 169                                                 reg = <1>;
 170                                         };
 171                                         fan@2 {
 172                                                 reg = <2>;
 173                                         };
 174                                         fan@3 {
 175                                                 reg = <3>;
 176                                         };
 177                                         fan@4 {
 178                                                 reg = <4>;
 179                                         };
 180                                 };
 181                                 lm77@48 {
 182                                         compatible = "national,lm77";
 183                                         reg = <0x48>;
 184                                 };
 185                                 ads1015@49 {
 186                                         compatible = "ti,ads1015";
 187                                         reg = <0x49>;
 188                                 };
 189                                 lm77@4a {
 190                                         compatible = "national,lm77";
 191                                         reg = <0x4a>;
 192                                 };
 193                                 ads1015@4b {
 194                                         compatible = "ti,ads1015";
 195                                         reg = <0x4b>;
 196                                 };
 197                                 emc2305@4c {
 198                                         compatible = "smsc,emc2305";
 199                                         #address-cells = <1>;
 200                                         #size-cells = <0>;
 201                                         reg = <0x4c>;
 202                                         fan@0 {
 203                                                 reg = <0>;
 204                                         };
 205                                         fan@1 {
 206                                                 reg = <1>;
 207                                         };
 208                                         fan@2 {
 209                                                 reg = <2>;
 210                                         };
 211                                         fan@3 {
 212                                                 reg = <3>;
 213                                         };
 214                                         fan@4 {
 215                                                 reg = <4>;
 216                                         };
 217                                 };
 218                                 at24c512@54 {
 219                                         compatible = "atmel,24c512";
 220                                         reg = <0x54>;
 221                                         u-boot,i2c-offset-len = <2>;
 222                                 };
 223                                 ds1339@68 {
 224                                         compatible = "dallas,ds1339";
 225                                         reg = <0x68>;
 226                                 };
 227                         };
 228
 229                         serial@12000 {
 230                                 status = "okay";
 231                         };
 232
 233                         serial@12100 {
 234                                 status = "okay";
 235                         };
 236
 237                         ethernet@34000 {
 238                                 status = "okay";
 239                                 phy = <&phy1>;
 240                                 phy-mode = "sgmii";
 241                         };
 242
 243                         usb@58000 {
 244                                 status = "ok";
 245                         };
 246
 247                         ethernet@70000 {
 248                                 status = "okay";
 249                                 phy = <&phy0>;
 250                                 phy-mode = "sgmii";
 251                         };
 252
 253                         mdio@72004 {
 254                                 phy0: ethernet-phy@0 {
 255                                         reg = <1>;
 256                                 };
 257
 258                                 phy1: ethernet-phy@1 {
 259                                         reg = <0>;
 260                                 };
 261                         };
 262
 263                         sata@a8000 {
 264                                 status = "okay";
 265                         };
 266
 267                         sdhci@d8000 {
 268                                 broken-cd;
 269                                 wp-inverted;
 270                                 bus-width = <4>;
 271                                 status = "okay";
 272                                 no-1-8-v;
 273                         };
 274
 275                         usb3@f0000 {
 276                                 status = "okay";
 277                         };
 278                 };
 279
 280                 pcie-controller {
 281                         status = "okay";
 282                         /*
 283                          * The two PCIe units are accessible through
 284                          * standard PCIe slots on the board.
 285                          */
 286                         pcie@3,0 {
 287                                 /* Port 0, Lane 0 */
 288                                 status = "okay";
 289                         };
 290                 };
 291
 292                 MDIO0: mdio0 {
 293                         compatible = "virtual,mdio-gpio";
 294                         #address-cells = <1>;
 295                         #size-cells = <0>;
 296                         gpios = < /*MDC*/ &gpio0 13 0
 297                                   /*MDIO*/ &gpio0 14 0>;
 298                         mv88e1240@0 {
 299                                 reg = <0x0>;
 300                         };
 301                         mv88e1240@1 {
 302                                 reg = <0x1>;
 303                         };
 304                         mv88e1240@2 {
 305                                 reg = <0x2>;
 306                         };
 307                         mv88e1240@3 {
 308                                 reg = <0x3>;
 309                         };
 310                         mv88e1240@4 {
 311                                 reg = <0x4>;
 312                         };
 313                         mv88e1240@5 {
 314                                 reg = <0x5>;
 315                         };
 316                         mv88e1240@6 {
 317                                 reg = <0x6>;
 318                         };
 319                         mv88e1240@7 {
 320                                 reg = <0x7>;
 321                         };
 322                         mv88e1240@8 {
 323                                 reg = <0x8>;
 324                         };
 325                         mv88e1240@9 {
 326                                 reg = <0x9>;
 327                         };
 328                         mv88e1240@a {
 329                                 reg = <0xa>;
 330                         };
 331                         mv88e1240@b {
 332                                 reg = <0xb>;
 333                         };
 334                         mv88e1240@c {
 335                                 reg = <0xc>;
 336                         };
 337                         mv88e1240@d {
 338                                 reg = <0xd>;
 339                         };
 340                         mv88e1240@e {
 341                                 reg = <0xe>;
 342                         };
 343                         mv88e1240@f {
 344                                 reg = <0xf>;
 345                         };
 346                         mv88e1240@10 {
 347                                 reg = <0x10>;
 348                         };
 349                         mv88e1240@11 {
 350                                 reg = <0x11>;
 351                         };
 352                         mv88e1240@12 {
 353                                 reg = <0x12>;
 354                         };
 355                         mv88e1240@13 {
 356                                 reg = <0x13>;
 357                         };
 358                         mv88e1240@14 {
 359                                 reg = <0x14>;
 360                         };
 361                         mv88e1240@15 {
 362                                 reg = <0x15>;
 363                         };
 364                         mv88e1240@16 {
 365                                 reg = <0x16>;
 366                         };
 367                         mv88e1240@17 {
 368                                 reg = <0x17>;
 369                         };
 370                         mv88e1240@18 {
 371                                 reg = <0x18>;
 372                         };
 373                         mv88e1240@19 {
 374                                 reg = <0x19>;
 375                         };
 376                         mv88e1240@1a {
 377                                 reg = <0x1a>;
 378                         };
 379                         mv88e1240@1b {
 380                                 reg = <0x1b>;
 381                         };
 382                         mv88e1240@1c {
 383                                 reg = <0x1c>;
 384                         };
 385                         mv88e1240@1d {
 386                                 reg = <0x1d>;
 387                         };
 388                         mv88e1240@1e {
 389                                 reg = <0x1e>;
 390                         };
 391                         mv88e1240@1f {
 392                                 reg = <0x1f>;
 393                         };
 394                 };
 395
 396                 MDIO1: mdio1 {
 397                         compatible = "virtual,mdio-gpio";
 398                         #address-cells = <1>;
 399                         #size-cells = <0>;
 400                         gpios = < /*MDC*/ &gpio0 25 0
 401                                   /*MDIO*/ &gpio1 13 0>;
 402                         mv88e1240@0 {
 403                                 reg = <0x0>;
 404                         };
 405                         mv88e1240@1 {
 406                                 reg = <0x1>;
 407                         };
 408                         mv88e1240@2 {
 409                                 reg = <0x2>;
 410                         };
 411                         mv88e1240@3 {
 412                                 reg = <0x3>;
 413                         };
 414                         mv88e1240@4 {
 415                                 reg = <0x4>;
 416                         };
 417                         mv88e1240@5 {
 418                                 reg = <0x5>;
 419                         };
 420                         mv88e1240@6 {
 421                                 reg = <0x6>;
 422                         };
 423                         mv88e1240@7 {
 424                                 reg = <0x7>;
 425                         };
 426                         mv88e1240@8 {
 427                                 reg = <0x8>;
 428                         };
 429                         mv88e1240@9 {
 430                                 reg = <0x9>;
 431                         };
 432                         mv88e1240@a {
 433                                 reg = <0xa>;
 434                         };
 435                         mv88e1240@b {
 436                                 reg = <0xb>;
 437                         };
 438                         mv88e1240@c {
 439                                 reg = <0xc>;
 440                         };
 441                         mv88e1240@d {
 442                                 reg = <0xd>;
 443                         };
 444                         mv88e1240@e {
 445                                 reg = <0xe>;
 446                         };
 447                         mv88e1240@f {
 448                                 reg = <0xf>;
 449                         };
 450                         mv88e1240@10 {
 451                                 reg = <0x10>;
 452                         };
 453                         mv88e1240@11 {
 454                                 reg = <0x11>;
 455                         };
 456                         mv88e1240@12 {
 457                                 reg = <0x12>;
 458                         };
 459                         mv88e1240@13 {
 460                                 reg = <0x13>;
 461                         };
 462                         mv88e1240@14 {
 463                                 reg = <0x14>;
 464                         };
 465                         mv88e1240@15 {
 466                                 reg = <0x15>;
 467                         };
 468                         mv88e1240@16 {
 469                                 reg = <0x16>;
 470                         };
 471                         mv88e1240@17 {
 472                                 reg = <0x17>;
 473                         };
 474                         mv88e1240@18 {
 475                                 reg = <0x18>;
 476                         };
 477                         mv88e1240@19 {
 478                                 reg = <0x19>;
 479                         };
 480                         mv88e1240@1a {
 481                                 reg = <0x1a>;
 482                         };
 483                         mv88e1240@1b {
 484                                 reg = <0x1b>;
 485                         };
 486                         mv88e1240@1c {
 487                                 reg = <0x1c>;
 488                         };
 489                         mv88e1240@1d {
 490                                 reg = <0x1d>;
 491                         };
 492                         mv88e1240@1e {
 493                                 reg = <0x1e>;
 494                         };
 495                         mv88e1240@1f {
 496                                 reg = <0x1f>;
 497                         };
 498                 };
 499
 500                 MDIO2: mdio2 {
 501                         compatible = "virtual,mdio-gpio";
 502                         #address-cells = <1>;
 503                         #size-cells = <0>;
 504                         gpios = < /*MDC*/ &gpio1 14 0
 505                                   /*MDIO*/ &gpio0 24 0>;
 506                         mv88e1240@0 {
 507                                 reg = <0x0>;
 508                         };
 509                         mv88e1240@1 {
 510                                 reg = <0x1>;
 511                         };
 512                         mv88e1240@2 {
 513                                 reg = <0x2>;
 514                         };
 515                         mv88e1240@3 {
 516                                 reg = <0x3>;
 517                         };
 518                         mv88e1240@4 {
 519                                 reg = <0x4>;
 520                         };
 521                         mv88e1240@5 {
 522                                 reg = <0x5>;
 523                         };
 524                         mv88e1240@6 {
 525                                 reg = <0x6>;
 526                         };
 527                         mv88e1240@7 {
 528                                 reg = <0x7>;
 529                         };
 530                         mv88e1240@8 {
 531                                 reg = <0x8>;
 532                         };
 533                         mv88e1240@9 {
 534                                 reg = <0x9>;
 535                         };
 536                         mv88e1240@a {
 537                                 reg = <0xa>;
 538                         };
 539                         mv88e1240@b {
 540                                 reg = <0xb>;
 541                         };
 542                         mv88e1240@c {
 543                                 reg = <0xc>;
 544                         };
 545                         mv88e1240@d {
 546                                 reg = <0xd>;
 547                         };
 548                         mv88e1240@e {
 549                                 reg = <0xe>;
 550                         };
 551                         mv88e1240@f {
 552                                 reg = <0xf>;
 553                         };
 554                         mv88e1240@10 {
 555                                 reg = <0x10>;
 556                         };
 557                         mv88e1240@11 {
 558                                 reg = <0x11>;
 559                         };
 560                         mv88e1240@12 {
 561                                 reg = <0x12>;
 562                         };
 563                         mv88e1240@13 {
 564                                 reg = <0x13>;
 565                         };
 566                         mv88e1240@14 {
 567                                 reg = <0x14>;
 568                         };
 569                         mv88e1240@15 {
 570                                 reg = <0x15>;
 571                         };
 572                 };
 573         };
 574
 575         leds {
 576                 compatible = "gpio-leds";
 577
 578                 finder_led {
 579                         label = "finder-led";
 580                         gpios = <&PCA22 25 0>;
 581                 };
 582
 583                 status_led {
 584                         label = "status-led";
 585                         gpios = <&gpio0 29 0>;
 586                 };
 587         };
 588 };