1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
12 config POSITION_INDEPENDENT
13 bool "Generate position-independent pre-relocation code"
14 depends on ARM64 || CPU_V7A
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed from
19 almost any 4K aligned address. This logic relies on the relocation
20 information that is embedded in the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 default n if ARCH_QEMU
27 default y if POSITION_INDEPENDENT
29 U-Boot typically uses a hard-coded value for the stack pointer
30 before relocation. Enable this option to instead calculate the
31 initial SP at run-time. This is useful to avoid hard-coding addresses
32 into U-Boot, so that it can be loaded and executed at arbitrary
33 addresses and thus avoid using arbitrary addresses at runtime.
35 If this option is enabled, the early stack pointer is set to
36 &_bss_start with a offset value added. The offset is specified by
37 SYS_INIT_SP_BSS_OFFSET.
39 config SYS_INIT_SP_BSS_OFFSET
40 int "Early stack offset from the .bss base address"
42 depends on INIT_SP_RELATIVE
45 This option's value is the offset added to &_bss_start in order to
46 calculate the stack pointer. This offset should be large enough so
47 that the early malloc region, global data (gd), and early stack usage
48 do not overlap any appended DTB.
50 config LINUX_KERNEL_IMAGE_HEADER
54 Place a Linux kernel image header at the start of the U-Boot binary.
55 The format of the header is described in the Linux kernel source at
56 Documentation/arm64/booting.txt. This feature is useful since the
57 image header reports the amount of memory (BSS and similar) that
58 U-Boot needs to use, but which isn't part of the binary.
60 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
61 depends on LINUX_KERNEL_IMAGE_HEADER
64 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
65 TEXT_OFFSET value written to the Linux kernel image header.
79 ARM GICV3 Interrupt translation service (ITS).
80 Basic support for programming locality specific peripheral
81 interrupts (LPI) configuration tables and enable LPI tables.
82 LPI configuration table can be used by u-boot or Linux.
83 ARM GICV3 has limitation, once the LPI table is enabled, LPI
84 configuration table can not be re-programmed, unless GICV3 reset.
90 config DMA_ADDR_T_64BIT
100 config GPIO_EXTRA_HEADER
103 # Used for compatibility with asm files copied from the kernel
104 config ARM_ASM_UNIFIED
108 # Used for compatibility with asm files copied from the kernel
112 config SYS_ICACHE_OFF
113 bool "Do not enable icache"
115 Do not enable instruction cache in U-Boot.
117 config SPL_SYS_ICACHE_OFF
118 bool "Do not enable icache in SPL"
120 default SYS_ICACHE_OFF
122 Do not enable instruction cache in SPL.
124 config SYS_DCACHE_OFF
125 bool "Do not enable dcache"
127 Do not enable data cache in U-Boot.
129 config SPL_SYS_DCACHE_OFF
130 bool "Do not enable dcache in SPL"
132 default SYS_DCACHE_OFF
134 Do not enable data cache in SPL.
136 config SYS_ARM_CACHE_CP15
137 bool "CP15 based cache enabling support"
139 Select this if your processor suports enabling caches by using
143 bool "MMU-based Paged Memory Management Support"
144 select SYS_ARM_CACHE_CP15
146 Select if you want MMU-based virtualised addressing space
147 support via paged memory management.
150 bool 'Use the ARM v7 PMSA Compliant MPU'
152 Some ARM systems without an MMU have instead a Memory Protection
153 Unit (MPU) that defines the type and permissions for regions of
155 If your CPU has an MPU then you should choose 'y' here unless you
156 know that you do not want to use the MPU.
158 # If set, the workarounds for these ARM errata are applied early during U-Boot
159 # startup. Note that in general these options force the workarounds to be
160 # applied; no CPU-type/version detection exists, unlike the similar options in
161 # the Linux kernel. Do not set these options unless they apply! Also note that
162 # the following can be machine-specific errata. These do have ability to
163 # provide rudimentary version and machine-specific checks, but expect no
165 # CONFIG_ARM_ERRATA_430973
166 # CONFIG_ARM_ERRATA_454179
167 # CONFIG_ARM_ERRATA_621766
168 # CONFIG_ARM_ERRATA_798870
169 # CONFIG_ARM_ERRATA_801819
170 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
171 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
173 config ARM_ERRATA_430973
176 config ARM_ERRATA_454179
179 config ARM_ERRATA_621766
182 config ARM_ERRATA_716044
185 config ARM_ERRATA_725233
188 config ARM_ERRATA_742230
191 config ARM_ERRATA_743622
194 config ARM_ERRATA_751472
197 config ARM_ERRATA_761320
200 config ARM_ERRATA_773022
203 config ARM_ERRATA_774769
206 config ARM_ERRATA_794072
209 config ARM_ERRATA_798870
212 config ARM_ERRATA_801819
215 config ARM_ERRATA_826974
218 config ARM_ERRATA_828024
221 config ARM_ERRATA_829520
224 config ARM_ERRATA_833069
227 config ARM_ERRATA_833471
230 config ARM_ERRATA_845369
233 config ARM_ERRATA_852421
236 config ARM_ERRATA_852423
239 config ARM_ERRATA_855873
242 config ARM_CORTEX_A8_CVE_2017_5715
245 config ARM_CORTEX_A15_CVE_2017_5715
250 select SYS_CACHE_SHIFT_5
255 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
270 select SYS_CACHE_SHIFT_5
276 select SYS_CACHE_SHIFT_5
283 select SYS_CACHE_SHIFT_6
290 select SYS_CACHE_SHIFT_5
291 select SYS_THUMB_BUILD
297 select SYS_ARM_CACHE_CP15
299 select SYS_CACHE_SHIFT_6
303 select SYS_CACHE_SHIFT_5
308 select SYS_CACHE_SHIFT_5
312 default "arm720t" if CPU_ARM720T
313 default "arm920t" if CPU_ARM920T
314 default "arm926ejs" if CPU_ARM926EJS
315 default "arm946es" if CPU_ARM946ES
316 default "arm1136" if CPU_ARM1136
317 default "arm1176" if CPU_ARM1176
318 default "armv7" if CPU_V7A
319 default "armv7" if CPU_V7R
320 default "armv7m" if CPU_V7M
321 default "pxa" if CPU_PXA
322 default "sa1100" if CPU_SA1100
323 default "armv8" if ARM64
327 default 4 if CPU_ARM720T
328 default 4 if CPU_ARM920T
329 default 5 if CPU_ARM926EJS
330 default 5 if CPU_ARM946ES
331 default 6 if CPU_ARM1136
332 default 6 if CPU_ARM1176
337 default 4 if CPU_SA1100
341 prompt "Select the ARM data write cache policy"
342 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
344 default SYS_ARM_CACHE_WRITEBACK
346 config SYS_ARM_CACHE_WRITEBACK
347 bool "Write-back (WB)"
349 A write updates the cache only and marks the cache line as dirty.
350 External memory is updated only when the line is evicted or explicitly
353 config SYS_ARM_CACHE_WRITETHROUGH
354 bool "Write-through (WT)"
356 A write updates both the cache and the external memory system.
357 This does not mark the cache line as dirty.
359 config SYS_ARM_CACHE_WRITEALLOC
360 bool "Write allocation (WA)"
362 A cache line is allocated on a write miss. This means that executing a
363 store instruction on the processor might cause a burst read to occur.
364 There is a linefill to obtain the data for the cache line, before the
369 bool "Enable ARCH_CPU_INIT"
371 Some architectures require a call to arch_cpu_init().
372 Say Y here to enable it
374 config SYS_ARCH_TIMER
375 bool "ARM Generic Timer support"
376 depends on CPU_V7A || ARM64
379 The ARM Generic Timer (aka arch-timer) provides an architected
380 interface to a timer source on an SoC.
381 It is mandatory for ARMv8 implementation and widely available
385 bool "Support for ARM SMC Calling Convention (SMCCC)"
386 depends on CPU_V7A || ARM64
389 Say Y here if you want to enable ARM SMC Calling Convention.
390 This should be enabled if U-Boot needs to communicate with system
391 firmware (for example, PSCI) according to SMCCC.
394 bool "support boot from semihosting"
396 In emulated environments, semihosting is a way for
397 the hosted environment to call out to the emulator to
398 retrieve files from the host machine.
400 config SYS_THUMB_BUILD
401 bool "Build U-Boot using the Thumb instruction set"
404 Use this flag to build U-Boot using the Thumb instruction set for
405 ARM architectures. Thumb instruction set provides better code
406 density. For ARM architectures that support Thumb2 this flag will
407 result in Thumb2 code generated by GCC.
409 config SPL_SYS_THUMB_BUILD
410 bool "Build SPL using the Thumb instruction set"
411 default y if SYS_THUMB_BUILD
412 depends on !ARM64 && SPL
414 Use this flag to build SPL using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config TPL_SYS_THUMB_BUILD
420 bool "Build TPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on TPL && !ARM64
424 Use this flag to build TPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
430 config SYS_L2CACHE_OFF
433 If SoC does not support L2CACHE or one does not want to enable
434 L2CACHE, choose this option.
436 config ENABLE_ARM_SOC_BOOT0_HOOK
437 bool "prepare BOOT0 header"
439 If the SoC's BOOT0 requires a header area filled with (magic)
440 values, then choose this option, and create a file included as
441 <asm/arch/boot0.h> which contains the required assembler code.
443 config ARM_CORTEX_CPU_IS_UP
446 config USE_ARCH_MEMCPY
447 bool "Use an assembly optimized implementation of memcpy"
451 Enable the generation of an optimized version of memcpy.
452 Such an implementation may be faster under some conditions
453 but may increase the binary size.
455 config SPL_USE_ARCH_MEMCPY
456 bool "Use an assembly optimized implementation of memcpy for SPL"
457 default y if USE_ARCH_MEMCPY
458 depends on !ARM64 && SPL
460 Enable the generation of an optimized version of memcpy.
461 Such an implementation may be faster under some conditions
462 but may increase the binary size.
464 config TPL_USE_ARCH_MEMCPY
465 bool "Use an assembly optimized implementation of memcpy for TPL"
466 default y if USE_ARCH_MEMCPY
467 depends on !ARM64 && TPL
469 Enable the generation of an optimized version of memcpy.
470 Such an implementation may be faster under some conditions
471 but may increase the binary size.
473 config USE_ARCH_MEMSET
474 bool "Use an assembly optimized implementation of memset"
478 Enable the generation of an optimized version of memset.
479 Such an implementation may be faster under some conditions
480 but may increase the binary size.
482 config SPL_USE_ARCH_MEMSET
483 bool "Use an assembly optimized implementation of memset for SPL"
484 default y if USE_ARCH_MEMSET
485 depends on !ARM64 && SPL
487 Enable the generation of an optimized version of memset.
488 Such an implementation may be faster under some conditions
489 but may increase the binary size.
491 config TPL_USE_ARCH_MEMSET
492 bool "Use an assembly optimized implementation of memset for TPL"
493 default y if USE_ARCH_MEMSET
494 depends on !ARM64 && TPL
496 Enable the generation of an optimized version of memset.
497 Such an implementation may be faster under some conditions
498 but may increase the binary size.
500 config ARM64_SUPPORT_AARCH32
501 bool "ARM64 system support AArch32 execution state"
503 default y if !TARGET_THUNDERX_88XX
505 This ARM64 system supports AArch32 execution state.
508 prompt "Target select"
513 select GPIO_EXTRA_HEADER
514 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
515 select SPL_SEPARATE_BSS if SPL
517 config TARGET_ASPENITE
518 bool "Support aspenite"
520 select GPIO_EXTRA_HEADER
525 select GPIO_EXTRA_HEADER
526 select SPL_DM_SPI if SPL
529 Support for TI's DaVinci platform.
532 bool "Marvell Kirkwood"
533 select ARCH_MISC_INIT
534 select BOARD_EARLY_INIT_F
536 select GPIO_EXTRA_HEADER
539 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
545 select GPIO_EXTRA_HEADER
546 select SPL_DM_SPI if SPL
547 select SPL_DM_SPI_FLASH if SPL
556 select GPIO_EXTRA_HEADER
558 config TARGET_STV0991
559 bool "Support stv0991"
565 select GPIO_EXTRA_HEADER
574 select GPIO_EXTRA_HEADER
577 bool "Broadcom BCM283X family"
581 select GPIO_EXTRA_HEADER
584 select SERIAL_SEARCH_ALL
589 bool "Broadcom BCM63158 family"
595 bool "Broadcom BCM68360 family"
601 bool "Broadcom BCM6858 family"
607 bool "Broadcom BCM7XXX family"
610 select GPIO_EXTRA_HEADER
612 select OF_PRIOR_STAGE
615 This enables support for Broadcom ARM-based set-top box
616 chipsets, including the 7445 family of chips.
618 config TARGET_BCMCYGNUS
619 bool "Support bcmcygnus"
621 select GPIO_EXTRA_HEADER
623 imply BCM_SF2_ETH_GMAC
631 bool "Support Broadcom Northstar2"
633 select GPIO_EXTRA_HEADER
635 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
636 ARMv8 Cortex-A57 processors targeting a broad range of networking
640 bool "Support Broadcom NS3"
642 select BOARD_LATE_INIT
644 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
645 ARMv8 Cortex-A72 processors targeting a broad range of networking
649 bool "Samsung EXYNOS"
659 select GPIO_EXTRA_HEADER
660 imply SYS_THUMB_BUILD
665 bool "Samsung S5PC1XX"
671 select GPIO_EXTRA_HEADER
675 bool "Calxeda Highbank"
688 config ARCH_INTEGRATOR
689 bool "ARM Ltd. Integrator family"
692 select GPIO_EXTRA_HEADER
697 bool "Qualcomm IPQ40xx SoCs"
703 select GPIO_EXTRA_HEADER
716 select GPIO_EXTRA_HEADER
718 select SYS_ARCH_TIMER
719 select SYS_THUMB_BUILD
725 bool "Texas Instruments' K3 Architecture"
730 config ARCH_OMAP2PLUS
733 select GPIO_EXTRA_HEADER
734 select SPL_BOARD_INIT if SPL
735 select SPL_STACK_R if SPL
737 imply TI_SYSC if DM && OF_CONTROL
742 select GPIO_EXTRA_HEADER
743 imply DISTRO_DEFAULTS
746 Support for the Meson SoC family developed by Amlogic Inc.,
747 targeted at media players and tablet computers. We currently
748 support the S905 (GXBaby) 64-bit SoC.
753 select GPIO_EXTRA_HEADER
756 select SPL_LIBCOMMON_SUPPORT if SPL
757 select SPL_LIBGENERIC_SUPPORT if SPL
758 select SPL_OF_CONTROL if SPL
761 Support for the MediaTek SoCs family developed by MediaTek Inc.
762 Please refer to doc/README.mediatek for more information.
765 bool "NXP LPC32xx platform"
770 select GPIO_EXTRA_HEADER
776 bool "NXP i.MX8 platform"
779 select GPIO_EXTRA_HEADER
782 select ENABLE_ARM_SOC_BOOT0_HOOK
785 bool "NXP i.MX8M platform"
787 select GPIO_EXTRA_HEADER
789 select SYS_FSL_HAS_SEC if IMX_HAB
790 select SYS_FSL_SEC_COMPAT_4
791 select SYS_FSL_SEC_LE
798 bool "NXP i.MX8ULP platform"
804 select GPIO_EXTRA_HEADER
808 bool "NXP i.MXRT platform"
812 select GPIO_EXTRA_HEADER
818 bool "NXP i.MX23 family"
820 select GPIO_EXTRA_HEADER
828 select GPIO_EXTRA_HEADER
833 bool "NXP i.MX28 family"
835 select GPIO_EXTRA_HEADER
841 bool "NXP i.MX31 family"
843 select GPIO_EXTRA_HEADER
849 select GPIO_EXTRA_HEADER
851 select SYS_FSL_HAS_SEC if IMX_HAB
852 select SYS_FSL_SEC_COMPAT_4
853 select SYS_FSL_SEC_LE
854 select ROM_UNIFIED_SECTIONS
856 imply SYS_THUMB_BUILD
860 select ARCH_MISC_INIT
862 select GPIO_EXTRA_HEADER
864 select SYS_FSL_HAS_SEC if IMX_HAB
865 select SYS_FSL_SEC_COMPAT_4
866 select SYS_FSL_SEC_LE
867 imply BOARD_EARLY_INIT_F
869 imply SYS_THUMB_BUILD
874 select GPIO_EXTRA_HEADER
876 select SYS_FSL_HAS_SEC
877 select SYS_FSL_SEC_COMPAT_4
878 select SYS_FSL_SEC_LE
880 imply SYS_THUMB_BUILD
884 default "arch/arm/mach-omap2/u-boot-spl.lds"
889 select BOARD_EARLY_INIT_F
891 select GPIO_EXTRA_HEADER
896 bool "Nexell S5P4418/S5P6818 SoC"
897 select ENABLE_ARM_SOC_BOOT0_HOOK
899 select GPIO_EXTRA_HEADER
902 bool "Actions Semi OWL SoCs"
906 select GPIO_EXTRA_HEADER
911 select SYS_RELOC_GD_ENV_ADDR
915 bool "QEMU Virtual Platform"
926 bool "Renesas ARM SoCs"
929 select GPIO_EXTRA_HEADER
930 imply BOARD_EARLY_INIT_F
933 imply SYS_THUMB_BUILD
934 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
936 config ARCH_SNAPDRAGON
937 bool "Qualcomm Snapdragon SoCs"
942 select GPIO_EXTRA_HEADER
951 bool "Altera SOCFPGA family"
952 select ARCH_EARLY_INIT_R
953 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
954 select ARM64 if TARGET_SOCFPGA_SOC64
955 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
959 select GPIO_EXTRA_HEADER
960 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
962 select SPL_DM_RESET if DM_RESET
964 select SPL_LIBCOMMON_SUPPORT
965 select SPL_LIBGENERIC_SUPPORT
966 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
967 select SPL_OF_CONTROL
968 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
974 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
976 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
977 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
987 imply SPL_DM_SPI_FLASH
988 imply SPL_LIBDISK_SUPPORT
990 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
991 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
992 imply SPL_SPI_FLASH_SUPPORT
997 bool "Support sunxi (Allwinner) SoCs"
1000 select CMD_MMC if MMC
1001 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1007 select DM_MMC if MMC
1008 select DM_SCSI if SCSI
1010 select GPIO_EXTRA_HEADER
1011 select OF_BOARD_SETUP
1014 select SPECIFY_CONSOLE_INDEX
1015 select SPL_STACK_R if SPL
1016 select SPL_SYS_MALLOC_SIMPLE if SPL
1017 select SPL_SYS_THUMB_BUILD if !ARM64
1020 select SYS_THUMB_BUILD if !ARM64
1021 select USB if DISTRO_DEFAULTS
1022 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1023 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1024 select SPL_USE_TINY_PRINTF
1026 select SYS_RELOC_GD_ENV_ADDR
1027 imply BOARD_LATE_INIT
1030 imply CMD_UBI if MTD_RAW_NAND
1031 imply DISTRO_DEFAULTS
1034 imply OF_LIBFDT_OVERLAY
1035 imply PRE_CONSOLE_BUFFER
1037 imply SPL_LIBCOMMON_SUPPORT
1038 imply SPL_LIBGENERIC_SUPPORT
1039 imply SPL_MMC if MMC
1045 bool "ST-Ericsson U8500 Series"
1049 select DM_MMC if MMC
1051 select DM_USB_GADGET if DM_USB
1055 imply AB8500_USB_PHY
1056 imply ARM_PL180_MMCI
1061 imply NOMADIK_MTU_TIMER
1066 imply SYS_THUMB_BUILD
1067 imply SYSRESET_SYSCON
1070 bool "Support Xilinx Versal Platform"
1074 select DM_ETH if NET
1075 select DM_MMC if MMC
1078 select GPIO_EXTRA_HEADER
1081 imply BOARD_LATE_INIT
1082 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1085 bool "Freescale Vybrid"
1087 select GPIO_EXTRA_HEADER
1089 select SYS_FSL_ERRATUM_ESDHC111
1094 bool "Xilinx Zynq based platform"
1099 select DM_ETH if NET
1100 select DM_MMC if MMC
1104 select GPIO_EXTRA_HEADER
1107 select SPL_BOARD_INIT if SPL
1108 select SPL_CLK if SPL
1109 select SPL_DM if SPL
1110 select SPL_DM_SPI if SPL
1111 select SPL_DM_SPI_FLASH if SPL
1112 select SPL_OF_CONTROL if SPL
1113 select SPL_SEPARATE_BSS if SPL
1115 imply ARCH_EARLY_INIT_R
1116 imply BOARD_LATE_INIT
1120 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1123 config ARCH_ZYNQMP_R5
1124 bool "Xilinx ZynqMP R5 based platform"
1128 select DM_ETH if NET
1129 select DM_MMC if MMC
1131 select GPIO_EXTRA_HEADER
1137 bool "Xilinx ZynqMP based platform"
1141 select DM_ETH if NET
1143 select DM_MMC if MMC
1145 select DM_SPI if SPI
1146 select DM_SPI_FLASH if DM_SPI
1149 select GPIO_EXTRA_HEADER
1151 select SPL_BOARD_INIT if SPL
1152 select SPL_CLK if SPL
1153 select SPL_DM if SPL
1154 select SPL_DM_SPI if SPI && SPL_DM
1155 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1156 select SPL_DM_MAILBOX if SPL
1157 select SPL_FIRMWARE if SPL
1158 select SPL_SEPARATE_BSS if SPL
1162 imply BOARD_LATE_INIT
1164 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1171 select GPIO_EXTRA_HEADER
1172 imply DISTRO_DEFAULTS
1175 config TARGET_VEXPRESS64_AEMV8A
1176 bool "Support vexpress_aemv8a"
1178 select GPIO_EXTRA_HEADER
1181 config TARGET_VEXPRESS64_BASE_FVP
1182 bool "Support Versatile Express ARMv8a FVP BASE model"
1184 select GPIO_EXTRA_HEADER
1188 config TARGET_VEXPRESS64_JUNO
1189 bool "Support Versatile Express Juno Development Platform"
1191 select GPIO_EXTRA_HEADER
1204 config TARGET_TOTAL_COMPUTE
1205 bool "Support Total Compute Platform"
1213 config TARGET_LS2080A_EMU
1214 bool "Support ls2080a_emu"
1217 select ARMV8_MULTIENTRY
1218 select FSL_DDR_SYNC_REFRESH
1219 select GPIO_EXTRA_HEADER
1221 Support for Freescale LS2080A_EMU platform.
1222 The LS2080A Development System (EMULATOR) is a pre-silicon
1223 development platform that supports the QorIQ LS2080A
1224 Layerscape Architecture processor.
1226 config TARGET_LS1088AQDS
1227 bool "Support ls1088aqds"
1230 select ARMV8_MULTIENTRY
1231 select ARCH_SUPPORT_TFABOOT
1232 select BOARD_LATE_INIT
1233 select GPIO_EXTRA_HEADER
1235 select FSL_DDR_INTERACTIVE if !SD_BOOT
1237 Support for NXP LS1088AQDS platform.
1238 The LS1088A Development System (QDS) is a high-performance
1239 development platform that supports the QorIQ LS1088A
1240 Layerscape Architecture processor.
1242 config TARGET_LS2080AQDS
1243 bool "Support ls2080aqds"
1246 select ARMV8_MULTIENTRY
1247 select ARCH_SUPPORT_TFABOOT
1248 select BOARD_LATE_INIT
1249 select GPIO_EXTRA_HEADER
1254 select FSL_DDR_INTERACTIVE if !SPL
1256 Support for Freescale LS2080AQDS platform.
1257 The LS2080A Development System (QDS) is a high-performance
1258 development platform that supports the QorIQ LS2080A
1259 Layerscape Architecture processor.
1261 config TARGET_LS2080ARDB
1262 bool "Support ls2080ardb"
1265 select ARMV8_MULTIENTRY
1266 select ARCH_SUPPORT_TFABOOT
1267 select BOARD_LATE_INIT
1270 select FSL_DDR_INTERACTIVE if !SPL
1271 select GPIO_EXTRA_HEADER
1275 Support for Freescale LS2080ARDB platform.
1276 The LS2080A Reference design board (RDB) is a high-performance
1277 development platform that supports the QorIQ LS2080A
1278 Layerscape Architecture processor.
1280 config TARGET_LS2081ARDB
1281 bool "Support ls2081ardb"
1284 select ARMV8_MULTIENTRY
1285 select BOARD_LATE_INIT
1286 select GPIO_EXTRA_HEADER
1289 Support for Freescale LS2081ARDB platform.
1290 The LS2081A Reference design board (RDB) is a high-performance
1291 development platform that supports the QorIQ LS2081A/LS2041A
1292 Layerscape Architecture processor.
1294 config TARGET_LX2160ARDB
1295 bool "Support lx2160ardb"
1298 select ARMV8_MULTIENTRY
1299 select ARCH_SUPPORT_TFABOOT
1300 select BOARD_LATE_INIT
1301 select GPIO_EXTRA_HEADER
1303 Support for NXP LX2160ARDB platform.
1304 The lx2160ardb (LX2160A Reference design board (RDB)
1305 is a high-performance development platform that supports the
1306 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1308 config TARGET_LX2160AQDS
1309 bool "Support lx2160aqds"
1312 select ARMV8_MULTIENTRY
1313 select ARCH_SUPPORT_TFABOOT
1314 select BOARD_LATE_INIT
1315 select GPIO_EXTRA_HEADER
1317 Support for NXP LX2160AQDS platform.
1318 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1319 is a high-performance development platform that supports the
1320 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1322 config TARGET_LX2162AQDS
1323 bool "Support lx2162aqds"
1325 select ARCH_MISC_INIT
1327 select ARMV8_MULTIENTRY
1328 select ARCH_SUPPORT_TFABOOT
1329 select BOARD_LATE_INIT
1330 select GPIO_EXTRA_HEADER
1332 Support for NXP LX2162AQDS platform.
1333 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1336 bool "Support HiKey 96boards Consumer Edition Platform"
1341 select GPIO_EXTRA_HEADER
1344 select SPECIFY_CONSOLE_INDEX
1347 Support for HiKey 96boards platform. It features a HI6220
1348 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1350 config TARGET_HIKEY960
1351 bool "Support HiKey960 96boards Consumer Edition Platform"
1355 select GPIO_EXTRA_HEADER
1360 Support for HiKey960 96boards platform. It features a HI3660
1361 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1363 config TARGET_POPLAR
1364 bool "Support Poplar 96boards Enterprise Edition Platform"
1368 select GPIO_EXTRA_HEADER
1373 Support for Poplar 96boards EE platform. It features a HI3798cv200
1374 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1375 making it capable of running any commercial set-top solution based on
1378 config TARGET_LS1012AQDS
1379 bool "Support ls1012aqds"
1382 select ARCH_SUPPORT_TFABOOT
1383 select BOARD_LATE_INIT
1384 select GPIO_EXTRA_HEADER
1386 Support for Freescale LS1012AQDS platform.
1387 The LS1012A Development System (QDS) is a high-performance
1388 development platform that supports the QorIQ LS1012A
1389 Layerscape Architecture processor.
1391 config TARGET_LS1012ARDB
1392 bool "Support ls1012ardb"
1395 select ARCH_SUPPORT_TFABOOT
1396 select BOARD_LATE_INIT
1397 select GPIO_EXTRA_HEADER
1401 Support for Freescale LS1012ARDB platform.
1402 The LS1012A Reference design board (RDB) is a high-performance
1403 development platform that supports the QorIQ LS1012A
1404 Layerscape Architecture processor.
1406 config TARGET_LS1012A2G5RDB
1407 bool "Support ls1012a2g5rdb"
1410 select ARCH_SUPPORT_TFABOOT
1411 select BOARD_LATE_INIT
1412 select GPIO_EXTRA_HEADER
1415 Support for Freescale LS1012A2G5RDB platform.
1416 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1417 development platform that supports the QorIQ LS1012A
1418 Layerscape Architecture processor.
1420 config TARGET_LS1012AFRWY
1421 bool "Support ls1012afrwy"
1424 select ARCH_SUPPORT_TFABOOT
1425 select BOARD_LATE_INIT
1426 select GPIO_EXTRA_HEADER
1430 Support for Freescale LS1012AFRWY platform.
1431 The LS1012A FRWY board (FRWY) is a high-performance
1432 development platform that supports the QorIQ LS1012A
1433 Layerscape Architecture processor.
1435 config TARGET_LS1012AFRDM
1436 bool "Support ls1012afrdm"
1439 select ARCH_SUPPORT_TFABOOT
1440 select GPIO_EXTRA_HEADER
1442 Support for Freescale LS1012AFRDM platform.
1443 The LS1012A Freedom board (FRDM) is a high-performance
1444 development platform that supports the QorIQ LS1012A
1445 Layerscape Architecture processor.
1447 config TARGET_LS1028AQDS
1448 bool "Support ls1028aqds"
1451 select ARMV8_MULTIENTRY
1452 select ARCH_SUPPORT_TFABOOT
1453 select BOARD_LATE_INIT
1454 select GPIO_EXTRA_HEADER
1456 Support for Freescale LS1028AQDS platform
1457 The LS1028A Development System (QDS) is a high-performance
1458 development platform that supports the QorIQ LS1028A
1459 Layerscape Architecture processor.
1461 config TARGET_LS1028ARDB
1462 bool "Support ls1028ardb"
1465 select ARMV8_MULTIENTRY
1466 select ARCH_SUPPORT_TFABOOT
1467 select BOARD_LATE_INIT
1468 select GPIO_EXTRA_HEADER
1470 Support for Freescale LS1028ARDB platform
1471 The LS1028A Development System (RDB) is a high-performance
1472 development platform that supports the QorIQ LS1028A
1473 Layerscape Architecture processor.
1475 config TARGET_LS1088ARDB
1476 bool "Support ls1088ardb"
1479 select ARMV8_MULTIENTRY
1480 select ARCH_SUPPORT_TFABOOT
1481 select BOARD_LATE_INIT
1483 select FSL_DDR_INTERACTIVE if !SD_BOOT
1484 select GPIO_EXTRA_HEADER
1486 Support for NXP LS1088ARDB platform.
1487 The LS1088A Reference design board (RDB) is a high-performance
1488 development platform that supports the QorIQ LS1088A
1489 Layerscape Architecture processor.
1491 config TARGET_LS1021AQDS
1492 bool "Support ls1021aqds"
1494 select ARCH_SUPPORT_PSCI
1495 select BOARD_EARLY_INIT_F
1496 select BOARD_LATE_INIT
1498 select CPU_V7_HAS_NONSEC
1499 select CPU_V7_HAS_VIRT
1500 select LS1_DEEP_SLEEP
1503 select FSL_DDR_INTERACTIVE
1504 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1505 select GPIO_EXTRA_HEADER
1506 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1509 config TARGET_LS1021ATWR
1510 bool "Support ls1021atwr"
1512 select ARCH_SUPPORT_PSCI
1513 select BOARD_EARLY_INIT_F
1514 select BOARD_LATE_INIT
1516 select CPU_V7_HAS_NONSEC
1517 select CPU_V7_HAS_VIRT
1518 select LS1_DEEP_SLEEP
1520 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1521 select GPIO_EXTRA_HEADER
1524 config TARGET_PG_WCOM_SELI8
1525 bool "Support Hitachi-Powergrids SELI8 service unit card"
1527 select ARCH_SUPPORT_PSCI
1528 select BOARD_EARLY_INIT_F
1529 select BOARD_LATE_INIT
1531 select CPU_V7_HAS_NONSEC
1532 select CPU_V7_HAS_VIRT
1534 select FSL_DDR_INTERACTIVE
1535 select GPIO_EXTRA_HEADER
1539 Support for Hitachi-Powergrids SELI8 service unit card.
1540 SELI8 is a QorIQ LS1021a based service unit card used
1541 in XMC20 and FOX615 product families.
1543 config TARGET_PG_WCOM_EXPU1
1544 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1546 select ARCH_SUPPORT_PSCI
1547 select BOARD_EARLY_INIT_F
1548 select BOARD_LATE_INIT
1550 select CPU_V7_HAS_NONSEC
1551 select CPU_V7_HAS_VIRT
1553 select FSL_DDR_INTERACTIVE
1557 Support for Hitachi-Powergrids EXPU1 service unit card.
1558 EXPU1 is a QorIQ LS1021a based service unit card used
1559 in XMC20 and FOX615 product families.
1561 config TARGET_LS1021ATSN
1562 bool "Support ls1021atsn"
1564 select ARCH_SUPPORT_PSCI
1565 select BOARD_EARLY_INIT_F
1566 select BOARD_LATE_INIT
1568 select CPU_V7_HAS_NONSEC
1569 select CPU_V7_HAS_VIRT
1570 select LS1_DEEP_SLEEP
1572 select GPIO_EXTRA_HEADER
1575 config TARGET_LS1021AIOT
1576 bool "Support ls1021aiot"
1578 select ARCH_SUPPORT_PSCI
1579 select BOARD_LATE_INIT
1581 select CPU_V7_HAS_NONSEC
1582 select CPU_V7_HAS_VIRT
1584 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1585 select GPIO_EXTRA_HEADER
1588 Support for Freescale LS1021AIOT platform.
1589 The LS1021A Freescale board (IOT) is a high-performance
1590 development platform that supports the QorIQ LS1021A
1591 Layerscape Architecture processor.
1593 config TARGET_LS1043AQDS
1594 bool "Support ls1043aqds"
1597 select ARMV8_MULTIENTRY
1598 select ARCH_SUPPORT_TFABOOT
1599 select BOARD_EARLY_INIT_F
1600 select BOARD_LATE_INIT
1602 select FSL_DDR_INTERACTIVE if !SPL
1603 select FSL_DSPI if !SPL_NO_DSPI
1604 select DM_SPI_FLASH if FSL_DSPI
1605 select GPIO_EXTRA_HEADER
1609 Support for Freescale LS1043AQDS platform.
1611 config TARGET_LS1043ARDB
1612 bool "Support ls1043ardb"
1615 select ARMV8_MULTIENTRY
1616 select ARCH_SUPPORT_TFABOOT
1617 select BOARD_EARLY_INIT_F
1618 select BOARD_LATE_INIT
1620 select FSL_DSPI if !SPL_NO_DSPI
1621 select DM_SPI_FLASH if FSL_DSPI
1622 select GPIO_EXTRA_HEADER
1624 Support for Freescale LS1043ARDB platform.
1626 config TARGET_LS1046AQDS
1627 bool "Support ls1046aqds"
1630 select ARMV8_MULTIENTRY
1631 select ARCH_SUPPORT_TFABOOT
1632 select BOARD_EARLY_INIT_F
1633 select BOARD_LATE_INIT
1634 select DM_SPI_FLASH if DM_SPI
1636 select FSL_DDR_BIST if !SPL
1637 select FSL_DDR_INTERACTIVE if !SPL
1638 select FSL_DDR_INTERACTIVE if !SPL
1639 select GPIO_EXTRA_HEADER
1642 Support for Freescale LS1046AQDS platform.
1643 The LS1046A Development System (QDS) is a high-performance
1644 development platform that supports the QorIQ LS1046A
1645 Layerscape Architecture processor.
1647 config TARGET_LS1046ARDB
1648 bool "Support ls1046ardb"
1651 select ARMV8_MULTIENTRY
1652 select ARCH_SUPPORT_TFABOOT
1653 select BOARD_EARLY_INIT_F
1654 select BOARD_LATE_INIT
1655 select DM_SPI_FLASH if DM_SPI
1656 select POWER_MC34VR500
1659 select FSL_DDR_INTERACTIVE if !SPL
1660 select GPIO_EXTRA_HEADER
1663 Support for Freescale LS1046ARDB platform.
1664 The LS1046A Reference Design Board (RDB) is a high-performance
1665 development platform that supports the QorIQ LS1046A
1666 Layerscape Architecture processor.
1668 config TARGET_LS1046AFRWY
1669 bool "Support ls1046afrwy"
1672 select ARMV8_MULTIENTRY
1673 select ARCH_SUPPORT_TFABOOT
1674 select BOARD_EARLY_INIT_F
1675 select BOARD_LATE_INIT
1676 select DM_SPI_FLASH if DM_SPI
1677 select GPIO_EXTRA_HEADER
1680 Support for Freescale LS1046AFRWY platform.
1681 The LS1046A Freeway Board (FRWY) is a high-performance
1682 development platform that supports the QorIQ LS1046A
1683 Layerscape Architecture processor.
1689 select ARMV8_MULTIENTRY
1705 select GPIO_EXTRA_HEADER
1706 select SPL_DM if SPL
1707 select SPL_DM_SPI if SPL
1708 select SPL_DM_SPI_FLASH if SPL
1709 select SPL_DM_I2C if SPL
1710 select SPL_DM_MMC if SPL
1711 select SPL_DM_SERIAL if SPL
1713 Support for Kontron SMARC-sAL28 board.
1715 config TARGET_COLIBRI_PXA270
1716 bool "Support colibri_pxa270"
1718 select GPIO_EXTRA_HEADER
1720 config ARCH_UNIPHIER
1721 bool "Socionext UniPhier SoCs"
1722 select BOARD_LATE_INIT
1731 select OF_BOARD_SETUP
1735 select SPL_BOARD_INIT if SPL
1736 select SPL_DM if SPL
1737 select SPL_LIBCOMMON_SUPPORT if SPL
1738 select SPL_LIBGENERIC_SUPPORT if SPL
1739 select SPL_OF_CONTROL if SPL
1740 select SPL_PINCTRL if SPL
1743 imply DISTRO_DEFAULTS
1746 Support for UniPhier SoC family developed by Socionext Inc.
1747 (formerly, System LSI Business Division of Panasonic Corporation)
1749 config ARCH_SYNQUACER
1750 bool "Socionext SynQuacer SoCs"
1756 select SYSRESET_PSCI
1759 Support for SynQuacer SoC family developed by Socionext Inc.
1760 This SoC is used on 96boards EE DeveloperBox.
1763 bool "Support STMicroelectronics STM32 MCU with cortex M"
1767 select GPIO_EXTRA_HEADER
1771 bool "Support STMicrolectronics SoCs"
1780 Support for STMicroelectronics STiH407/10 SoC family.
1781 This SoC is used on Linaro 96Board STiH410-B2260
1784 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1785 select ARCH_MISC_INIT
1786 select ARCH_SUPPORT_TFABOOT
1787 select BOARD_LATE_INIT
1793 select GPIO_EXTRA_HEADER
1797 select OF_SYSTEM_SETUP
1803 select SYS_THUMB_BUILD
1807 imply OF_LIBFDT_OVERLAY
1808 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1811 Support for STM32MP SoC family developed by STMicroelectronics,
1812 MPUs based on ARM cortex A core
1813 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1814 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1816 SPL is the unsecure FSBL for the basic boot chain.
1818 config ARCH_ROCKCHIP
1819 bool "Support Rockchip SoCs"
1821 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1831 select ENABLE_ARM_SOC_BOOT0_HOOK
1834 select SPL_DM if SPL
1835 select SPL_DM_SPI if SPL
1836 select SPL_DM_SPI_FLASH if SPL
1838 select SYS_THUMB_BUILD if !ARM64
1841 imply DEBUG_UART_BOARD_INIT
1842 imply DISTRO_DEFAULTS
1844 imply SARADC_ROCKCHIP
1846 imply SPL_SYS_MALLOC_SIMPLE
1849 imply USB_FUNCTION_FASTBOOT
1851 config ARCH_OCTEONTX
1852 bool "Support OcteonTX SoCs"
1855 select GPIO_EXTRA_HEADER
1859 select BOARD_LATE_INIT
1860 select SYS_CACHE_SHIFT_7
1862 config ARCH_OCTEONTX2
1863 bool "Support OcteonTX2 SoCs"
1866 select GPIO_EXTRA_HEADER
1870 select BOARD_LATE_INIT
1871 select SYS_CACHE_SHIFT_7
1873 config TARGET_THUNDERX_88XX
1874 bool "Support ThunderX 88xx"
1876 select GPIO_EXTRA_HEADER
1879 select SYS_CACHE_SHIFT_7
1882 bool "Support Aspeed SoCs"
1887 config TARGET_DURIAN
1888 bool "Support Phytium Durian Platform"
1890 select GPIO_EXTRA_HEADER
1892 Support for durian platform.
1893 It has 2GB Sdram, uart and pcie.
1895 config TARGET_PRESIDIO_ASIC
1896 bool "Support Cortina Presidio ASIC Platform"
1900 config TARGET_XENGUEST_ARM64
1901 bool "Xen guest ARM64"
1905 select LINUX_KERNEL_IMAGE_HEADER
1910 config SUPPORT_PASSING_ATAGS
1911 bool "Support pre-devicetree ATAG-based booting"
1913 imply SETUP_MEMORY_TAGS
1915 Support for booting older Linux kernels, using ATAGs rather than
1916 passing a devicetree. This is option is rarely used, and the
1917 semantics are defined at
1918 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1920 config SETUP_MEMORY_TAGS
1921 bool "Pass memory size information via ATAG"
1922 depends on SUPPORT_PASSING_ATAGS
1925 bool "Pass Linux kernel cmdline via ATAG"
1926 depends on SUPPORT_PASSING_ATAGS
1929 bool "Pass initrd starting point and size via ATAG"
1930 depends on SUPPORT_PASSING_ATAGS
1933 bool "Pass system revision via ATAG"
1934 depends on SUPPORT_PASSING_ATAGS
1937 bool "Pass system serial number via ATAG"
1938 depends on SUPPORT_PASSING_ATAGS
1940 config ARCH_SUPPORT_TFABOOT
1944 bool "Support for booting from TF-A"
1945 depends on ARCH_SUPPORT_TFABOOT
1947 Some platforms support the setup of secure registers (for instance
1948 for CPU errata handling) or provide secure services like PSCI.
1949 Those services could also be provided by other firmware parts
1950 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1951 does not need to (and cannot) execute this code.
1952 Enabling this option will make a U-Boot binary that is relying
1953 on other firmware layers to provide secure functionality.
1955 config TI_SECURE_DEVICE
1956 bool "HS Device Type Support"
1957 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1959 If a high secure (HS) device type is being used, this config
1960 must be set. This option impacts various aspects of the
1961 build system (to create signed boot images that can be
1962 authenticated) and the code. See the doc/README.ti-secure
1963 file for further details.
1965 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1966 config ISW_ENTRY_ADDR
1967 hex "Address in memory or XIP address of bootloader entry point"
1968 default 0x402F4000 if AM43XX
1969 default 0x402F0400 if AM33XX
1970 default 0x40301350 if OMAP54XX
1972 After any reset, the boot ROM searches the boot media for a valid
1973 boot image. For non-XIP devices, the ROM then copies the image into
1974 internal memory. For all boot modes, after the ROM processes the
1975 boot image it eventually computes the entry point address depending
1976 on the device type (secure/non-secure), boot media (xip/non-xip) and
1980 source "arch/arm/mach-aspeed/Kconfig"
1982 source "arch/arm/mach-at91/Kconfig"
1984 source "arch/arm/mach-bcm283x/Kconfig"
1986 source "arch/arm/mach-bcmstb/Kconfig"
1988 source "arch/arm/mach-davinci/Kconfig"
1990 source "arch/arm/mach-exynos/Kconfig"
1992 source "arch/arm/mach-highbank/Kconfig"
1994 source "arch/arm/mach-integrator/Kconfig"
1996 source "arch/arm/mach-ipq40xx/Kconfig"
1998 source "arch/arm/mach-k3/Kconfig"
2000 source "arch/arm/mach-keystone/Kconfig"
2002 source "arch/arm/mach-kirkwood/Kconfig"
2004 source "arch/arm/mach-lpc32xx/Kconfig"
2006 source "arch/arm/mach-mvebu/Kconfig"
2008 source "arch/arm/mach-octeontx/Kconfig"
2010 source "arch/arm/mach-octeontx2/Kconfig"
2012 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2014 source "arch/arm/mach-imx/mx2/Kconfig"
2016 source "arch/arm/mach-imx/mx3/Kconfig"
2018 source "arch/arm/mach-imx/mx5/Kconfig"
2020 source "arch/arm/mach-imx/mx6/Kconfig"
2022 source "arch/arm/mach-imx/mx7/Kconfig"
2024 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2026 source "arch/arm/mach-imx/imx8/Kconfig"
2028 source "arch/arm/mach-imx/imx8m/Kconfig"
2030 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2032 source "arch/arm/mach-imx/imxrt/Kconfig"
2034 source "arch/arm/mach-imx/mxs/Kconfig"
2036 source "arch/arm/mach-omap2/Kconfig"
2038 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2040 source "arch/arm/mach-orion5x/Kconfig"
2042 source "arch/arm/mach-owl/Kconfig"
2044 source "arch/arm/mach-rmobile/Kconfig"
2046 source "arch/arm/mach-meson/Kconfig"
2048 source "arch/arm/mach-mediatek/Kconfig"
2050 source "arch/arm/mach-qemu/Kconfig"
2052 source "arch/arm/mach-rockchip/Kconfig"
2054 source "arch/arm/mach-s5pc1xx/Kconfig"
2056 source "arch/arm/mach-snapdragon/Kconfig"
2058 source "arch/arm/mach-socfpga/Kconfig"
2060 source "arch/arm/mach-sti/Kconfig"
2062 source "arch/arm/mach-stm32/Kconfig"
2064 source "arch/arm/mach-stm32mp/Kconfig"
2066 source "arch/arm/mach-sunxi/Kconfig"
2068 source "arch/arm/mach-tegra/Kconfig"
2070 source "arch/arm/mach-u8500/Kconfig"
2072 source "arch/arm/mach-uniphier/Kconfig"
2074 source "arch/arm/cpu/armv7/vf610/Kconfig"
2076 source "arch/arm/mach-zynq/Kconfig"
2078 source "arch/arm/mach-zynqmp/Kconfig"
2080 source "arch/arm/mach-versal/Kconfig"
2082 source "arch/arm/mach-zynqmp-r5/Kconfig"
2084 source "arch/arm/cpu/armv7/Kconfig"
2086 source "arch/arm/cpu/armv8/Kconfig"
2088 source "arch/arm/mach-imx/Kconfig"
2090 source "arch/arm/mach-nexell/Kconfig"
2092 source "board/armltd/total_compute/Kconfig"
2094 source "board/bosch/shc/Kconfig"
2095 source "board/bosch/guardian/Kconfig"
2096 source "board/CarMediaLab/flea3/Kconfig"
2097 source "board/Marvell/aspenite/Kconfig"
2098 source "board/Marvell/octeontx/Kconfig"
2099 source "board/Marvell/octeontx2/Kconfig"
2100 source "board/armltd/vexpress64/Kconfig"
2101 source "board/cortina/presidio-asic/Kconfig"
2102 source "board/broadcom/bcm963158/Kconfig"
2103 source "board/broadcom/bcm968360bg/Kconfig"
2104 source "board/broadcom/bcm968580xref/Kconfig"
2105 source "board/broadcom/bcmns3/Kconfig"
2106 source "board/cavium/thunderx/Kconfig"
2107 source "board/eets/pdu001/Kconfig"
2108 source "board/emulation/qemu-arm/Kconfig"
2109 source "board/freescale/ls2080aqds/Kconfig"
2110 source "board/freescale/ls2080ardb/Kconfig"
2111 source "board/freescale/ls1088a/Kconfig"
2112 source "board/freescale/ls1028a/Kconfig"
2113 source "board/freescale/ls1021aqds/Kconfig"
2114 source "board/freescale/ls1043aqds/Kconfig"
2115 source "board/freescale/ls1021atwr/Kconfig"
2116 source "board/freescale/ls1021atsn/Kconfig"
2117 source "board/freescale/ls1021aiot/Kconfig"
2118 source "board/freescale/ls1046aqds/Kconfig"
2119 source "board/freescale/ls1043ardb/Kconfig"
2120 source "board/freescale/ls1046ardb/Kconfig"
2121 source "board/freescale/ls1046afrwy/Kconfig"
2122 source "board/freescale/ls1012aqds/Kconfig"
2123 source "board/freescale/ls1012ardb/Kconfig"
2124 source "board/freescale/ls1012afrdm/Kconfig"
2125 source "board/freescale/lx2160a/Kconfig"
2126 source "board/grinn/chiliboard/Kconfig"
2127 source "board/hisilicon/hikey/Kconfig"
2128 source "board/hisilicon/hikey960/Kconfig"
2129 source "board/hisilicon/poplar/Kconfig"
2130 source "board/isee/igep003x/Kconfig"
2131 source "board/kontron/sl28/Kconfig"
2132 source "board/myir/mys_6ulx/Kconfig"
2133 source "board/seeed/npi_imx6ull/Kconfig"
2134 source "board/socionext/developerbox/Kconfig"
2135 source "board/st/stv0991/Kconfig"
2136 source "board/tcl/sl50/Kconfig"
2137 source "board/toradex/colibri_pxa270/Kconfig"
2138 source "board/variscite/dart_6ul/Kconfig"
2139 source "board/vscom/baltos/Kconfig"
2140 source "board/phytium/durian/Kconfig"
2141 source "board/xen/xenguest_arm64/Kconfig"
2142 source "board/keymile/Kconfig"
2144 source "arch/arm/Kconfig.debug"
2149 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2150 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2151 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64