1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 bool "Enable support for CRC32 instruction"
17 ARMv8 implements dedicated crc32 instruction for crc32 calculation.
18 This is faster than software crc32 calculation. This instruction may
19 not be present on all ARMv8.0, but is always present on ARMv8.1 and
22 config POSITION_INDEPENDENT
23 bool "Generate position-independent pre-relocation code"
24 depends on ARM64 || CPU_V7A
26 U-Boot expects to be linked to a specific hard-coded address, and to
27 be loaded to and run from that address. This option lifts that
28 restriction, thus allowing the code to be loaded to and executed from
29 almost any 4K aligned address. This logic relies on the relocation
30 information that is embedded in the binary to support U-Boot
31 relocating itself to the top-of-RAM later during execution.
33 config INIT_SP_RELATIVE
34 bool "Specify the early stack pointer relative to the .bss section"
36 default n if ARCH_QEMU
37 default y if POSITION_INDEPENDENT
39 U-Boot typically uses a hard-coded value for the stack pointer
40 before relocation. Enable this option to instead calculate the
41 initial SP at run-time. This is useful to avoid hard-coding addresses
42 into U-Boot, so that it can be loaded and executed at arbitrary
43 addresses and thus avoid using arbitrary addresses at runtime.
45 If this option is enabled, the early stack pointer is set to
46 &_bss_start with a offset value added. The offset is specified by
47 SYS_INIT_SP_BSS_OFFSET.
49 config SYS_INIT_SP_BSS_OFFSET
50 int "Early stack offset from the .bss base address"
52 depends on INIT_SP_RELATIVE
55 This option's value is the offset added to &_bss_start in order to
56 calculate the stack pointer. This offset should be large enough so
57 that the early malloc region, global data (gd), and early stack usage
58 do not overlap any appended DTB.
60 config LINUX_KERNEL_IMAGE_HEADER
64 Place a Linux kernel image header at the start of the U-Boot binary.
65 The format of the header is described in the Linux kernel source at
66 Documentation/arm64/booting.txt. This feature is useful since the
67 image header reports the amount of memory (BSS and similar) that
68 U-Boot needs to use, but which isn't part of the binary.
70 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
71 depends on LINUX_KERNEL_IMAGE_HEADER
74 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
75 TEXT_OFFSET value written to the Linux kernel image header.
89 ARM GICV3 Interrupt translation service (ITS).
90 Basic support for programming locality specific peripheral
91 interrupts (LPI) configuration tables and enable LPI tables.
92 LPI configuration table can be used by u-boot or Linux.
93 ARM GICV3 has limitation, once the LPI table is enabled, LPI
94 configuration table can not be re-programmed, unless GICV3 reset.
100 config DMA_ADDR_T_64BIT
110 config GPIO_EXTRA_HEADER
113 # Used for compatibility with asm files copied from the kernel
114 config ARM_ASM_UNIFIED
118 # Used for compatibility with asm files copied from the kernel
122 config SYS_ICACHE_OFF
123 bool "Do not enable icache"
125 Do not enable instruction cache in U-Boot.
127 config SPL_SYS_ICACHE_OFF
128 bool "Do not enable icache in SPL"
130 default SYS_ICACHE_OFF
132 Do not enable instruction cache in SPL.
134 config SYS_DCACHE_OFF
135 bool "Do not enable dcache"
137 Do not enable data cache in U-Boot.
139 config SPL_SYS_DCACHE_OFF
140 bool "Do not enable dcache in SPL"
142 default SYS_DCACHE_OFF
144 Do not enable data cache in SPL.
146 config SYS_ARM_CACHE_CP15
147 bool "CP15 based cache enabling support"
149 Select this if your processor suports enabling caches by using
153 bool "MMU-based Paged Memory Management Support"
154 select SYS_ARM_CACHE_CP15
156 Select if you want MMU-based virtualised addressing space
157 support via paged memory management.
160 bool 'Use the ARM v7 PMSA Compliant MPU'
162 Some ARM systems without an MMU have instead a Memory Protection
163 Unit (MPU) that defines the type and permissions for regions of
165 If your CPU has an MPU then you should choose 'y' here unless you
166 know that you do not want to use the MPU.
168 # If set, the workarounds for these ARM errata are applied early during U-Boot
169 # startup. Note that in general these options force the workarounds to be
170 # applied; no CPU-type/version detection exists, unlike the similar options in
171 # the Linux kernel. Do not set these options unless they apply! Also note that
172 # the following can be machine-specific errata. These do have ability to
173 # provide rudimentary version and machine-specific checks, but expect no
175 # CONFIG_ARM_ERRATA_430973
176 # CONFIG_ARM_ERRATA_454179
177 # CONFIG_ARM_ERRATA_621766
178 # CONFIG_ARM_ERRATA_798870
179 # CONFIG_ARM_ERRATA_801819
180 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
181 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
183 config ARM_ERRATA_430973
186 config ARM_ERRATA_454179
189 config ARM_ERRATA_621766
192 config ARM_ERRATA_716044
195 config ARM_ERRATA_725233
198 config ARM_ERRATA_742230
201 config ARM_ERRATA_743622
204 config ARM_ERRATA_751472
207 config ARM_ERRATA_761320
210 config ARM_ERRATA_773022
213 config ARM_ERRATA_774769
216 config ARM_ERRATA_794072
219 config ARM_ERRATA_798870
222 config ARM_ERRATA_801819
225 config ARM_ERRATA_826974
228 config ARM_ERRATA_828024
231 config ARM_ERRATA_829520
234 config ARM_ERRATA_833069
237 config ARM_ERRATA_833471
240 config ARM_ERRATA_845369
243 config ARM_ERRATA_852421
246 config ARM_ERRATA_852423
249 config ARM_ERRATA_855873
252 config ARM_CORTEX_A8_CVE_2017_5715
255 config ARM_CORTEX_A15_CVE_2017_5715
260 select SYS_CACHE_SHIFT_5
265 select SYS_CACHE_SHIFT_5
270 select SYS_CACHE_SHIFT_5
275 select SYS_CACHE_SHIFT_5
280 select SYS_CACHE_SHIFT_5
286 select SYS_CACHE_SHIFT_5
293 select SYS_CACHE_SHIFT_6
300 select SYS_CACHE_SHIFT_5
301 select SYS_THUMB_BUILD
307 select SYS_ARM_CACHE_CP15
309 select SYS_CACHE_SHIFT_6
313 select SYS_CACHE_SHIFT_5
318 select SYS_CACHE_SHIFT_5
322 default "arm720t" if CPU_ARM720T
323 default "arm920t" if CPU_ARM920T
324 default "arm926ejs" if CPU_ARM926EJS
325 default "arm946es" if CPU_ARM946ES
326 default "arm1136" if CPU_ARM1136
327 default "arm1176" if CPU_ARM1176
328 default "armv7" if CPU_V7A
329 default "armv7" if CPU_V7R
330 default "armv7m" if CPU_V7M
331 default "pxa" if CPU_PXA
332 default "sa1100" if CPU_SA1100
333 default "armv8" if ARM64
337 default 4 if CPU_ARM720T
338 default 4 if CPU_ARM920T
339 default 5 if CPU_ARM926EJS
340 default 5 if CPU_ARM946ES
341 default 6 if CPU_ARM1136
342 default 6 if CPU_ARM1176
347 default 4 if CPU_SA1100
351 prompt "Select the ARM data write cache policy"
352 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
354 default SYS_ARM_CACHE_WRITEBACK
356 config SYS_ARM_CACHE_WRITEBACK
357 bool "Write-back (WB)"
359 A write updates the cache only and marks the cache line as dirty.
360 External memory is updated only when the line is evicted or explicitly
363 config SYS_ARM_CACHE_WRITETHROUGH
364 bool "Write-through (WT)"
366 A write updates both the cache and the external memory system.
367 This does not mark the cache line as dirty.
369 config SYS_ARM_CACHE_WRITEALLOC
370 bool "Write allocation (WA)"
372 A cache line is allocated on a write miss. This means that executing a
373 store instruction on the processor might cause a burst read to occur.
374 There is a linefill to obtain the data for the cache line, before the
379 bool "Enable ARCH_CPU_INIT"
381 Some architectures require a call to arch_cpu_init().
382 Say Y here to enable it
384 config SYS_ARCH_TIMER
385 bool "ARM Generic Timer support"
386 depends on CPU_V7A || ARM64
389 The ARM Generic Timer (aka arch-timer) provides an architected
390 interface to a timer source on an SoC.
391 It is mandatory for ARMv8 implementation and widely available
395 bool "Support for ARM SMC Calling Convention (SMCCC)"
396 depends on CPU_V7A || ARM64
399 Say Y here if you want to enable ARM SMC Calling Convention.
400 This should be enabled if U-Boot needs to communicate with system
401 firmware (for example, PSCI) according to SMCCC.
404 bool "support boot from semihosting"
406 In emulated environments, semihosting is a way for
407 the hosted environment to call out to the emulator to
408 retrieve files from the host machine.
410 config SYS_THUMB_BUILD
411 bool "Build U-Boot using the Thumb instruction set"
414 Use this flag to build U-Boot using the Thumb instruction set for
415 ARM architectures. Thumb instruction set provides better code
416 density. For ARM architectures that support Thumb2 this flag will
417 result in Thumb2 code generated by GCC.
419 config SPL_SYS_THUMB_BUILD
420 bool "Build SPL using the Thumb instruction set"
421 default y if SYS_THUMB_BUILD
422 depends on !ARM64 && SPL
424 Use this flag to build SPL using the Thumb instruction set for
425 ARM architectures. Thumb instruction set provides better code
426 density. For ARM architectures that support Thumb2 this flag will
427 result in Thumb2 code generated by GCC.
429 config TPL_SYS_THUMB_BUILD
430 bool "Build TPL using the Thumb instruction set"
431 default y if SYS_THUMB_BUILD
432 depends on TPL && !ARM64
434 Use this flag to build TPL using the Thumb instruction set for
435 ARM architectures. Thumb instruction set provides better code
436 density. For ARM architectures that support Thumb2 this flag will
437 result in Thumb2 code generated by GCC.
440 config SYS_L2CACHE_OFF
443 If SoC does not support L2CACHE or one does not want to enable
444 L2CACHE, choose this option.
446 config ENABLE_ARM_SOC_BOOT0_HOOK
447 bool "prepare BOOT0 header"
449 If the SoC's BOOT0 requires a header area filled with (magic)
450 values, then choose this option, and create a file included as
451 <asm/arch/boot0.h> which contains the required assembler code.
453 config ARM_CORTEX_CPU_IS_UP
456 config USE_ARCH_MEMCPY
457 bool "Use an assembly optimized implementation of memcpy"
459 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
461 Enable the generation of an optimized version of memcpy.
462 Such an implementation may be faster under some conditions
463 but may increase the binary size.
465 config SPL_USE_ARCH_MEMCPY
466 bool "Use an assembly optimized implementation of memcpy for SPL"
467 default y if USE_ARCH_MEMCPY
470 Enable the generation of an optimized version of memcpy.
471 Such an implementation may be faster under some conditions
472 but may increase the binary size.
474 config TPL_USE_ARCH_MEMCPY
475 bool "Use an assembly optimized implementation of memcpy for TPL"
476 default y if USE_ARCH_MEMCPY
479 Enable the generation of an optimized version of memcpy.
480 Such an implementation may be faster under some conditions
481 but may increase the binary size.
483 config USE_ARCH_MEMMOVE
484 bool "Use an assembly optimized implementation of memmove" if !ARM64
485 default USE_ARCH_MEMCPY if ARM64
488 Enable the generation of an optimized version of memmove.
489 Such an implementation may be faster under some conditions
490 but may increase the binary size.
492 config SPL_USE_ARCH_MEMMOVE
493 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64
494 default SPL_USE_ARCH_MEMCPY if ARM64
495 depends on SPL && ARM64
497 Enable the generation of an optimized version of memmove.
498 Such an implementation may be faster under some conditions
499 but may increase the binary size.
501 config TPL_USE_ARCH_MEMMOVE
502 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64
503 default TPL_USE_ARCH_MEMCPY if ARM64
504 depends on TPL && ARM64
506 Enable the generation of an optimized version of memmove.
507 Such an implementation may be faster under some conditions
508 but may increase the binary size.
510 config USE_ARCH_MEMSET
511 bool "Use an assembly optimized implementation of memset"
513 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400))
515 Enable the generation of an optimized version of memset.
516 Such an implementation may be faster under some conditions
517 but may increase the binary size.
519 config SPL_USE_ARCH_MEMSET
520 bool "Use an assembly optimized implementation of memset for SPL"
521 default y if USE_ARCH_MEMSET
524 Enable the generation of an optimized version of memset.
525 Such an implementation may be faster under some conditions
526 but may increase the binary size.
528 config TPL_USE_ARCH_MEMSET
529 bool "Use an assembly optimized implementation of memset for TPL"
530 default y if USE_ARCH_MEMSET
533 Enable the generation of an optimized version of memset.
534 Such an implementation may be faster under some conditions
535 but may increase the binary size.
537 config ARM64_SUPPORT_AARCH32
538 bool "ARM64 system support AArch32 execution state"
540 default y if !TARGET_THUNDERX_88XX
542 This ARM64 system supports AArch32 execution state.
545 prompt "Target select"
550 select GPIO_EXTRA_HEADER
551 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
552 select SPL_SEPARATE_BSS if SPL
557 select GPIO_EXTRA_HEADER
558 select SPL_DM_SPI if SPL
561 Support for TI's DaVinci platform.
564 bool "Marvell Kirkwood"
565 select ARCH_MISC_INIT
566 select BOARD_EARLY_INIT_F
568 select GPIO_EXTRA_HEADER
571 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
577 select GPIO_EXTRA_HEADER
578 select SPL_DM_SPI if SPL
579 select SPL_DM_SPI_FLASH if SPL
588 select GPIO_EXTRA_HEADER
590 config TARGET_STV0991
591 bool "Support stv0991"
597 select GPIO_EXTRA_HEADER
604 bool "Broadcom BCM283X family"
608 select GPIO_EXTRA_HEADER
611 select SERIAL_SEARCH_ALL
616 bool "Broadcom BCM63158 family"
622 bool "Broadcom BCM68360 family"
628 bool "Broadcom BCM6858 family"
634 bool "Broadcom BCM7XXX family"
637 select GPIO_EXTRA_HEADER
639 select OF_PRIOR_STAGE
642 This enables support for Broadcom ARM-based set-top box
643 chipsets, including the 7445 family of chips.
645 config TARGET_VEXPRESS_CA9X4
646 bool "Support vexpress_ca9x4"
650 config TARGET_BCMCYGNUS
651 bool "Support bcmcygnus"
653 select GPIO_EXTRA_HEADER
655 imply BCM_SF2_ETH_GMAC
663 bool "Support Broadcom Northstar2"
665 select GPIO_EXTRA_HEADER
667 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
668 ARMv8 Cortex-A57 processors targeting a broad range of networking
672 bool "Support Broadcom NS3"
674 select BOARD_LATE_INIT
676 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
677 ARMv8 Cortex-A72 processors targeting a broad range of networking
681 bool "Samsung EXYNOS"
691 select GPIO_EXTRA_HEADER
692 imply SYS_THUMB_BUILD
697 bool "Samsung S5PC1XX"
703 select GPIO_EXTRA_HEADER
707 bool "Calxeda Highbank"
720 config ARCH_INTEGRATOR
721 bool "ARM Ltd. Integrator family"
724 select GPIO_EXTRA_HEADER
729 bool "Qualcomm IPQ40xx SoCs"
735 select GPIO_EXTRA_HEADER
748 select GPIO_EXTRA_HEADER
750 select SYS_ARCH_TIMER
751 select SYS_THUMB_BUILD
757 bool "Texas Instruments' K3 Architecture"
762 config ARCH_OMAP2PLUS
765 select GPIO_EXTRA_HEADER
766 select SPL_BOARD_INIT if SPL
767 select SPL_STACK_R if SPL
769 imply TI_SYSC if DM && OF_CONTROL
774 select GPIO_EXTRA_HEADER
775 imply DISTRO_DEFAULTS
778 Support for the Meson SoC family developed by Amlogic Inc.,
779 targeted at media players and tablet computers. We currently
780 support the S905 (GXBaby) 64-bit SoC.
785 select GPIO_EXTRA_HEADER
788 select SPL_LIBCOMMON_SUPPORT if SPL
789 select SPL_LIBGENERIC_SUPPORT if SPL
790 select SPL_OF_CONTROL if SPL
793 Support for the MediaTek SoCs family developed by MediaTek Inc.
794 Please refer to doc/README.mediatek for more information.
797 bool "NXP LPC32xx platform"
802 select GPIO_EXTRA_HEADER
808 bool "NXP i.MX8 platform"
811 select GPIO_EXTRA_HEADER
814 select ENABLE_ARM_SOC_BOOT0_HOOK
817 bool "NXP i.MX8M platform"
819 select GPIO_EXTRA_HEADER
821 select SYS_FSL_HAS_SEC if IMX_HAB
822 select SYS_FSL_SEC_COMPAT_4
823 select SYS_FSL_SEC_LE
830 bool "NXP i.MX8ULP platform"
836 select GPIO_EXTRA_HEADER
840 bool "NXP i.MXRT platform"
844 select GPIO_EXTRA_HEADER
850 bool "NXP i.MX23 family"
852 select GPIO_EXTRA_HEADER
860 select GPIO_EXTRA_HEADER
865 bool "NXP i.MX28 family"
867 select GPIO_EXTRA_HEADER
873 bool "NXP i.MX31 family"
875 select GPIO_EXTRA_HEADER
881 select GPIO_EXTRA_HEADER
883 select SYS_FSL_HAS_SEC if IMX_HAB
884 select SYS_FSL_SEC_COMPAT_4
885 select SYS_FSL_SEC_LE
886 select ROM_UNIFIED_SECTIONS
888 imply SYS_THUMB_BUILD
892 select ARCH_MISC_INIT
894 select GPIO_EXTRA_HEADER
896 select SYS_FSL_HAS_SEC if IMX_HAB
897 select SYS_FSL_SEC_COMPAT_4
898 select SYS_FSL_SEC_LE
899 imply BOARD_EARLY_INIT_F
901 imply SYS_THUMB_BUILD
906 select GPIO_EXTRA_HEADER
908 select SYS_FSL_HAS_SEC
909 select SYS_FSL_SEC_COMPAT_4
910 select SYS_FSL_SEC_LE
912 imply SYS_THUMB_BUILD
916 default "arch/arm/mach-omap2/u-boot-spl.lds"
921 select BOARD_EARLY_INIT_F
923 select GPIO_EXTRA_HEADER
928 bool "Nexell S5P4418/S5P6818 SoC"
929 select ENABLE_ARM_SOC_BOOT0_HOOK
931 select GPIO_EXTRA_HEADER
934 bool "Actions Semi OWL SoCs"
938 select GPIO_EXTRA_HEADER
943 select SYS_RELOC_GD_ENV_ADDR
947 bool "QEMU Virtual Platform"
958 bool "Renesas ARM SoCs"
961 select GPIO_EXTRA_HEADER
962 imply BOARD_EARLY_INIT_F
965 imply SYS_THUMB_BUILD
966 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
968 config ARCH_SNAPDRAGON
969 bool "Qualcomm Snapdragon SoCs"
974 select GPIO_EXTRA_HEADER
983 bool "Altera SOCFPGA family"
984 select ARCH_EARLY_INIT_R
985 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
986 select ARM64 if TARGET_SOCFPGA_SOC64
987 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
991 select GPIO_EXTRA_HEADER
992 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
994 select SPL_DM_RESET if DM_RESET
996 select SPL_LIBCOMMON_SUPPORT
997 select SPL_LIBGENERIC_SUPPORT
998 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
999 select SPL_OF_CONTROL
1000 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
1006 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1008 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1009 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
1019 imply SPL_DM_SPI_FLASH
1020 imply SPL_LIBDISK_SUPPORT
1022 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
1023 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
1024 imply SPL_SPI_FLASH_SUPPORT
1029 bool "Support sunxi (Allwinner) SoCs"
1032 select CMD_MMC if MMC
1033 select CMD_USB if DISTRO_DEFAULTS && USB_HOST
1039 select DM_MMC if MMC
1040 select DM_SCSI if SCSI
1042 select GPIO_EXTRA_HEADER
1043 select OF_BOARD_SETUP
1046 select SPECIFY_CONSOLE_INDEX
1047 select SPL_STACK_R if SPL
1048 select SPL_SYS_MALLOC_SIMPLE if SPL
1049 select SPL_SYS_THUMB_BUILD if !ARM64
1052 select SYS_THUMB_BUILD if !ARM64
1053 select USB if DISTRO_DEFAULTS
1054 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
1055 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
1056 select SPL_USE_TINY_PRINTF
1058 select SYS_RELOC_GD_ENV_ADDR
1059 imply BOARD_LATE_INIT
1062 imply CMD_UBI if MTD_RAW_NAND
1063 imply DISTRO_DEFAULTS
1066 imply OF_LIBFDT_OVERLAY
1067 imply PRE_CONSOLE_BUFFER
1069 imply SPL_LIBCOMMON_SUPPORT
1070 imply SPL_LIBGENERIC_SUPPORT
1071 imply SPL_MMC if MMC
1077 bool "ST-Ericsson U8500 Series"
1081 select DM_MMC if MMC
1083 select DM_USB_GADGET if DM_USB
1087 imply AB8500_USB_PHY
1088 imply ARM_PL180_MMCI
1093 imply NOMADIK_MTU_TIMER
1098 imply SYS_THUMB_BUILD
1099 imply SYSRESET_SYSCON
1102 bool "Support Xilinx Versal Platform"
1106 select DM_ETH if NET
1107 select DM_MMC if MMC
1110 select GPIO_EXTRA_HEADER
1113 imply BOARD_LATE_INIT
1114 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1117 bool "Freescale Vybrid"
1119 select GPIO_EXTRA_HEADER
1121 select SYS_FSL_ERRATUM_ESDHC111
1126 bool "Xilinx Zynq based platform"
1131 select DM_ETH if NET
1132 select DM_MMC if MMC
1136 select GPIO_EXTRA_HEADER
1139 select SPL_BOARD_INIT if SPL
1140 select SPL_CLK if SPL
1141 select SPL_DM if SPL
1142 select SPL_DM_SPI if SPL
1143 select SPL_DM_SPI_FLASH if SPL
1144 select SPL_OF_CONTROL if SPL
1145 select SPL_SEPARATE_BSS if SPL
1147 imply ARCH_EARLY_INIT_R
1148 imply BOARD_LATE_INIT
1152 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1155 config ARCH_ZYNQMP_R5
1156 bool "Xilinx ZynqMP R5 based platform"
1160 select DM_ETH if NET
1161 select DM_MMC if MMC
1163 select GPIO_EXTRA_HEADER
1169 bool "Xilinx ZynqMP based platform"
1173 select DM_ETH if NET
1175 select DM_MMC if MMC
1177 select DM_SPI if SPI
1178 select DM_SPI_FLASH if DM_SPI
1181 select GPIO_EXTRA_HEADER
1183 select SPL_BOARD_INIT if SPL
1184 select SPL_CLK if SPL
1185 select SPL_DM if SPL
1186 select SPL_DM_SPI if SPI && SPL_DM
1187 select SPL_DM_SPI_FLASH if SPL_DM_SPI
1188 select SPL_DM_MAILBOX if SPL
1189 select SPL_FIRMWARE if SPL
1190 select SPL_SEPARATE_BSS if SPL
1194 imply BOARD_LATE_INIT
1196 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1203 select GPIO_EXTRA_HEADER
1204 imply DISTRO_DEFAULTS
1207 config TARGET_VEXPRESS64_AEMV8A
1208 bool "Support vexpress_aemv8a"
1210 select GPIO_EXTRA_HEADER
1213 config TARGET_VEXPRESS64_BASE_FVP
1214 bool "Support Versatile Express ARMv8a FVP BASE model"
1216 select GPIO_EXTRA_HEADER
1220 config TARGET_VEXPRESS64_JUNO
1221 bool "Support Versatile Express Juno Development Platform"
1223 select GPIO_EXTRA_HEADER
1236 config TARGET_TOTAL_COMPUTE
1237 bool "Support Total Compute Platform"
1245 config TARGET_LS2080A_EMU
1246 bool "Support ls2080a_emu"
1249 select ARMV8_MULTIENTRY
1250 select FSL_DDR_SYNC_REFRESH
1251 select GPIO_EXTRA_HEADER
1253 Support for Freescale LS2080A_EMU platform.
1254 The LS2080A Development System (EMULATOR) is a pre-silicon
1255 development platform that supports the QorIQ LS2080A
1256 Layerscape Architecture processor.
1258 config TARGET_LS1088AQDS
1259 bool "Support ls1088aqds"
1262 select ARMV8_MULTIENTRY
1263 select ARCH_SUPPORT_TFABOOT
1264 select BOARD_LATE_INIT
1265 select GPIO_EXTRA_HEADER
1267 select FSL_DDR_INTERACTIVE if !SD_BOOT
1269 Support for NXP LS1088AQDS platform.
1270 The LS1088A Development System (QDS) is a high-performance
1271 development platform that supports the QorIQ LS1088A
1272 Layerscape Architecture processor.
1274 config TARGET_LS2080AQDS
1275 bool "Support ls2080aqds"
1278 select ARMV8_MULTIENTRY
1279 select ARCH_SUPPORT_TFABOOT
1280 select BOARD_LATE_INIT
1281 select GPIO_EXTRA_HEADER
1286 select FSL_DDR_INTERACTIVE if !SPL
1288 Support for Freescale LS2080AQDS platform.
1289 The LS2080A Development System (QDS) is a high-performance
1290 development platform that supports the QorIQ LS2080A
1291 Layerscape Architecture processor.
1293 config TARGET_LS2080ARDB
1294 bool "Support ls2080ardb"
1297 select ARMV8_MULTIENTRY
1298 select ARCH_SUPPORT_TFABOOT
1299 select BOARD_LATE_INIT
1302 select FSL_DDR_INTERACTIVE if !SPL
1303 select GPIO_EXTRA_HEADER
1307 Support for Freescale LS2080ARDB platform.
1308 The LS2080A Reference design board (RDB) is a high-performance
1309 development platform that supports the QorIQ LS2080A
1310 Layerscape Architecture processor.
1312 config TARGET_LS2081ARDB
1313 bool "Support ls2081ardb"
1316 select ARMV8_MULTIENTRY
1317 select BOARD_LATE_INIT
1318 select GPIO_EXTRA_HEADER
1321 Support for Freescale LS2081ARDB platform.
1322 The LS2081A Reference design board (RDB) is a high-performance
1323 development platform that supports the QorIQ LS2081A/LS2041A
1324 Layerscape Architecture processor.
1326 config TARGET_LX2160ARDB
1327 bool "Support lx2160ardb"
1330 select ARMV8_MULTIENTRY
1331 select ARCH_SUPPORT_TFABOOT
1332 select BOARD_LATE_INIT
1333 select GPIO_EXTRA_HEADER
1335 Support for NXP LX2160ARDB platform.
1336 The lx2160ardb (LX2160A Reference design board (RDB)
1337 is a high-performance development platform that supports the
1338 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1340 config TARGET_LX2160AQDS
1341 bool "Support lx2160aqds"
1344 select ARMV8_MULTIENTRY
1345 select ARCH_SUPPORT_TFABOOT
1346 select BOARD_LATE_INIT
1347 select GPIO_EXTRA_HEADER
1349 Support for NXP LX2160AQDS platform.
1350 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1351 is a high-performance development platform that supports the
1352 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1354 config TARGET_LX2162AQDS
1355 bool "Support lx2162aqds"
1357 select ARCH_MISC_INIT
1359 select ARMV8_MULTIENTRY
1360 select ARCH_SUPPORT_TFABOOT
1361 select BOARD_LATE_INIT
1362 select GPIO_EXTRA_HEADER
1364 Support for NXP LX2162AQDS platform.
1365 The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
1368 bool "Support HiKey 96boards Consumer Edition Platform"
1373 select GPIO_EXTRA_HEADER
1376 select SPECIFY_CONSOLE_INDEX
1379 Support for HiKey 96boards platform. It features a HI6220
1380 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1382 config TARGET_HIKEY960
1383 bool "Support HiKey960 96boards Consumer Edition Platform"
1387 select GPIO_EXTRA_HEADER
1392 Support for HiKey960 96boards platform. It features a HI3660
1393 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1395 config TARGET_POPLAR
1396 bool "Support Poplar 96boards Enterprise Edition Platform"
1400 select GPIO_EXTRA_HEADER
1405 Support for Poplar 96boards EE platform. It features a HI3798cv200
1406 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1407 making it capable of running any commercial set-top solution based on
1410 config TARGET_LS1012AQDS
1411 bool "Support ls1012aqds"
1414 select ARCH_SUPPORT_TFABOOT
1415 select BOARD_LATE_INIT
1416 select GPIO_EXTRA_HEADER
1418 Support for Freescale LS1012AQDS platform.
1419 The LS1012A Development System (QDS) is a high-performance
1420 development platform that supports the QorIQ LS1012A
1421 Layerscape Architecture processor.
1423 config TARGET_LS1012ARDB
1424 bool "Support ls1012ardb"
1427 select ARCH_SUPPORT_TFABOOT
1428 select BOARD_LATE_INIT
1429 select GPIO_EXTRA_HEADER
1433 Support for Freescale LS1012ARDB platform.
1434 The LS1012A Reference design board (RDB) is a high-performance
1435 development platform that supports the QorIQ LS1012A
1436 Layerscape Architecture processor.
1438 config TARGET_LS1012A2G5RDB
1439 bool "Support ls1012a2g5rdb"
1442 select ARCH_SUPPORT_TFABOOT
1443 select BOARD_LATE_INIT
1444 select GPIO_EXTRA_HEADER
1447 Support for Freescale LS1012A2G5RDB platform.
1448 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1449 development platform that supports the QorIQ LS1012A
1450 Layerscape Architecture processor.
1452 config TARGET_LS1012AFRWY
1453 bool "Support ls1012afrwy"
1456 select ARCH_SUPPORT_TFABOOT
1457 select BOARD_LATE_INIT
1458 select GPIO_EXTRA_HEADER
1462 Support for Freescale LS1012AFRWY platform.
1463 The LS1012A FRWY board (FRWY) is a high-performance
1464 development platform that supports the QorIQ LS1012A
1465 Layerscape Architecture processor.
1467 config TARGET_LS1012AFRDM
1468 bool "Support ls1012afrdm"
1471 select ARCH_SUPPORT_TFABOOT
1472 select GPIO_EXTRA_HEADER
1474 Support for Freescale LS1012AFRDM platform.
1475 The LS1012A Freedom board (FRDM) is a high-performance
1476 development platform that supports the QorIQ LS1012A
1477 Layerscape Architecture processor.
1479 config TARGET_LS1028AQDS
1480 bool "Support ls1028aqds"
1483 select ARMV8_MULTIENTRY
1484 select ARCH_SUPPORT_TFABOOT
1485 select BOARD_LATE_INIT
1486 select GPIO_EXTRA_HEADER
1488 Support for Freescale LS1028AQDS platform
1489 The LS1028A Development System (QDS) is a high-performance
1490 development platform that supports the QorIQ LS1028A
1491 Layerscape Architecture processor.
1493 config TARGET_LS1028ARDB
1494 bool "Support ls1028ardb"
1497 select ARMV8_MULTIENTRY
1498 select ARCH_SUPPORT_TFABOOT
1499 select BOARD_LATE_INIT
1500 select GPIO_EXTRA_HEADER
1502 Support for Freescale LS1028ARDB platform
1503 The LS1028A Development System (RDB) is a high-performance
1504 development platform that supports the QorIQ LS1028A
1505 Layerscape Architecture processor.
1507 config TARGET_LS1088ARDB
1508 bool "Support ls1088ardb"
1511 select ARMV8_MULTIENTRY
1512 select ARCH_SUPPORT_TFABOOT
1513 select BOARD_LATE_INIT
1515 select FSL_DDR_INTERACTIVE if !SD_BOOT
1516 select GPIO_EXTRA_HEADER
1518 Support for NXP LS1088ARDB platform.
1519 The LS1088A Reference design board (RDB) is a high-performance
1520 development platform that supports the QorIQ LS1088A
1521 Layerscape Architecture processor.
1523 config TARGET_LS1021AQDS
1524 bool "Support ls1021aqds"
1526 select ARCH_SUPPORT_PSCI
1527 select BOARD_EARLY_INIT_F
1528 select BOARD_LATE_INIT
1530 select CPU_V7_HAS_NONSEC
1531 select CPU_V7_HAS_VIRT
1532 select LS1_DEEP_SLEEP
1535 select FSL_DDR_INTERACTIVE
1536 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1537 select GPIO_EXTRA_HEADER
1538 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
1541 config TARGET_LS1021ATWR
1542 bool "Support ls1021atwr"
1544 select ARCH_SUPPORT_PSCI
1545 select BOARD_EARLY_INIT_F
1546 select BOARD_LATE_INIT
1548 select CPU_V7_HAS_NONSEC
1549 select CPU_V7_HAS_VIRT
1550 select LS1_DEEP_SLEEP
1552 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1553 select GPIO_EXTRA_HEADER
1556 config TARGET_PG_WCOM_SELI8
1557 bool "Support Hitachi-Powergrids SELI8 service unit card"
1559 select ARCH_SUPPORT_PSCI
1560 select BOARD_EARLY_INIT_F
1561 select BOARD_LATE_INIT
1563 select CPU_V7_HAS_NONSEC
1564 select CPU_V7_HAS_VIRT
1566 select FSL_DDR_INTERACTIVE
1567 select GPIO_EXTRA_HEADER
1571 Support for Hitachi-Powergrids SELI8 service unit card.
1572 SELI8 is a QorIQ LS1021a based service unit card used
1573 in XMC20 and FOX615 product families.
1575 config TARGET_PG_WCOM_EXPU1
1576 bool "Support Hitachi-Powergrids EXPU1 service unit card"
1578 select ARCH_SUPPORT_PSCI
1579 select BOARD_EARLY_INIT_F
1580 select BOARD_LATE_INIT
1582 select CPU_V7_HAS_NONSEC
1583 select CPU_V7_HAS_VIRT
1585 select FSL_DDR_INTERACTIVE
1589 Support for Hitachi-Powergrids EXPU1 service unit card.
1590 EXPU1 is a QorIQ LS1021a based service unit card used
1591 in XMC20 and FOX615 product families.
1593 config TARGET_LS1021ATSN
1594 bool "Support ls1021atsn"
1596 select ARCH_SUPPORT_PSCI
1597 select BOARD_EARLY_INIT_F
1598 select BOARD_LATE_INIT
1600 select CPU_V7_HAS_NONSEC
1601 select CPU_V7_HAS_VIRT
1602 select LS1_DEEP_SLEEP
1604 select GPIO_EXTRA_HEADER
1607 config TARGET_LS1021AIOT
1608 bool "Support ls1021aiot"
1610 select ARCH_SUPPORT_PSCI
1611 select BOARD_LATE_INIT
1613 select CPU_V7_HAS_NONSEC
1614 select CPU_V7_HAS_VIRT
1616 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
1617 select GPIO_EXTRA_HEADER
1620 Support for Freescale LS1021AIOT platform.
1621 The LS1021A Freescale board (IOT) is a high-performance
1622 development platform that supports the QorIQ LS1021A
1623 Layerscape Architecture processor.
1625 config TARGET_LS1043AQDS
1626 bool "Support ls1043aqds"
1629 select ARMV8_MULTIENTRY
1630 select ARCH_SUPPORT_TFABOOT
1631 select BOARD_EARLY_INIT_F
1632 select BOARD_LATE_INIT
1634 select FSL_DDR_INTERACTIVE if !SPL
1635 select FSL_DSPI if !SPL_NO_DSPI
1636 select DM_SPI_FLASH if FSL_DSPI
1637 select GPIO_EXTRA_HEADER
1641 Support for Freescale LS1043AQDS platform.
1643 config TARGET_LS1043ARDB
1644 bool "Support ls1043ardb"
1647 select ARMV8_MULTIENTRY
1648 select ARCH_SUPPORT_TFABOOT
1649 select BOARD_EARLY_INIT_F
1650 select BOARD_LATE_INIT
1652 select FSL_DSPI if !SPL_NO_DSPI
1653 select DM_SPI_FLASH if FSL_DSPI
1654 select GPIO_EXTRA_HEADER
1656 Support for Freescale LS1043ARDB platform.
1658 config TARGET_LS1046AQDS
1659 bool "Support ls1046aqds"
1662 select ARMV8_MULTIENTRY
1663 select ARCH_SUPPORT_TFABOOT
1664 select BOARD_EARLY_INIT_F
1665 select BOARD_LATE_INIT
1666 select DM_SPI_FLASH if DM_SPI
1668 select FSL_DDR_BIST if !SPL
1669 select FSL_DDR_INTERACTIVE if !SPL
1670 select FSL_DDR_INTERACTIVE if !SPL
1671 select GPIO_EXTRA_HEADER
1674 Support for Freescale LS1046AQDS platform.
1675 The LS1046A Development System (QDS) is a high-performance
1676 development platform that supports the QorIQ LS1046A
1677 Layerscape Architecture processor.
1679 config TARGET_LS1046ARDB
1680 bool "Support ls1046ardb"
1683 select ARMV8_MULTIENTRY
1684 select ARCH_SUPPORT_TFABOOT
1685 select BOARD_EARLY_INIT_F
1686 select BOARD_LATE_INIT
1687 select DM_SPI_FLASH if DM_SPI
1688 select POWER_MC34VR500
1691 select FSL_DDR_INTERACTIVE if !SPL
1692 select GPIO_EXTRA_HEADER
1695 Support for Freescale LS1046ARDB platform.
1696 The LS1046A Reference Design Board (RDB) is a high-performance
1697 development platform that supports the QorIQ LS1046A
1698 Layerscape Architecture processor.
1700 config TARGET_LS1046AFRWY
1701 bool "Support ls1046afrwy"
1704 select ARMV8_MULTIENTRY
1705 select ARCH_SUPPORT_TFABOOT
1706 select BOARD_EARLY_INIT_F
1707 select BOARD_LATE_INIT
1708 select DM_SPI_FLASH if DM_SPI
1709 select GPIO_EXTRA_HEADER
1712 Support for Freescale LS1046AFRWY platform.
1713 The LS1046A Freeway Board (FRWY) is a high-performance
1714 development platform that supports the QorIQ LS1046A
1715 Layerscape Architecture processor.
1721 select ARMV8_MULTIENTRY
1737 select GPIO_EXTRA_HEADER
1738 select SPL_DM if SPL
1739 select SPL_DM_SPI if SPL
1740 select SPL_DM_SPI_FLASH if SPL
1741 select SPL_DM_I2C if SPL
1742 select SPL_DM_MMC if SPL
1743 select SPL_DM_SERIAL if SPL
1745 Support for Kontron SMARC-sAL28 board.
1747 config TARGET_COLIBRI_PXA270
1748 bool "Support colibri_pxa270"
1750 select GPIO_EXTRA_HEADER
1752 config ARCH_UNIPHIER
1753 bool "Socionext UniPhier SoCs"
1754 select BOARD_LATE_INIT
1763 select OF_BOARD_SETUP
1767 select SPL_BOARD_INIT if SPL
1768 select SPL_DM if SPL
1769 select SPL_LIBCOMMON_SUPPORT if SPL
1770 select SPL_LIBGENERIC_SUPPORT if SPL
1771 select SPL_OF_CONTROL if SPL
1772 select SPL_PINCTRL if SPL
1775 imply DISTRO_DEFAULTS
1778 Support for UniPhier SoC family developed by Socionext Inc.
1779 (formerly, System LSI Business Division of Panasonic Corporation)
1781 config ARCH_SYNQUACER
1782 bool "Socionext SynQuacer SoCs"
1788 select SYSRESET_PSCI
1791 Support for SynQuacer SoC family developed by Socionext Inc.
1792 This SoC is used on 96boards EE DeveloperBox.
1795 bool "Support STMicroelectronics STM32 MCU with cortex M"
1799 select GPIO_EXTRA_HEADER
1803 bool "Support STMicrolectronics SoCs"
1812 Support for STMicroelectronics STiH407/10 SoC family.
1813 This SoC is used on Linaro 96Board STiH410-B2260
1816 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1817 select ARCH_MISC_INIT
1818 select ARCH_SUPPORT_TFABOOT
1819 select BOARD_LATE_INIT
1825 select GPIO_EXTRA_HEADER
1829 select OF_SYSTEM_SETUP
1835 select SYS_THUMB_BUILD
1839 imply OF_LIBFDT_OVERLAY
1840 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1843 Support for STM32MP SoC family developed by STMicroelectronics,
1844 MPUs based on ARM cortex A core
1845 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1846 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1848 SPL is the unsecure FSBL for the basic boot chain.
1850 config ARCH_ROCKCHIP
1851 bool "Support Rockchip SoCs"
1853 select BINMAN if SPL_OPTEE || (SPL && !ARM64)
1863 select ENABLE_ARM_SOC_BOOT0_HOOK
1866 select SPL_DM if SPL
1867 select SPL_DM_SPI if SPL
1868 select SPL_DM_SPI_FLASH if SPL
1870 select SYS_THUMB_BUILD if !ARM64
1873 imply DEBUG_UART_BOARD_INIT
1874 imply DISTRO_DEFAULTS
1876 imply SARADC_ROCKCHIP
1878 imply SPL_SYS_MALLOC_SIMPLE
1881 imply USB_FUNCTION_FASTBOOT
1883 config ARCH_OCTEONTX
1884 bool "Support OcteonTX SoCs"
1887 select GPIO_EXTRA_HEADER
1891 select BOARD_LATE_INIT
1892 select SYS_CACHE_SHIFT_7
1894 config ARCH_OCTEONTX2
1895 bool "Support OcteonTX2 SoCs"
1898 select GPIO_EXTRA_HEADER
1902 select BOARD_LATE_INIT
1903 select SYS_CACHE_SHIFT_7
1905 config TARGET_THUNDERX_88XX
1906 bool "Support ThunderX 88xx"
1908 select GPIO_EXTRA_HEADER
1911 select SYS_CACHE_SHIFT_7
1914 bool "Support Aspeed SoCs"
1919 config TARGET_DURIAN
1920 bool "Support Phytium Durian Platform"
1922 select GPIO_EXTRA_HEADER
1924 Support for durian platform.
1925 It has 2GB Sdram, uart and pcie.
1927 config TARGET_PRESIDIO_ASIC
1928 bool "Support Cortina Presidio ASIC Platform"
1932 config TARGET_XENGUEST_ARM64
1933 bool "Xen guest ARM64"
1937 select LINUX_KERNEL_IMAGE_HEADER
1942 config SUPPORT_PASSING_ATAGS
1943 bool "Support pre-devicetree ATAG-based booting"
1945 imply SETUP_MEMORY_TAGS
1947 Support for booting older Linux kernels, using ATAGs rather than
1948 passing a devicetree. This is option is rarely used, and the
1949 semantics are defined at
1950 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a.
1952 config SETUP_MEMORY_TAGS
1953 bool "Pass memory size information via ATAG"
1954 depends on SUPPORT_PASSING_ATAGS
1957 bool "Pass Linux kernel cmdline via ATAG"
1958 depends on SUPPORT_PASSING_ATAGS
1961 bool "Pass initrd starting point and size via ATAG"
1962 depends on SUPPORT_PASSING_ATAGS
1965 bool "Pass system revision via ATAG"
1966 depends on SUPPORT_PASSING_ATAGS
1969 bool "Pass system serial number via ATAG"
1970 depends on SUPPORT_PASSING_ATAGS
1972 config STATIC_MACH_TYPE
1973 bool "Statically define the Machine ID number"
1975 When booting via ATAGs, enable this option if we know the correct
1976 machine ID number to use at compile time. Some systems will be
1977 passed the number dynamically by whatever loads U-Boot.
1980 int "Machine ID number"
1981 depends on STATIC_MACH_TYPE
1983 When booting via ATAGs, the machine type must be passed as a number.
1984 For the full list see https://www.arm.linux.org.uk/developer/machines
1986 config ARCH_SUPPORT_TFABOOT
1990 bool "Support for booting from TF-A"
1991 depends on ARCH_SUPPORT_TFABOOT
1993 Some platforms support the setup of secure registers (for instance
1994 for CPU errata handling) or provide secure services like PSCI.
1995 Those services could also be provided by other firmware parts
1996 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
1997 does not need to (and cannot) execute this code.
1998 Enabling this option will make a U-Boot binary that is relying
1999 on other firmware layers to provide secure functionality.
2001 config TI_SECURE_DEVICE
2002 bool "HS Device Type Support"
2003 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
2005 If a high secure (HS) device type is being used, this config
2006 must be set. This option impacts various aspects of the
2007 build system (to create signed boot images that can be
2008 authenticated) and the code. See the doc/README.ti-secure
2009 file for further details.
2011 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
2012 config ISW_ENTRY_ADDR
2013 hex "Address in memory or XIP address of bootloader entry point"
2014 default 0x402F4000 if AM43XX
2015 default 0x402F0400 if AM33XX
2016 default 0x40301350 if OMAP54XX
2018 After any reset, the boot ROM searches the boot media for a valid
2019 boot image. For non-XIP devices, the ROM then copies the image into
2020 internal memory. For all boot modes, after the ROM processes the
2021 boot image it eventually computes the entry point address depending
2022 on the device type (secure/non-secure), boot media (xip/non-xip) and
2026 source "arch/arm/mach-aspeed/Kconfig"
2028 source "arch/arm/mach-at91/Kconfig"
2030 source "arch/arm/mach-bcm283x/Kconfig"
2032 source "arch/arm/mach-bcmstb/Kconfig"
2034 source "arch/arm/mach-davinci/Kconfig"
2036 source "arch/arm/mach-exynos/Kconfig"
2038 source "arch/arm/mach-highbank/Kconfig"
2040 source "arch/arm/mach-integrator/Kconfig"
2042 source "arch/arm/mach-ipq40xx/Kconfig"
2044 source "arch/arm/mach-k3/Kconfig"
2046 source "arch/arm/mach-keystone/Kconfig"
2048 source "arch/arm/mach-kirkwood/Kconfig"
2050 source "arch/arm/mach-lpc32xx/Kconfig"
2052 source "arch/arm/mach-mvebu/Kconfig"
2054 source "arch/arm/mach-octeontx/Kconfig"
2056 source "arch/arm/mach-octeontx2/Kconfig"
2058 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
2060 source "arch/arm/mach-imx/mx2/Kconfig"
2062 source "arch/arm/mach-imx/mx3/Kconfig"
2064 source "arch/arm/mach-imx/mx5/Kconfig"
2066 source "arch/arm/mach-imx/mx6/Kconfig"
2068 source "arch/arm/mach-imx/mx7/Kconfig"
2070 source "arch/arm/mach-imx/mx7ulp/Kconfig"
2072 source "arch/arm/mach-imx/imx8/Kconfig"
2074 source "arch/arm/mach-imx/imx8m/Kconfig"
2076 source "arch/arm/mach-imx/imx8ulp/Kconfig"
2078 source "arch/arm/mach-imx/imxrt/Kconfig"
2080 source "arch/arm/mach-imx/mxs/Kconfig"
2082 source "arch/arm/mach-omap2/Kconfig"
2084 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
2086 source "arch/arm/mach-orion5x/Kconfig"
2088 source "arch/arm/mach-owl/Kconfig"
2090 source "arch/arm/mach-rmobile/Kconfig"
2092 source "arch/arm/mach-meson/Kconfig"
2094 source "arch/arm/mach-mediatek/Kconfig"
2096 source "arch/arm/mach-qemu/Kconfig"
2098 source "arch/arm/mach-rockchip/Kconfig"
2100 source "arch/arm/mach-s5pc1xx/Kconfig"
2102 source "arch/arm/mach-snapdragon/Kconfig"
2104 source "arch/arm/mach-socfpga/Kconfig"
2106 source "arch/arm/mach-sti/Kconfig"
2108 source "arch/arm/mach-stm32/Kconfig"
2110 source "arch/arm/mach-stm32mp/Kconfig"
2112 source "arch/arm/mach-sunxi/Kconfig"
2114 source "arch/arm/mach-tegra/Kconfig"
2116 source "arch/arm/mach-u8500/Kconfig"
2118 source "arch/arm/mach-uniphier/Kconfig"
2120 source "arch/arm/cpu/armv7/vf610/Kconfig"
2122 source "arch/arm/mach-zynq/Kconfig"
2124 source "arch/arm/mach-zynqmp/Kconfig"
2126 source "arch/arm/mach-versal/Kconfig"
2128 source "arch/arm/mach-zynqmp-r5/Kconfig"
2130 source "arch/arm/cpu/armv7/Kconfig"
2132 source "arch/arm/cpu/armv8/Kconfig"
2134 source "arch/arm/mach-imx/Kconfig"
2136 source "arch/arm/mach-nexell/Kconfig"
2138 source "board/armltd/total_compute/Kconfig"
2140 source "board/bosch/shc/Kconfig"
2141 source "board/bosch/guardian/Kconfig"
2142 source "board/Marvell/octeontx/Kconfig"
2143 source "board/Marvell/octeontx2/Kconfig"
2144 source "board/armltd/vexpress/Kconfig"
2145 source "board/armltd/vexpress64/Kconfig"
2146 source "board/cortina/presidio-asic/Kconfig"
2147 source "board/broadcom/bcm963158/Kconfig"
2148 source "board/broadcom/bcm968360bg/Kconfig"
2149 source "board/broadcom/bcm968580xref/Kconfig"
2150 source "board/broadcom/bcmns3/Kconfig"
2151 source "board/cavium/thunderx/Kconfig"
2152 source "board/eets/pdu001/Kconfig"
2153 source "board/emulation/qemu-arm/Kconfig"
2154 source "board/freescale/ls2080aqds/Kconfig"
2155 source "board/freescale/ls2080ardb/Kconfig"
2156 source "board/freescale/ls1088a/Kconfig"
2157 source "board/freescale/ls1028a/Kconfig"
2158 source "board/freescale/ls1021aqds/Kconfig"
2159 source "board/freescale/ls1043aqds/Kconfig"
2160 source "board/freescale/ls1021atwr/Kconfig"
2161 source "board/freescale/ls1021atsn/Kconfig"
2162 source "board/freescale/ls1021aiot/Kconfig"
2163 source "board/freescale/ls1046aqds/Kconfig"
2164 source "board/freescale/ls1043ardb/Kconfig"
2165 source "board/freescale/ls1046ardb/Kconfig"
2166 source "board/freescale/ls1046afrwy/Kconfig"
2167 source "board/freescale/ls1012aqds/Kconfig"
2168 source "board/freescale/ls1012ardb/Kconfig"
2169 source "board/freescale/ls1012afrdm/Kconfig"
2170 source "board/freescale/lx2160a/Kconfig"
2171 source "board/grinn/chiliboard/Kconfig"
2172 source "board/hisilicon/hikey/Kconfig"
2173 source "board/hisilicon/hikey960/Kconfig"
2174 source "board/hisilicon/poplar/Kconfig"
2175 source "board/isee/igep003x/Kconfig"
2176 source "board/kontron/sl28/Kconfig"
2177 source "board/myir/mys_6ulx/Kconfig"
2178 source "board/seeed/npi_imx6ull/Kconfig"
2179 source "board/socionext/developerbox/Kconfig"
2180 source "board/st/stv0991/Kconfig"
2181 source "board/tcl/sl50/Kconfig"
2182 source "board/toradex/colibri_pxa270/Kconfig"
2183 source "board/variscite/dart_6ul/Kconfig"
2184 source "board/vscom/baltos/Kconfig"
2185 source "board/phytium/durian/Kconfig"
2186 source "board/xen/xenguest_arm64/Kconfig"
2187 source "board/keymile/Kconfig"
2189 source "arch/arm/Kconfig.debug"
2194 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
2195 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
2196 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64