RISCV: config: tizen_*: Enable ZRAM support

Enable CONFIG_ZRAM with ZSTD compression.

Change-Id: Ia21d71f8db87b4437d17183e9e82ad14898af76f
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>

diff --git a/arch/riscv/configs/tizen_qemu_defconfig b/arch/riscv/configs/tizen_qemu_defconfig
index 6135f95..786bb3a 100644 (file)
--- a/arch/riscv/configs/tizen_qemu_defconfig
+++ b/arch/riscv/configs/tizen_qemu_defconfig
@@ -42,6 +42,7 @@ CONFIG_PCI_HOST_GENERIC=y
 CONFIG_PCIE_XILINX=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
+CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
@@ -122,6 +123,8 @@ CONFIG_9P_FS=y
 CONFIG_SECURITY=y
 CONFIG_SECURITY_SMACK=y
 CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y
+CONFIG_CRYPTO_LZ4=y
+CONFIG_CRYPTO_ZSTD=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y

diff --git a/arch/riscv/configs/tizen_visionfive2_defconfig b/arch/riscv/configs/tizen_visionfive2_defconfig
index 2aea5b9..7d1fc68 100644 (file)
--- a/arch/riscv/configs/tizen_visionfive2_defconfig
+++ b/arch/riscv/configs/tizen_visionfive2_defconfig
@@ -205,6 +205,7 @@ CONFIG_PCIE_FU740=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_CONNECTOR=y
+CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
@@ -403,6 +404,8 @@ CONFIG_SECURITY_SMACK_APPEND_SIGNALS=y
 # CONFIG_INTEGRITY_AUDIT is not set
 CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf,smack"
 CONFIG_CRYPTO_SHA1=y
+CONFIG_CRYPTO_LZ4=y
+CONFIG_CRYPTO_ZSTD=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_CRYPTO_DEV_JH7110=y