riscv: dts: starfive: jh7110: add dc&hdmi controller node

Add the dc controller and hdmi node for the Starfive JH7110 SoC.

Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
[cherry-pick : https://patchwork.kernel.org/project/linux-riscv/cover/20230602074043.33872-1-keith.zhao@starfivetech.com/]
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Change-Id: I66e234aaa823baee37f211b36b661716ff8af483

diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index f88e849..a82966c 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -63,6 +63,21 @@
                };
        };
 
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x20000000>;
+                       alignment = <0x0 0x1000>;
+                       alloc-ranges = <0x0 0x80000000 0x0 0x20000000>;
+                       linux,cma-default;
+               };
+       };
+
        gpio-restart {
                compatible = "gpio-restart";
                gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
@@ -415,6 +430,41 @@
                                             GPI_NONE)>;
                };
        };
+
+       hdmi_pins: hdmi-0 {
+               hdmi-scl-pins {
+                       pinmux = <GPIOMUX(0, GPOUT_SYS_HDMI_DDC_SCL,
+                                            GPOEN_SYS_HDMI_DDC_SCL,
+                                            GPI_SYS_HDMI_DDC_SCL)>;
+                       input-enable;
+                       bias-pull-up;
+               };
+
+               hdmi-sda-pins {
+                       pinmux = <GPIOMUX(1, GPOUT_SYS_HDMI_DDC_SDA,
+                                            GPOEN_SYS_HDMI_DDC_SDA,
+                                            GPI_SYS_HDMI_DDC_SDA)>;
+                       input-enable;
+                       bias-pull-up;
+               };
+
+               hdmi-cec-pins {
+                       pinmux = <GPIOMUX(14, GPOUT_SYS_HDMI_CEC_SDA,
+                                            GPOEN_SYS_HDMI_CEC_SDA,
+                                            GPI_SYS_HDMI_CEC_SDA)>;
+                       input-enable;
+                       bias-pull-up;
+               };
+
+               hdmi-hpd-pins {
+                       pinmux = <GPIOMUX(15, GPOUT_HIGH,
+                                            GPOEN_ENABLE,
+                                            GPI_SYS_HDMI_HPD)>;
+                       input-enable;
+                       bias-disable; /* external pull-up */
+               };
+       };
+
 };
 
 &uart0 {
@@ -423,6 +473,43 @@
        status = "okay";
 };
 
+&voutcrg {
+       status = "okay";
+};
+
+&display {
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&hdmi_pins>;
+
+       hdmi_in: port {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               hdmi_input: endpoint@0 {
+                       reg = <0>;
+                       remote-endpoint = <&dc_out_dpi0>;
+               };
+       };
+};
+
+&dc8200 {
+       status = "okay";
+
+       dc_out: port {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               dc_out_dpi0: endpoint@0 {
+                       reg = <0>;
+                       remote-endpoint = <&hdmi_input>;
+               };
+
+       };
+};
+
 &usb0 {
        status = "okay";
        usbdrd_cdns3: usb@0 {

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 70e4a9a..6e01c89 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -298,6 +298,11 @@
                #clock-cells = <0>;
        };
 
+       display: display-subsystem {
+               compatible = "verisilicon,display-subsystem";
+               ports = <&dc_out>;
+       };
+
        soc {
                compatible = "simple-bus";
                interrupt-parent = <&plic>;
@@ -1092,6 +1097,47 @@
                        power-domains = <&pwrc JH7110_PD_VOUT>;
                };
 
+               dc8200: dc8200@29400000 {
+                       compatible = "verisilicon,dc8200";
+                       reg = <0x0 0x29400000 0x0 0x100>,
+                             <0x0 0x29400800 0x0 0x2000>,
+                             <0x0 0x295B0000 0x0 0x90>;
+                       interrupts = <95>;
+                       clocks = <&syscrg JH7110_SYSCLK_NOC_BUS_DISP_AXI>,
+                               <&voutcrg JH7110_VOUTCLK_DC8200_PIX0>,
+                               <&voutcrg JH7110_VOUTCLK_DC8200_PIX1>,
+                               <&voutcrg JH7110_VOUTCLK_DC8200_AXI>,
+                               <&voutcrg JH7110_VOUTCLK_DC8200_CORE>,
+                               <&voutcrg JH7110_VOUTCLK_DC8200_AHB>,
+                               <&hdmitx0_pixelclk>,
+                               <&voutcrg JH7110_VOUTCLK_DC8200_PIX>;
+                       clock-names = "clk_vout_noc_disp",
+                               "clk_vout_pix0","clk_vout_pix1",
+                               "clk_vout_axi","clk_vout_core",
+                               "clk_vout_vout_ahb","hdmitx0_pixel",
+                               "clk_vout_dc8200";
+                       resets = <&voutcrg JH7110_VOUTRST_DC8200_AXI>,
+                                <&voutcrg JH7110_VOUTRST_DC8200_AHB>,
+                                <&voutcrg JH7110_VOUTRST_DC8200_CORE>;
+                       reset-names = "rst_vout_axi","rst_vout_ahb",
+                                               "rst_vout_core";
+               };
+
+               hdmi: hdmi@29590000 {
+                       compatible = "starfive,hdmi";
+                       reg = <0x0 0x29590000 0x0 0x4000>;
+                       interrupts = <99>;
+
+                       clocks = <&voutcrg JH7110_VOUTCLK_HDMI_TX_SYS>,
+                                <&voutcrg JH7110_VOUTCLK_HDMI_TX_MCLK>,
+                                <&voutcrg JH7110_VOUTCLK_HDMI_TX_BCLK>,
+                                <&hdmitx0_pixelclk>;
+                       clock-names = "sysclk", "mclk","bclk","pclk";
+                       resets = <&voutcrg JH7110_VOUTRST_HDMI_TX_HDMI>;
+                       reset-names = "hdmi_tx";
+                       #sound-dai-cells = <0>;
+               };
+
                pcie0: pcie@2B000000 {
                        compatible = "starfive,jh7110-pcie";
                        #address-cells = <3>;