u32 offset = DMAC_APB_BYTE_WR_CH_EN;
u32 reg_width, val;
+ if (!(chan->chip->flags & AXI_DMA_FLAG_HAS_APB_REGS))
+ return;
+
if (!chan->chip->apb_regs) {
dev_dbg(chan->chip->dev, "apb_regs not initialized\n");
return;
struct axi_dma_chip *chip = chan->chip;
unsigned long reg_value, val;
+ if (!(chip->flags & AXI_DMA_FLAG_HAS_APB_REGS))
+ return;
+
if (!chip->apb_regs) {
dev_err(chip->dev, "apb_regs not initialized\n");
return;
struct dw_axi_dma *dw;
struct dw_axi_dma_hcfg *hdata;
struct reset_control *resets;
- unsigned int flags;
u32 i;
int ret;
if (IS_ERR(chip->regs))
return PTR_ERR(chip->regs);
- flags = (uintptr_t)of_device_get_match_data(&pdev->dev);
- if (flags & AXI_DMA_FLAG_HAS_APB_REGS) {
+ chip->flags = (uintptr_t)of_device_get_match_data(&pdev->dev);
+ if (chip->flags & AXI_DMA_FLAG_HAS_APB_REGS) {
chip->apb_regs = devm_platform_ioremap_resource(pdev, 1);
if (IS_ERR(chip->apb_regs))
return PTR_ERR(chip->apb_regs);
}
- if (flags & AXI_DMA_FLAG_HAS_RESETS) {
+ if (chip->flags & AXI_DMA_FLAG_HAS_RESETS) {
resets = devm_reset_control_array_get_exclusive(&pdev->dev);
if (IS_ERR(resets))
return PTR_ERR(resets);
return ret;
}
- chip->dw->hdata->use_cfg2 = !!(flags & AXI_DMA_FLAG_USE_CFG2);
+ chip->dw->hdata->use_cfg2 = !!(chip->flags & AXI_DMA_FLAG_USE_CFG2);
chip->core_clk = devm_clk_get(chip->dev, "core-clk");
if (IS_ERR(chip->core_clk))