drivers/gpu/drm/img/img-rogue/services/server/devices/rgxpdvfs.c

   1 /*************************************************************************/ /*!
   2 @File           rgxpdvfs.c
   3 @Title          RGX Proactive DVFS Functionality
   4 @Codingstyle    IMG
   5 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
   6 @Description    Kernel mode Proactive DVFS Functionality.
   7 @License        Dual MIT/GPLv2
   8
   9 The contents of this file are subject to the MIT license as set out below.
  10
  11 Permission is hereby granted, free of charge, to any person obtaining a copy
  12 of this software and associated documentation files (the "Software"), to deal
  13 in the Software without restriction, including without limitation the rights
  14 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  15 copies of the Software, and to permit persons to whom the Software is
  16 furnished to do so, subject to the following conditions:
  17
  18 The above copyright notice and this permission notice shall be included in
  19 all copies or substantial portions of the Software.
  20
  21 Alternatively, the contents of this file may be used under the terms of
  22 the GNU General Public License Version 2 ("GPL") in which case the provisions
  23 of GPL are applicable instead of those above.
  24
  25 If you wish to allow use of your version of this file only under the terms of
  26 GPL, and not to allow others to use your version of this file under the terms
  27 of the MIT license, indicate your decision by deleting the provisions above
  28 and replace them with the notice and other provisions required by GPL as set
  29 out in the file called "GPL-COPYING" included in this distribution. If you do
  30 not delete the provisions above, a recipient may use your version of this file
  31 under the terms of either the MIT license or GPL.
  32
  33 This License is also included in this distribution in the file called
  34 "MIT-COPYING".
  35
  36 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
  37 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  38 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  39 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
  40 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  41 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  42 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  43 */ /**************************************************************************/
  44
  45 #include "rgxpdvfs.h"
  46 #include "rgxfwutils.h"
  47 #include "rgx_options.h"
  48 #include "rgxtimecorr.h"
  49
  50 #define USEC_TO_MSEC 1000
  51
  52 static inline IMG_BOOL _PDVFSEnabled(void)
  53 {
  54         PVRSRV_DATA *psSRVData = PVRSRVGetPVRSRVData();
  55
  56         if (psSRVData->sDriverInfo.sKMBuildInfo.ui32BuildOptions &
  57             psSRVData->sDriverInfo.sUMBuildInfo.ui32BuildOptions &
  58             OPTIONS_PDVFS_MASK)
  59         {
  60                 return IMG_TRUE;
  61         }
  62
  63         return IMG_FALSE;
  64 }
  65
  66 PVRSRV_ERROR PDVFSLimitMaxFrequency(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_UINT32 ui32MaxOPPPoint)
  67 {
  68         RGXFWIF_KCCB_CMD                sGPCCBCmd;
  69         PVRSRV_ERROR                    eError;
  70         IMG_UINT32                              ui32CmdKCCBSlot;
  71
  72         PVRSRV_VZ_RET_IF_MODE(GUEST, PVRSRV_ERROR_NOT_SUPPORTED);
  73
  74         if (!_PDVFSEnabled())
  75         {
  76                 /* No error message to avoid excessive messages */
  77                 return PVRSRV_OK;
  78         }
  79
  80         /* send feedback */
  81         sGPCCBCmd.eCmdType = RGXFWIF_KCCB_CMD_PDVFS_LIMIT_MAX_FREQ;
  82         sGPCCBCmd.uCmdData.sPDVFSMaxFreqData.ui32MaxOPPPoint = ui32MaxOPPPoint;
  83
  84         /* Submit command to the firmware.  */
  85         LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
  86         {
  87                 eError = RGXSendCommandAndGetKCCBSlot(psDevInfo,
  88                                                       &sGPCCBCmd,
  89                                                       PDUMP_FLAGS_CONTINUOUS,
  90                                                       &ui32CmdKCCBSlot);
  91                 if (eError != PVRSRV_ERROR_RETRY)
  92                 {
  93                         break;
  94                 }
  95                 OSWaitus(MAX_HW_TIME_US/WAIT_TRY_COUNT);
  96         } END_LOOP_UNTIL_TIMEOUT();
  97
  98         return eError;
  99 }
 100
 101 PVRSRV_ERROR PDVFSLimitMinFrequency(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_UINT32 ui32MinOPPPoint)
 102 {
 103         RGXFWIF_KCCB_CMD                sGPCCBCmd;
 104         PVRSRV_ERROR                    eError;
 105         IMG_UINT32                              ui32CmdKCCBSlot;
 106
 107         PVRSRV_VZ_RET_IF_MODE(GUEST, PVRSRV_ERROR_NOT_SUPPORTED);
 108
 109         if (!_PDVFSEnabled())
 110         {
 111                 /* No error message to avoid excessive messages */
 112                 return PVRSRV_OK;
 113         }
 114
 115         /* send feedback */
 116         sGPCCBCmd.eCmdType = RGXFWIF_KCCB_CMD_PDVFS_LIMIT_MIN_FREQ;
 117         sGPCCBCmd.uCmdData.sPDVFSMinFreqData.ui32MinOPPPoint = ui32MinOPPPoint;
 118
 119         /* Submit command to the firmware.  */
 120         LOOP_UNTIL_TIMEOUT(MAX_HW_TIME_US)
 121         {
 122                 eError = RGXSendCommandAndGetKCCBSlot(psDevInfo,
 123                                                       &sGPCCBCmd,
 124                                                       PDUMP_FLAGS_CONTINUOUS,
 125                                                       &ui32CmdKCCBSlot);
 126                 if (eError != PVRSRV_ERROR_RETRY)
 127                 {
 128                         break;
 129                 }
 130                 OSWaitus(MAX_HW_TIME_US/WAIT_TRY_COUNT);
 131         } END_LOOP_UNTIL_TIMEOUT();
 132
 133         return eError;
 134 }
 135
 136
 137 #if (PDVFS_COM == PDVFS_COM_HOST)
 138 /*************************************************************************/ /*!
 139 @Function       PDVFSProcessCoreClkChangeRequest
 140 @Description    Processes a core clock rate change request.
 141 @Input          psDevInfo            A pointer to PVRSRV_RGXDEV_INFO.
 142 @Input          ui32CoreClockRate    New core clock rate.
 143 @Return         PVRSRV_ERROR.
 144 */ /**************************************************************************/
 145 PVRSRV_ERROR PDVFSProcessCoreClkChangeRequest(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_UINT32 ui32CoreClockRate)
 146 {
 147         PVRSRV_DEVICE_CONFIG *psDevConfig = psDevInfo->psDeviceNode->psDevConfig;
 148         IMG_DVFS_DEVICE_CFG *psDVFSDeviceCfg = &psDevConfig->sDVFS.sDVFSDeviceCfg;
 149         RGX_TIMING_INFORMATION *psRGXTimingInfo = ((RGX_DATA*)(psDevConfig->hDevData))->psRGXTimingInfo;
 150         IMG_UINT32 ui32CoreClockRateCurrent = psRGXTimingInfo->ui32CoreClockSpeed;
 151         const IMG_OPP *psOpp = NULL;
 152         IMG_UINT32 ui32Index;
 153         PVRSRV_ERROR eError;
 154
 155         if (!_PDVFSEnabled())
 156         {
 157                 /* No error message to avoid excessive messages */
 158                 return PVRSRV_OK;
 159         }
 160
 161         PVR_DPF((PVR_DBG_MESSAGE, "Core clock rate = %u", ui32CoreClockRate));
 162
 163         /* Find the matching OPP (Exact). */
 164         for (ui32Index = 0; ui32Index < psDVFSDeviceCfg->ui32OPPTableSize; ui32Index++)
 165         {
 166                 if (ui32CoreClockRate == psDVFSDeviceCfg->pasOPPTable[ui32Index].ui32Freq)
 167                 {
 168                         psOpp = &psDVFSDeviceCfg->pasOPPTable[ui32Index];
 169                         break;
 170                 }
 171         }
 172
 173         if (! psOpp)
 174         {
 175                 PVR_DPF((PVR_DBG_ERROR, "Frequency not present in OPP table - %u", ui32CoreClockRate));
 176                 return PVRSRV_ERROR_INVALID_PARAMS;
 177         }
 178
 179         eError = PVRSRVDevicePreClockSpeedChange(psDevInfo->psDeviceNode, psDVFSDeviceCfg->bIdleReq, NULL);
 180         if (eError != PVRSRV_OK)
 181         {
 182                 PVR_DPF((PVR_DBG_ERROR, "PVRSRVDevicePreClockSpeedChange failed"));
 183                 return eError;
 184         }
 185
 186         psRGXTimingInfo->ui32CoreClockSpeed = ui32CoreClockRate;
 187
 188         /* Increasing frequency, change voltage first */
 189         if (ui32CoreClockRate > ui32CoreClockRateCurrent)
 190         {
 191                 psDVFSDeviceCfg->pfnSetVoltage(psOpp->ui32Volt);
 192         }
 193
 194         psDVFSDeviceCfg->pfnSetFrequency(ui32CoreClockRate);
 195
 196         /* Decreasing frequency, change frequency first */
 197         if (ui32CoreClockRate < ui32CoreClockRateCurrent)
 198         {
 199                 psDVFSDeviceCfg->pfnSetVoltage(psOpp->ui32Volt);
 200         }
 201
 202         PVRSRVDevicePostClockSpeedChange(psDevInfo->psDeviceNode, psDVFSDeviceCfg->bIdleReq, NULL);
 203
 204         return PVRSRV_OK;
 205 }
 206 #else
 207 /*************************************************************************/ /*!
 208 @Function       PDVFSProcessCoreClkChangeNotification
 209 @Description    Processes a core clock rate change notification.
 210 @Input          psDevInfo            A pointer to PVRSRV_RGXDEV_INFO.
 211 @Input          ui32CoreClockRate    New core clock rate.
 212 @Return         PVRSRV_ERROR.
 213 */ /**************************************************************************/
 214 PVRSRV_ERROR PDVFSProcessCoreClkChangeNotification(PVRSRV_RGXDEV_INFO *psDevInfo, IMG_UINT32 ui32CoreClockRate)
 215 {
 216         PVRSRV_DEVICE_CONFIG *psDevConfig = psDevInfo->psDeviceNode->psDevConfig;
 217         RGX_TIMING_INFORMATION *psRGXTimingInfo = ((RGX_DATA*)(psDevConfig->hDevData))->psRGXTimingInfo;
 218         PVRSRV_DEV_POWER_STATE ePowerState;
 219         PVRSRV_ERROR eError;
 220
 221         eError = PVRSRVPowerLock(psDevInfo->psDeviceNode);
 222
 223         if (eError != PVRSRV_OK)
 224         {
 225                 PVR_DPF((PVR_DBG_ERROR, "%s: failed to acquire lock (%s)",
 226                                  __func__, PVRSRVGetErrorString(eError)));
 227                 return eError;
 228         }
 229
 230         eError = PVRSRVGetDevicePowerState(psDevInfo->psDeviceNode, &ePowerState);
 231
 232         if (eError != PVRSRV_OK)
 233         {
 234                 PVR_DPF((PVR_DBG_ERROR, "%s: failed to acquire power state (%s)",
 235                                  __func__, PVRSRVGetErrorString(eError)));
 236                 PVRSRVPowerUnlock(psDevInfo->psDeviceNode);
 237                 return eError;
 238         }
 239
 240         /* Guest drivers do not initialize psRGXFWIfFwSysData */
 241         if ((ePowerState != PVRSRV_DEV_POWER_STATE_OFF)
 242             && ((psDevInfo->psRGXFWIfFwSysData == NULL) || (psDevInfo->psRGXFWIfFwSysData->ePowState != RGXFWIF_POW_OFF)))
 243         {
 244                 /* Update GPU frequency and timer correlation related data */
 245                 RGXTimeCorrEnd(psDevInfo->psDeviceNode, RGXTIMECORR_EVENT_DVFS);
 246                 psRGXTimingInfo->ui32CoreClockSpeed = ui32CoreClockRate;
 247                 RGXTimeCorrBegin(psDevInfo->psDeviceNode, RGXTIMECORR_EVENT_DVFS);
 248         }
 249         else
 250         {
 251                 psRGXTimingInfo->ui32CoreClockSpeed = ui32CoreClockRate;
 252         }
 253
 254         PVRSRVPowerUnlock(psDevInfo->psDeviceNode);
 255
 256         return PVRSRV_OK;
 257 }
 258 #endif
 259
 260
 261 #if defined(RGXFW_META_SUPPORT_2ND_THREAD)
 262 /*************************************************************************/ /*!
 263 @Function       RGXPDVFSCheckCoreClkRateChange
 264 @Description    Checks if core clock rate has changed since the last snap-shot.
 265 @Input          psDevInfo    A pointer to PVRSRV_RGXDEV_INFO.
 266 @Return         None.
 267 */ /**************************************************************************/
 268 void RGXPDVFSCheckCoreClkRateChange(PVRSRV_RGXDEV_INFO *psDevInfo)
 269 {
 270         IMG_UINT32 ui32CoreClkRate = *psDevInfo->pui32RGXFWIFCoreClkRate;
 271
 272         if (!_PDVFSEnabled())
 273         {
 274                 /* No error message to avoid excessive messages */
 275                 return;
 276         }
 277
 278         if (ui32CoreClkRate != 0 && psDevInfo->ui32CoreClkRateSnapshot != ui32CoreClkRate)
 279         {
 280                 psDevInfo->ui32CoreClkRateSnapshot = ui32CoreClkRate;
 281                 PDVFS_PROCESS_CORE_CLK_RATE_CHANGE(psDevInfo, ui32CoreClkRate);
 282         }
 283 }
 284 #endif