arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright (C) 2022 StarFive Technology Co., Ltd.
   4  * Copyright (C) 2022 Emil Renner Berthing <kernel@esmil.dk>
   5  */
   6
   7 /dts-v1/;
   8 #include "jh7110.dtsi"
   9 #include "jh7110-pinfunc.h"
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 / {
  13         aliases {
  14                 ethernet0 = &gmac0;
  15                 ethernet1 = &gmac1;
  16                 i2c0 = &i2c0;
  17                 i2c2 = &i2c2;
  18                 i2c5 = &i2c5;
  19                 i2c6 = &i2c6;
  20                 serial0 = &uart0;
  21                 mmc0 = &mmc0;
  22                 mmc1 = &mmc1;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         cpus {
  30                 timebase-frequency = <4000000>;
  31         };
  32
  33         memory@40000000 {
  34                 device_type = "memory";
  35                 reg = <0x0 0x40000000 0x1 0x0>;
  36         };
  37
  38         thermal-zones {
  39                 cpu-thermal {
  40                         polling-delay-passive = <250>;
  41                         polling-delay = <15000>;
  42
  43                         thermal-sensors = <&sfctemp>;
  44
  45                         cooling-maps {
  46                         };
  47
  48                         trips {
  49                                 cpu_alert0: cpu_alert0 {
  50                                         /* milliCelsius */
  51                                         temperature = <75000>;
  52                                         hysteresis = <2000>;
  53                                         type = "passive";
  54                                 };
  55
  56                                 cpu_crit: cpu_crit {
  57                                         /* milliCelsius */
  58                                         temperature = <90000>;
  59                                         hysteresis = <2000>;
  60                                         type = "critical";
  61                                 };
  62                         };
  63                 };
  64         };
  65
  66         reserved-memory {
  67                 #address-cells = <2>;
  68                 #size-cells = <2>;
  69                 ranges;
  70
  71                 linux,cma {
  72                         compatible = "shared-dma-pool";
  73                         reusable;
  74                         size = <0x0 0x30000000>;
  75                         alignment = <0x0 0x1000>;
  76                         alloc-ranges = <0x0 0x80000000 0x0 0x30000000>;
  77                         linux,cma-default;
  78                 };
  79         };
  80
  81         gpio-restart {
  82                 compatible = "gpio-restart";
  83                 gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
  84                 priority = <224>;
  85         };
  86 };
  87
  88 &dvp_clk {
  89         clock-frequency = <74250000>;
  90 };
  91
  92 &gmac0_rgmii_rxin {
  93         clock-frequency = <125000000>;
  94 };
  95
  96 &gmac0_rmii_refin {
  97         clock-frequency = <50000000>;
  98 };
  99
 100 &gmac1_rgmii_rxin {
 101         clock-frequency = <125000000>;
 102 };
 103
 104 &gmac1_rmii_refin {
 105         clock-frequency = <50000000>;
 106 };
 107
 108 &hdmitx0_pixelclk {
 109         clock-frequency = <297000000>;
 110 };
 111
 112 &i2srx_bclk_ext {
 113         clock-frequency = <12288000>;
 114 };
 115
 116 &i2srx_lrck_ext {
 117         clock-frequency = <192000>;
 118 };
 119
 120 &i2stx_bclk_ext {
 121         clock-frequency = <12288000>;
 122 };
 123
 124 &i2stx_lrck_ext {
 125         clock-frequency = <192000>;
 126 };
 127
 128 &mclk_ext {
 129         clock-frequency = <12288000>;
 130 };
 131
 132 &osc {
 133         clock-frequency = <24000000>;
 134 };
 135
 136 &rtc_osc {
 137         clock-frequency = <32768>;
 138 };
 139
 140 &tdm_ext {
 141         clock-frequency = <49152000>;
 142 };
 143
 144 &gmac0 {
 145         phy-handle = <&phy0>;
 146         phy-mode = "rgmii-id";
 147         status = "okay";
 148
 149         mdio {
 150                 #address-cells = <1>;
 151                 #size-cells = <0>;
 152                 compatible = "snps,dwmac-mdio";
 153
 154                 phy0: ethernet-phy@0 {
 155                         reg = <0>;
 156                 };
 157         };
 158 };
 159
 160 &gmac1 {
 161         phy-handle = <&phy1>;
 162         phy-mode = "rgmii-id";
 163         status = "okay";
 164
 165         mdio {
 166                 #address-cells = <1>;
 167                 #size-cells = <0>;
 168                 compatible = "snps,dwmac-mdio";
 169
 170                 phy1: ethernet-phy@1 {
 171                         reg = <0>;
 172                 };
 173         };
 174 };
 175
 176 &gpu {
 177         status = "okay";
 178 };
 179
 180 &jpu {
 181         status = "okay";
 182 };
 183
 184 &vpu_dec {
 185         status = "okay";
 186 };
 187
 188 &vpu_enc {
 189         status = "okay";
 190 };
 191
 192 &i2c0 {
 193         clock-frequency = <100000>;
 194         i2c-sda-hold-time-ns = <300>;
 195         i2c-sda-falling-time-ns = <510>;
 196         i2c-scl-falling-time-ns = <510>;
 197         pinctrl-names = "default";
 198         pinctrl-0 = <&i2c0_pins>;
 199         status = "okay";
 200 };
 201
 202 &i2c2 {
 203         clock-frequency = <100000>;
 204         i2c-sda-hold-time-ns = <300>;
 205         i2c-sda-falling-time-ns = <510>;
 206         i2c-scl-falling-time-ns = <510>;
 207         pinctrl-names = "default";
 208         pinctrl-0 = <&i2c2_pins>;
 209         status = "okay";
 210 };
 211
 212 &i2c5 {
 213         clock-frequency = <100000>;
 214         i2c-sda-hold-time-ns = <300>;
 215         i2c-sda-falling-time-ns = <510>;
 216         i2c-scl-falling-time-ns = <510>;
 217         pinctrl-names = "default";
 218         pinctrl-0 = <&i2c5_pins>;
 219         status = "okay";
 220
 221         eeprom@50 {
 222                 compatible = "atmel,24c04";
 223                 reg = <0x50>;
 224                 pagesize = <16>;
 225         };
 226
 227         axp15060: pmic@36 {
 228                 compatible = "x-powers,axp15060";
 229                 reg = <0x36>;
 230
 231                 regulators {
 232                         vdd_cpu: dcdc2 {
 233                                 regulator-always-on;
 234                                 regulator-min-microvolt = <500000>;
 235                                 regulator-max-microvolt = <1540000>;
 236                                 regulator-name = "vdd-cpu";
 237                         };
 238                 };
 239         };
 240 };
 241
 242 &i2c6 {
 243         clock-frequency = <100000>;
 244         i2c-sda-hold-time-ns = <300>;
 245         i2c-sda-falling-time-ns = <510>;
 246         i2c-scl-falling-time-ns = <510>;
 247         pinctrl-names = "default";
 248         pinctrl-0 = <&i2c6_pins>;
 249         status = "okay";
 250 };
 251
 252 &mmc0 {
 253         max-frequency = <100000000>;
 254         bus-width = <8>;
 255         cap-mmc-highspeed;
 256         mmc-ddr-1_8v;
 257         mmc-hs200-1_8v;
 258         non-removable;
 259         cap-mmc-hw-reset;
 260         post-power-on-delay-ms = <200>;
 261         status = "okay";
 262 };
 263
 264 &mmc1 {
 265         max-frequency = <100000000>;
 266         bus-width = <4>;
 267         no-sdio;
 268         no-mmc;
 269         broken-cd;
 270         cap-sd-highspeed;
 271         post-power-on-delay-ms = <200>;
 272         status = "okay";
 273 };
 274
 275 &spi0 {
 276         spi_dev0: spi@0 {
 277                 compatible = "rohm,dh2228fv";
 278                 pl022,com-mode = <1>;
 279                 spi-max-frequency = <10000000>;
 280                 reg = <0>;
 281                 status = "okay";
 282         };
 283 };
 284
 285 &pcie0 {
 286         pinctrl-names = "default";
 287         reset-gpios = <&sysgpio 26 GPIO_ACTIVE_LOW>;
 288         phys = <&pciephy0>;
 289         status = "okay";
 290 };
 291
 292 &pcie1 {
 293         pinctrl-names = "default";
 294         reset-gpios = <&sysgpio 28 GPIO_ACTIVE_LOW>;
 295         phys = <&pciephy1>;
 296         status = "okay";
 297 };
 298
 299 &ptc {
 300         pinctrl-names = "default";
 301         pinctrl-0 = <&pwm_pins>;
 302         status = "okay";
 303 };
 304
 305 &sysgpio {
 306         i2c0_pins: i2c0-0 {
 307                 i2c-pins {
 308                         pinmux = <GPIOMUX(57, GPOUT_LOW,
 309                                               GPOEN_SYS_I2C0_CLK,
 310                                               GPI_SYS_I2C0_CLK)>,
 311                                  <GPIOMUX(58, GPOUT_LOW,
 312                                               GPOEN_SYS_I2C0_DATA,
 313                                               GPI_SYS_I2C0_DATA)>;
 314                         bias-disable; /* external pull-up */
 315                         input-enable;
 316                         input-schmitt-enable;
 317                 };
 318         };
 319
 320         i2c2_pins: i2c2-0 {
 321                 i2c-pins {
 322                         pinmux = <GPIOMUX(3, GPOUT_LOW,
 323                                              GPOEN_SYS_I2C2_CLK,
 324                                              GPI_SYS_I2C2_CLK)>,
 325                                  <GPIOMUX(2, GPOUT_LOW,
 326                                              GPOEN_SYS_I2C2_DATA,
 327                                              GPI_SYS_I2C2_DATA)>;
 328                         bias-disable; /* external pull-up */
 329                         input-enable;
 330                         input-schmitt-enable;
 331                 };
 332         };
 333
 334         i2c5_pins: i2c5-0 {
 335                 i2c-pins {
 336                         pinmux = <GPIOMUX(19, GPOUT_LOW,
 337                                               GPOEN_SYS_I2C5_CLK,
 338                                               GPI_SYS_I2C5_CLK)>,
 339                                  <GPIOMUX(20, GPOUT_LOW,
 340                                               GPOEN_SYS_I2C5_DATA,
 341                                               GPI_SYS_I2C5_DATA)>;
 342                         bias-disable; /* external pull-up */
 343                         input-enable;
 344                         input-schmitt-enable;
 345                 };
 346         };
 347
 348         i2c6_pins: i2c6-0 {
 349                 i2c-pins {
 350                         pinmux = <GPIOMUX(16, GPOUT_LOW,
 351                                               GPOEN_SYS_I2C6_CLK,
 352                                               GPI_SYS_I2C6_CLK)>,
 353                                  <GPIOMUX(17, GPOUT_LOW,
 354                                               GPOEN_SYS_I2C6_DATA,
 355                                               GPI_SYS_I2C6_DATA)>;
 356                         bias-disable; /* external pull-up */
 357                         input-enable;
 358                         input-schmitt-enable;
 359                 };
 360         };
 361
 362         pcie0_wake_default: pcie0_wake_default {
 363                 wake-pins {
 364                         pinmux = <GPIOMUX(32, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 365                         bias-disable;
 366                         drive-strength = <2>;
 367                         input-enable;
 368                         input-schmitt-disable;
 369                         slew-rate = <0>;
 370                 };
 371         };
 372
 373         pcie0_clkreq_default: pcie0_clkreq_default {
 374                 clkreq-pins {
 375                         bias-disable;
 376                         pinmux = <GPIOMUX(27, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 377                         drive-strength = <2>;
 378                         input-enable;
 379                         input-schmitt-disable;
 380                         slew-rate = <0>;
 381                 };
 382         };
 383
 384         pcie1_wake_default: pcie1_wake_default {
 385                 wake-pins {
 386                         bias-disable;
 387                         pinmux = <GPIOMUX(21, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 388                         drive-strength = <2>;
 389                         input-enable;
 390                         input-schmitt-disable;
 391                         slew-rate = <0>;
 392                 };
 393         };
 394
 395         pcie1_clkreq_default: pcie1_clkreq_default {
 396                 clkreq-pins {
 397                         bias-disable;
 398                         pinmux = <GPIOMUX(29, GPOUT_HIGH, GPOEN_ENABLE, GPI_NONE)>;
 399                         drive-strength = <2>;
 400                         input-enable;
 401                         input-schmitt-disable;
 402                         slew-rate = <0>;
 403                 };
 404         };
 405
 406         pwm_pins: pwm-0 {
 407                 pwm-pins {
 408                         pinmux = <GPIOMUX(46, GPOUT_SYS_PWM_CHANNEL0,
 409                                         GPOEN_SYS_PWM0_CHANNEL0, GPI_NONE)>,
 410                                         <GPIOMUX(59, GPOUT_SYS_PWM_CHANNEL1,
 411                                         GPOEN_SYS_PWM0_CHANNEL1, GPI_NONE)>;
 412                         bias-disable;
 413                         drive-strength = <12>;
 414                         input-disable;
 415                         input-schmitt-disable;
 416                         slew-rate = <0>;
 417                 };
 418         };
 419
 420         uart0_pins: uart0-0 {
 421                 tx-pins {
 422                         pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
 423                                              GPOEN_ENABLE,
 424                                              GPI_NONE)>;
 425                         bias-disable;
 426                         drive-strength = <12>;
 427                         input-disable;
 428                         input-schmitt-disable;
 429                         slew-rate = <0>;
 430                 };
 431
 432                 rx-pins {
 433                         pinmux = <GPIOMUX(6, GPOUT_LOW,
 434                                              GPOEN_DISABLE,
 435                                              GPI_SYS_UART0_RX)>;
 436                         bias-disable; /* external pull-up */
 437                         drive-strength = <2>;
 438                         input-enable;
 439                         input-schmitt-enable;
 440                         slew-rate = <0>;
 441                 };
 442         };
 443
 444         mclk_ext_pins: mclk-ext-pins {
 445                 mclk-ext-pins {
 446                         pinmux = <GPIOMUX(4, GPOUT_HIGH,
 447                                              GPOEN_ENABLE,
 448                                              GPI_SYS_MCLK_EXT)>;
 449                 };
 450         };
 451
 452         pwmdac0_pins: pwmdac0-pins {
 453                 pwmdac0-pins-left {
 454                         pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
 455                                              GPOEN_ENABLE,
 456                                              GPI_NONE)>;
 457                 };
 458
 459                 pwmdac0-pins-right {
 460                         pinmux = <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
 461                                              GPOEN_ENABLE,
 462                                              GPI_NONE)>;
 463                 };
 464         };
 465
 466         hdmi_pins: hdmi-0 {
 467                 hdmi-scl-pins {
 468                         pinmux = <GPIOMUX(0, GPOUT_SYS_HDMI_DDC_SCL,
 469                                              GPOEN_SYS_HDMI_DDC_SCL,
 470                                              GPI_SYS_HDMI_DDC_SCL)>;
 471                         input-enable;
 472                         bias-pull-up;
 473                 };
 474
 475                 hdmi-sda-pins {
 476                         pinmux = <GPIOMUX(1, GPOUT_SYS_HDMI_DDC_SDA,
 477                                              GPOEN_SYS_HDMI_DDC_SDA,
 478                                              GPI_SYS_HDMI_DDC_SDA)>;
 479                         input-enable;
 480                         bias-pull-up;
 481                 };
 482
 483                 hdmi-cec-pins {
 484                         pinmux = <GPIOMUX(14, GPOUT_SYS_HDMI_CEC_SDA,
 485                                              GPOEN_SYS_HDMI_CEC_SDA,
 486                                              GPI_SYS_HDMI_CEC_SDA)>;
 487                         input-enable;
 488                         bias-pull-up;
 489                 };
 490
 491                 hdmi-hpd-pins {
 492                         pinmux = <GPIOMUX(15, GPOUT_HIGH,
 493                                              GPOEN_ENABLE,
 494                                              GPI_SYS_HDMI_HPD)>;
 495                         input-enable;
 496                         bias-disable; /* external pull-up */
 497                 };
 498         };
 499
 500 };
 501
 502 &uart0 {
 503         pinctrl-names = "default";
 504         pinctrl-0 = <&uart0_pins>;
 505         status = "okay";
 506 };
 507
 508 &voutcrg {
 509         status = "okay";
 510 };
 511
 512 &display {
 513         status = "okay";
 514 };
 515
 516 &hdmi {
 517         status = "okay";
 518         pinctrl-names = "default";
 519         pinctrl-0 = <&hdmi_pins>;
 520
 521         hdmi_in: port {
 522                 #address-cells = <1>;
 523                 #size-cells = <0>;
 524                 hdmi_input: endpoint@0 {
 525                         reg = <0>;
 526                         remote-endpoint = <&dc_out_dpi0>;
 527                 };
 528         };
 529 };
 530
 531 &dc8200 {
 532         status = "okay";
 533
 534         dc_out: port {
 535                 #address-cells = <1>;
 536                 #size-cells = <0>;
 537                 dc_out_dpi0: endpoint@0 {
 538                         reg = <0>;
 539                         remote-endpoint = <&hdmi_input>;
 540                 };
 541
 542         };
 543 };
 544
 545 &usb0 {
 546         status = "okay";
 547         usbdrd_cdns3: usb@0 {
 548                 dr_mode = "peripheral";
 549         };
 550 };
 551
 552 &U74_1 {
 553         cpu-supply = <&vdd_cpu>;
 554 };
 555
 556 &U74_2 {
 557         cpu-supply = <&vdd_cpu>;
 558 };
 559
 560 &U74_3 {
 561         cpu-supply = <&vdd_cpu>;
 562 };
 563
 564 &U74_4 {
 565         cpu-supply = <&vdd_cpu>;
 566 };
 567
 568 &i2stx_4ch0 {
 569         pinctrl-names = "default";
 570         pinctrl-0 = <&mclk_ext_pins>;
 571         status = "okay";
 572 };
 573
 574 &sound1 {
 575         /* i2s + hdmi */
 576         simple-audio-card,dai-link@0 {
 577                 reg = <0>;
 578                 format = "i2s";
 579                 bitclock-master = <&sndi2s0>;
 580                 frame-master = <&sndi2s0>;
 581                 mclk-fs = <256>;
 582                 status = "okay";
 583
 584                 sndi2s0: cpu {
 585                         sound-dai = <&i2stx_4ch0>;
 586                 };
 587
 588                 sndhdmi0: codec {
 589                         sound-dai = <&hdmi>;
 590                 };
 591         };
 592 };
 593
 594 &sound3 {
 595         simple-audio-card,dai-link@0 {
 596                 reg = <0>;
 597                 format = "left_j";
 598                 bitclock-master = <&sndcpu0>;
 599                 frame-master = <&sndcpu0>;
 600                 status = "okay";
 601
 602                 sndcpu0: cpu {
 603                         sound-dai = <&pwmdac>;
 604                 };
 605
 606                 codec {
 607                         sound-dai = <&pwmdac_codec>;
 608                 };
 609         };
 610 };
 611
 612 &pwmdac {
 613         pinctrl-names = "default";
 614         pinctrl-0 = <&pwmdac0_pins>;
 615         status = "okay";
 616 };
 617
 618 &mailbox_contrl0 {
 619         status = "okay";
 620 };
 621
 622 &mailbox_client0 {
 623         status = "okay";
 624 };