drivers/net/phy/micrel.c

   1 /*
   2  * drivers/net/phy/micrel.c
   3  *
   4  * Driver for Micrel PHYs
   5  *
   6  * Author: David J. Choi
   7  *
   8  * Copyright (c) 2010-2013 Micrel, Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  * Support : Micrel Phys:
  16  *              Giga phys: ksz9021, ksz9031
  17  *              100/10 Phys : ksz8001, ksz8721, ksz8737, ksz8041
  18  *                         ksz8021, ksz8031, ksz8051,
  19  *                         ksz8081, ksz8091,
  20  *                         ksz8061,
  21  *              Switch : ksz8873, ksz886x
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/phy.h>
  27 #include <linux/micrel_phy.h>
  28 #include <linux/of.h>
  29
  30 /* Operation Mode Strap Override */
  31 #define MII_KSZPHY_OMSO                         0x16
  32 #define KSZPHY_OMSO_B_CAST_OFF                  (1 << 9)
  33 #define KSZPHY_OMSO_RMII_OVERRIDE               (1 << 1)
  34 #define KSZPHY_OMSO_MII_OVERRIDE                (1 << 0)
  35
  36 /* general Interrupt control/status reg in vendor specific block. */
  37 #define MII_KSZPHY_INTCS                        0x1B
  38 #define KSZPHY_INTCS_JABBER                     (1 << 15)
  39 #define KSZPHY_INTCS_RECEIVE_ERR                (1 << 14)
  40 #define KSZPHY_INTCS_PAGE_RECEIVE               (1 << 13)
  41 #define KSZPHY_INTCS_PARELLEL                   (1 << 12)
  42 #define KSZPHY_INTCS_LINK_PARTNER_ACK           (1 << 11)
  43 #define KSZPHY_INTCS_LINK_DOWN                  (1 << 10)
  44 #define KSZPHY_INTCS_REMOTE_FAULT               (1 << 9)
  45 #define KSZPHY_INTCS_LINK_UP                    (1 << 8)
  46 #define KSZPHY_INTCS_ALL                        (KSZPHY_INTCS_LINK_UP |\
  47                                                 KSZPHY_INTCS_LINK_DOWN)
  48
  49 /* general PHY control reg in vendor specific block. */
  50 #define MII_KSZPHY_CTRL                 0x1F
  51 /* bitmap of PHY register to set interrupt mode */
  52 #define KSZPHY_CTRL_INT_ACTIVE_HIGH             (1 << 9)
  53 #define KSZ9021_CTRL_INT_ACTIVE_HIGH            (1 << 14)
  54 #define KS8737_CTRL_INT_ACTIVE_HIGH             (1 << 14)
  55 #define KSZ8051_RMII_50MHZ_CLK                  (1 << 7)
  56
  57 /* Write/read to/from extended registers */
  58 #define MII_KSZPHY_EXTREG                       0x0b
  59 #define KSZPHY_EXTREG_WRITE                     0x8000
  60
  61 #define MII_KSZPHY_EXTREG_WRITE                 0x0c
  62 #define MII_KSZPHY_EXTREG_READ                  0x0d
  63
  64 /* Extended registers */
  65 #define MII_KSZPHY_CLK_CONTROL_PAD_SKEW         0x104
  66 #define MII_KSZPHY_RX_DATA_PAD_SKEW             0x105
  67 #define MII_KSZPHY_TX_DATA_PAD_SKEW             0x106
  68
  69 #define PS_TO_REG                               200
  70
  71 static int ksz_config_flags(struct phy_device *phydev)
  72 {
  73         int regval;
  74
  75         if (phydev->dev_flags & MICREL_PHY_50MHZ_CLK) {
  76                 regval = phy_read(phydev, MII_KSZPHY_CTRL);
  77                 regval |= KSZ8051_RMII_50MHZ_CLK;
  78                 return phy_write(phydev, MII_KSZPHY_CTRL, regval);
  79         }
  80         return 0;
  81 }
  82
  83 static int kszphy_extended_write(struct phy_device *phydev,
  84                                 u32 regnum, u16 val)
  85 {
  86         phy_write(phydev, MII_KSZPHY_EXTREG, KSZPHY_EXTREG_WRITE | regnum);
  87         return phy_write(phydev, MII_KSZPHY_EXTREG_WRITE, val);
  88 }
  89
  90 static int kszphy_extended_read(struct phy_device *phydev,
  91                                 u32 regnum)
  92 {
  93         phy_write(phydev, MII_KSZPHY_EXTREG, regnum);
  94         return phy_read(phydev, MII_KSZPHY_EXTREG_READ);
  95 }
  96
  97 static int kszphy_ack_interrupt(struct phy_device *phydev)
  98 {
  99         /* bit[7..0] int status, which is a read and clear register. */
 100         int rc;
 101
 102         rc = phy_read(phydev, MII_KSZPHY_INTCS);
 103
 104         return (rc < 0) ? rc : 0;
 105 }
 106
 107 static int kszphy_set_interrupt(struct phy_device *phydev)
 108 {
 109         int temp;
 110         temp = (PHY_INTERRUPT_ENABLED == phydev->interrupts) ?
 111                 KSZPHY_INTCS_ALL : 0;
 112         return phy_write(phydev, MII_KSZPHY_INTCS, temp);
 113 }
 114
 115 static int kszphy_config_intr(struct phy_device *phydev)
 116 {
 117         int temp, rc;
 118
 119         /* set the interrupt pin active low */
 120         temp = phy_read(phydev, MII_KSZPHY_CTRL);
 121         temp &= ~KSZPHY_CTRL_INT_ACTIVE_HIGH;
 122         phy_write(phydev, MII_KSZPHY_CTRL, temp);
 123         rc = kszphy_set_interrupt(phydev);
 124         return rc < 0 ? rc : 0;
 125 }
 126
 127 static int ksz9021_config_intr(struct phy_device *phydev)
 128 {
 129         int temp, rc;
 130
 131         /* set the interrupt pin active low */
 132         temp = phy_read(phydev, MII_KSZPHY_CTRL);
 133         temp &= ~KSZ9021_CTRL_INT_ACTIVE_HIGH;
 134         phy_write(phydev, MII_KSZPHY_CTRL, temp);
 135         rc = kszphy_set_interrupt(phydev);
 136         return rc < 0 ? rc : 0;
 137 }
 138
 139 static int ks8737_config_intr(struct phy_device *phydev)
 140 {
 141         int temp, rc;
 142
 143         /* set the interrupt pin active low */
 144         temp = phy_read(phydev, MII_KSZPHY_CTRL);
 145         temp &= ~KS8737_CTRL_INT_ACTIVE_HIGH;
 146         phy_write(phydev, MII_KSZPHY_CTRL, temp);
 147         rc = kszphy_set_interrupt(phydev);
 148         return rc < 0 ? rc : 0;
 149 }
 150
 151 static int kszphy_setup_led(struct phy_device *phydev,
 152                             unsigned int reg, unsigned int shift)
 153 {
 154
 155         struct device *dev = &phydev->dev;
 156         struct device_node *of_node = dev->of_node;
 157         int rc, temp;
 158         u32 val;
 159
 160         if (!of_node && dev->parent->of_node)
 161                 of_node = dev->parent->of_node;
 162
 163         if (of_property_read_u32(of_node, "micrel,led-mode", &val))
 164                 return 0;
 165
 166         temp = phy_read(phydev, reg);
 167         if (temp < 0)
 168                 return temp;
 169
 170         temp &= ~(3 << shift);
 171         temp |= val << shift;
 172         rc = phy_write(phydev, reg, temp);
 173
 174         return rc < 0 ? rc : 0;
 175 }
 176
 177 static int kszphy_config_init(struct phy_device *phydev)
 178 {
 179         return 0;
 180 }
 181
 182 static int kszphy_config_init_led8041(struct phy_device *phydev)
 183 {
 184         /* single led control, register 0x1e bits 15..14 */
 185         return kszphy_setup_led(phydev, 0x1e, 14);
 186 }
 187
 188 static int ksz8021_config_init(struct phy_device *phydev)
 189 {
 190         const u16 val = KSZPHY_OMSO_B_CAST_OFF | KSZPHY_OMSO_RMII_OVERRIDE;
 191         int rc;
 192
 193         rc = kszphy_setup_led(phydev, 0x1f, 4);
 194         if (rc)
 195                 dev_err(&phydev->dev, "failed to set led mode\n");
 196
 197         phy_write(phydev, MII_KSZPHY_OMSO, val);
 198         rc = ksz_config_flags(phydev);
 199         return rc < 0 ? rc : 0;
 200 }
 201
 202 static int ks8051_config_init(struct phy_device *phydev)
 203 {
 204         int rc;
 205
 206         rc = kszphy_setup_led(phydev, 0x1f, 4);
 207         if (rc)
 208                 dev_err(&phydev->dev, "failed to set led mode\n");
 209
 210         rc = ksz_config_flags(phydev);
 211         return rc < 0 ? rc : 0;
 212 }
 213
 214 static int ksz9021_load_values_from_of(struct phy_device *phydev,
 215                                        struct device_node *of_node, u16 reg,
 216                                        char *field1, char *field2,
 217                                        char *field3, char *field4)
 218 {
 219         int val1 = -1;
 220         int val2 = -2;
 221         int val3 = -3;
 222         int val4 = -4;
 223         int newval;
 224         int matches = 0;
 225
 226         if (!of_property_read_u32(of_node, field1, &val1))
 227                 matches++;
 228
 229         if (!of_property_read_u32(of_node, field2, &val2))
 230                 matches++;
 231
 232         if (!of_property_read_u32(of_node, field3, &val3))
 233                 matches++;
 234
 235         if (!of_property_read_u32(of_node, field4, &val4))
 236                 matches++;
 237
 238         if (!matches)
 239                 return 0;
 240
 241         if (matches < 4)
 242                 newval = kszphy_extended_read(phydev, reg);
 243         else
 244                 newval = 0;
 245
 246         if (val1 != -1)
 247                 newval = ((newval & 0xfff0) | ((val1 / PS_TO_REG) & 0xf) << 0);
 248
 249         if (val2 != -1)
 250                 newval = ((newval & 0xff0f) | ((val2 / PS_TO_REG) & 0xf) << 4);
 251
 252         if (val3 != -1)
 253                 newval = ((newval & 0xf0ff) | ((val3 / PS_TO_REG) & 0xf) << 8);
 254
 255         if (val4 != -1)
 256                 newval = ((newval & 0x0fff) | ((val4 / PS_TO_REG) & 0xf) << 12);
 257
 258         return kszphy_extended_write(phydev, reg, newval);
 259 }
 260
 261 static int ksz9021_config_init(struct phy_device *phydev)
 262 {
 263         struct device *dev = &phydev->dev;
 264         struct device_node *of_node = dev->of_node;
 265
 266         if (!of_node && dev->parent->of_node)
 267                 of_node = dev->parent->of_node;
 268
 269         if (of_node) {
 270                 ksz9021_load_values_from_of(phydev, of_node,
 271                                     MII_KSZPHY_CLK_CONTROL_PAD_SKEW,
 272                                     "txen-skew-ps", "txc-skew-ps",
 273                                     "rxdv-skew-ps", "rxc-skew-ps");
 274                 ksz9021_load_values_from_of(phydev, of_node,
 275                                     MII_KSZPHY_RX_DATA_PAD_SKEW,
 276                                     "rxd0-skew-ps", "rxd1-skew-ps",
 277                                     "rxd2-skew-ps", "rxd3-skew-ps");
 278                 ksz9021_load_values_from_of(phydev, of_node,
 279                                     MII_KSZPHY_TX_DATA_PAD_SKEW,
 280                                     "txd0-skew-ps", "txd1-skew-ps",
 281                                     "txd2-skew-ps", "txd3-skew-ps");
 282         }
 283         return 0;
 284 }
 285
 286 #define KSZ8873MLL_GLOBAL_CONTROL_4     0x06
 287 #define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX      (1 << 6)
 288 #define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED       (1 << 4)
 289 static int ksz8873mll_read_status(struct phy_device *phydev)
 290 {
 291         int regval;
 292
 293         /* dummy read */
 294         regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4);
 295
 296         regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4);
 297
 298         if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX)
 299                 phydev->duplex = DUPLEX_HALF;
 300         else
 301                 phydev->duplex = DUPLEX_FULL;
 302
 303         if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_SPEED)
 304                 phydev->speed = SPEED_10;
 305         else
 306                 phydev->speed = SPEED_100;
 307
 308         phydev->link = 1;
 309         phydev->pause = phydev->asym_pause = 0;
 310
 311         return 0;
 312 }
 313
 314 static int ksz8873mll_config_aneg(struct phy_device *phydev)
 315 {
 316         return 0;
 317 }
 318
 319 static struct phy_driver ksphy_driver[] = {
 320 {
 321         .phy_id         = PHY_ID_KS8737,
 322         .phy_id_mask    = 0x00fffff0,
 323         .name           = "Micrel KS8737",
 324         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 325         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 326         .config_init    = kszphy_config_init,
 327         .config_aneg    = genphy_config_aneg,
 328         .read_status    = genphy_read_status,
 329         .ack_interrupt  = kszphy_ack_interrupt,
 330         .config_intr    = ks8737_config_intr,
 331         .suspend        = genphy_suspend,
 332         .resume         = genphy_resume,
 333         .driver         = { .owner = THIS_MODULE,},
 334 }, {
 335         .phy_id         = PHY_ID_KSZ8021,
 336         .phy_id_mask    = 0x00ffffff,
 337         .name           = "Micrel KSZ8021 or KSZ8031",
 338         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
 339                            SUPPORTED_Asym_Pause),
 340         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 341         .config_init    = ksz8021_config_init,
 342         .config_aneg    = genphy_config_aneg,
 343         .read_status    = genphy_read_status,
 344         .ack_interrupt  = kszphy_ack_interrupt,
 345         .config_intr    = kszphy_config_intr,
 346         .suspend        = genphy_suspend,
 347         .resume         = genphy_resume,
 348         .driver         = { .owner = THIS_MODULE,},
 349 }, {
 350         .phy_id         = PHY_ID_KSZ8031,
 351         .phy_id_mask    = 0x00ffffff,
 352         .name           = "Micrel KSZ8031",
 353         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause |
 354                            SUPPORTED_Asym_Pause),
 355         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 356         .config_init    = ksz8021_config_init,
 357         .config_aneg    = genphy_config_aneg,
 358         .read_status    = genphy_read_status,
 359         .ack_interrupt  = kszphy_ack_interrupt,
 360         .config_intr    = kszphy_config_intr,
 361         .suspend        = genphy_suspend,
 362         .resume         = genphy_resume,
 363         .driver         = { .owner = THIS_MODULE,},
 364 }, {
 365         .phy_id         = PHY_ID_KSZ8041,
 366         .phy_id_mask    = 0x00fffff0,
 367         .name           = "Micrel KSZ8041",
 368         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause
 369                                 | SUPPORTED_Asym_Pause),
 370         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 371         .config_init    = kszphy_config_init_led8041,
 372         .config_aneg    = genphy_config_aneg,
 373         .read_status    = genphy_read_status,
 374         .ack_interrupt  = kszphy_ack_interrupt,
 375         .config_intr    = kszphy_config_intr,
 376         .suspend        = genphy_suspend,
 377         .resume         = genphy_resume,
 378         .driver         = { .owner = THIS_MODULE,},
 379 }, {
 380         .phy_id         = PHY_ID_KSZ8041RNLI,
 381         .phy_id_mask    = 0x00fffff0,
 382         .name           = "Micrel KSZ8041RNLI",
 383         .features       = PHY_BASIC_FEATURES |
 384                           SUPPORTED_Pause | SUPPORTED_Asym_Pause,
 385         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 386         .config_init    = kszphy_config_init_led8041,
 387         .config_aneg    = genphy_config_aneg,
 388         .read_status    = genphy_read_status,
 389         .ack_interrupt  = kszphy_ack_interrupt,
 390         .config_intr    = kszphy_config_intr,
 391         .suspend        = genphy_suspend,
 392         .resume         = genphy_resume,
 393         .driver         = { .owner = THIS_MODULE,},
 394 }, {
 395         .phy_id         = PHY_ID_KSZ8051,
 396         .phy_id_mask    = 0x00fffff0,
 397         .name           = "Micrel KSZ8051",
 398         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause
 399                                 | SUPPORTED_Asym_Pause),
 400         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 401         .config_init    = ks8051_config_init,
 402         .config_aneg    = genphy_config_aneg,
 403         .read_status    = genphy_read_status,
 404         .ack_interrupt  = kszphy_ack_interrupt,
 405         .config_intr    = kszphy_config_intr,
 406         .suspend        = genphy_suspend,
 407         .resume         = genphy_resume,
 408         .driver         = { .owner = THIS_MODULE,},
 409 }, {
 410         .phy_id         = PHY_ID_KSZ8001,
 411         .name           = "Micrel KSZ8001 or KS8721",
 412         .phy_id_mask    = 0x00ffffff,
 413         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 414         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 415         .config_init    = kszphy_config_init_led8041,
 416         .config_aneg    = genphy_config_aneg,
 417         .read_status    = genphy_read_status,
 418         .ack_interrupt  = kszphy_ack_interrupt,
 419         .config_intr    = kszphy_config_intr,
 420         .suspend        = genphy_suspend,
 421         .resume         = genphy_resume,
 422         .driver         = { .owner = THIS_MODULE,},
 423 }, {
 424         .phy_id         = PHY_ID_KSZ8081,
 425         .name           = "Micrel KSZ8081 or KSZ8091",
 426         .phy_id_mask    = 0x00fffff0,
 427         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 428         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 429         .config_init    = kszphy_config_init,
 430         .config_aneg    = genphy_config_aneg,
 431         .read_status    = genphy_read_status,
 432         .ack_interrupt  = kszphy_ack_interrupt,
 433         .config_intr    = kszphy_config_intr,
 434         .suspend        = genphy_suspend,
 435         .resume         = genphy_resume,
 436         .driver         = { .owner = THIS_MODULE,},
 437 }, {
 438         .phy_id         = PHY_ID_KSZ8061,
 439         .name           = "Micrel KSZ8061",
 440         .phy_id_mask    = 0x00fffff0,
 441         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 442         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 443         .config_init    = kszphy_config_init,
 444         .config_aneg    = genphy_config_aneg,
 445         .read_status    = genphy_read_status,
 446         .ack_interrupt  = kszphy_ack_interrupt,
 447         .config_intr    = kszphy_config_intr,
 448         .suspend        = genphy_suspend,
 449         .resume         = genphy_resume,
 450         .driver         = { .owner = THIS_MODULE,},
 451 }, {
 452         .phy_id         = PHY_ID_KSZ9021,
 453         .phy_id_mask    = 0x000ffffe,
 454         .name           = "Micrel KSZ9021 Gigabit PHY",
 455         .features       = (PHY_GBIT_FEATURES | SUPPORTED_Pause),
 456         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 457         .config_init    = ksz9021_config_init,
 458         .config_aneg    = genphy_config_aneg,
 459         .read_status    = genphy_read_status,
 460         .ack_interrupt  = kszphy_ack_interrupt,
 461         .config_intr    = ksz9021_config_intr,
 462         .suspend        = genphy_suspend,
 463         .resume         = genphy_resume,
 464         .driver         = { .owner = THIS_MODULE, },
 465 }, {
 466         .phy_id         = PHY_ID_KSZ9031,
 467         .phy_id_mask    = 0x00fffff0,
 468         .name           = "Micrel KSZ9031 Gigabit PHY",
 469         .features       = (PHY_GBIT_FEATURES | SUPPORTED_Pause
 470                                 | SUPPORTED_Asym_Pause),
 471         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 472         .config_init    = kszphy_config_init,
 473         .config_aneg    = genphy_config_aneg,
 474         .read_status    = genphy_read_status,
 475         .ack_interrupt  = kszphy_ack_interrupt,
 476         .config_intr    = ksz9021_config_intr,
 477         .suspend        = genphy_suspend,
 478         .resume         = genphy_resume,
 479         .driver         = { .owner = THIS_MODULE, },
 480 }, {
 481         .phy_id         = PHY_ID_KSZ8873MLL,
 482         .phy_id_mask    = 0x00fffff0,
 483         .name           = "Micrel KSZ8873MLL Switch",
 484         .features       = (SUPPORTED_Pause | SUPPORTED_Asym_Pause),
 485         .flags          = PHY_HAS_MAGICANEG,
 486         .config_init    = kszphy_config_init,
 487         .config_aneg    = ksz8873mll_config_aneg,
 488         .read_status    = ksz8873mll_read_status,
 489         .suspend        = genphy_suspend,
 490         .resume         = genphy_resume,
 491         .driver         = { .owner = THIS_MODULE, },
 492 }, {
 493         .phy_id         = PHY_ID_KSZ886X,
 494         .phy_id_mask    = 0x00fffff0,
 495         .name           = "Micrel KSZ886X Switch",
 496         .features       = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
 497         .flags          = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT,
 498         .config_init    = kszphy_config_init,
 499         .config_aneg    = genphy_config_aneg,
 500         .read_status    = genphy_read_status,
 501         .suspend        = genphy_suspend,
 502         .resume         = genphy_resume,
 503         .driver         = { .owner = THIS_MODULE, },
 504 } };
 505
 506 static int __init ksphy_init(void)
 507 {
 508         return phy_drivers_register(ksphy_driver,
 509                 ARRAY_SIZE(ksphy_driver));
 510 }
 511
 512 static void __exit ksphy_exit(void)
 513 {
 514         phy_drivers_unregister(ksphy_driver,
 515                 ARRAY_SIZE(ksphy_driver));
 516 }
 517
 518 module_init(ksphy_init);
 519 module_exit(ksphy_exit);
 520
 521 MODULE_DESCRIPTION("Micrel PHY driver");
 522 MODULE_AUTHOR("David J. Choi");
 523 MODULE_LICENSE("GPL");
 524
 525 static struct mdio_device_id __maybe_unused micrel_tbl[] = {
 526         { PHY_ID_KSZ9021, 0x000ffffe },
 527         { PHY_ID_KSZ9031, 0x00fffff0 },
 528         { PHY_ID_KSZ8001, 0x00ffffff },
 529         { PHY_ID_KS8737, 0x00fffff0 },
 530         { PHY_ID_KSZ8021, 0x00ffffff },
 531         { PHY_ID_KSZ8031, 0x00ffffff },
 532         { PHY_ID_KSZ8041, 0x00fffff0 },
 533         { PHY_ID_KSZ8051, 0x00fffff0 },
 534         { PHY_ID_KSZ8061, 0x00fffff0 },
 535         { PHY_ID_KSZ8081, 0x00fffff0 },
 536         { PHY_ID_KSZ8873MLL, 0x00fffff0 },
 537         { PHY_ID_KSZ886X, 0x00fffff0 },
 538         { }
 539 };
 540
 541 MODULE_DEVICE_TABLE(mdio, micrel_tbl);