drm/vc4: kms: Split the HVS muxing check in a separate function 38/245638/1
authorMaxime Ripard <maxime@cerno.tech>
Mon, 12 Oct 2020 07:55:43 +0000 (16:55 +0900)
committerHoegeun Kwon <hoegeun.kwon@samsung.com>
Tue, 13 Oct 2020 08:58:52 +0000 (17:58 +0900)
The code that assigns HVS channels during atomic_check is starting to grow
a bit big, let's move it into a separate function.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
[hoegeun.kwon: Needed to fix page flip issue of dual hdmi.]
Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com>
Change-Id: Icf636a846282981d21ad3e6652a3ec51f14993a4

drivers/gpu/drm/vc4/vc4_kms.c

index 77745ad..9a56596 100644 (file)
@@ -580,14 +580,14 @@ static const struct drm_private_state_funcs vc4_load_tracker_state_funcs = {
 #define NUM_OUTPUTS  6
 #define NUM_CHANNELS 3
 
-static int
-vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
+static int vc4_pv_muxing_atomic_check(struct drm_device *dev,
+                                     struct drm_atomic_state *state)
 {
        unsigned long unassigned_channels = GENMASK(NUM_CHANNELS - 1, 0);
        struct vc4_dev *vc4 = to_vc4_dev(state->dev);
        struct drm_crtc_state *old_crtc_state, *new_crtc_state;
        struct drm_crtc *crtc;
-       int i, ret;
+       unsigned int i;
 
        /*
         * Since the HVS FIFOs are shared across all the pixelvalves and
@@ -665,6 +665,18 @@ vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
                        return -EINVAL;
        }
 
+       return 0;
+}
+
+static int
+vc4_atomic_check(struct drm_device *dev, struct drm_atomic_state *state)
+{
+       int ret;
+
+       ret = vc4_pv_muxing_atomic_check(dev, state);
+       if (ret)
+               return ret;
+
        ret = vc4_ctm_atomic_check(dev, state);
        if (ret < 0)
                return ret;