1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file.
5 // CPU specific code for arm independent of OS goes here.
7 #include <sys/syscall.h>
11 #include <asm/cachectl.h>
12 #endif // #ifdef __mips
16 #if V8_TARGET_ARCH_MIPS
18 #include "src/assembler.h"
19 #include "src/macro-assembler.h"
21 #include "src/simulator.h" // For cache flushing.
27 void CpuFeatures::FlushICache(void* start, size_t size) {
28 // Nothing to do, flushing no instructions.
33 #if !defined (USE_SIMULATOR)
35 // Bionic cacheflush can typically run in userland, avoiding kernel call.
36 char *end = reinterpret_cast<char *>(start) + size;
38 reinterpret_cast<intptr_t>(start), reinterpret_cast<intptr_t>(end), 0);
41 // See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
42 res = syscall(__NR_cacheflush, start, size, ICACHE);
44 V8_Fatal(__FILE__, __LINE__, "Failed to flush the instruction cache");
47 #else // USE_SIMULATOR.
48 // Not generating mips instructions for C-code. This means that we are
49 // building a mips emulator based target. We should notify the simulator
50 // that the Icache was flushed.
51 // None of this code ends up in the snapshot so there are no issues
52 // around whether or not to generate the code when building snapshots.
53 Simulator::FlushICache(Isolate::Current()->simulator_i_cache(), start, size);
54 #endif // USE_SIMULATOR.
57 } } // namespace v8::internal
59 #endif // V8_TARGET_ARCH_MIPS