2 // Copyright (c) 1994-2006 Sun Microsystems Inc.
3 // All Rights Reserved.
5 // Redistribution and use in source and binary forms, with or without
6 // modification, are permitted provided that the following conditions are
9 // - Redistributions of source code must retain the above copyright notice,
10 // this list of conditions and the following disclaimer.
12 // - Redistribution in binary form must reproduce the above copyright
13 // notice, this list of conditions and the following disclaimer in the
14 // documentation and/or other materials provided with the distribution.
16 // - Neither the name of Sun Microsystems or the names of contributors may
17 // be used to endorse or promote products derived from this software without
18 // specific prior written permission.
20 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
21 // IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 // THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 // PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 // CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 // EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 // PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
27 // PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
28 // LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
29 // NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
30 // SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 // The original source code covered by the above license above has been
33 // modified significantly by Google Inc.
34 // Copyright 2012 the V8 project authors. All rights reserved.
37 #ifndef V8_MIPS_ASSEMBLER_MIPS_INL_H_
38 #define V8_MIPS_ASSEMBLER_MIPS_INL_H_
40 #include "src/mips/assembler-mips.h"
42 #include "src/assembler.h"
43 #include "src/debug.h"
50 bool CpuFeatures::SupportsCrankshaft() { return IsSupported(FPU); }
51 bool CpuFeatures::SupportsSIMD128InCrankshaft() { return false; }
54 // -----------------------------------------------------------------------------
55 // Operand and MemOperand.
57 Operand::Operand(int32_t immediate, RelocInfo::Mode rmode) {
64 Operand::Operand(const ExternalReference& f) {
66 imm32_ = reinterpret_cast<int32_t>(f.address());
67 rmode_ = RelocInfo::EXTERNAL_REFERENCE;
71 Operand::Operand(Smi* value) {
73 imm32_ = reinterpret_cast<intptr_t>(value);
74 rmode_ = RelocInfo::NONE32;
78 Operand::Operand(Register rm) {
83 bool Operand::is_reg() const {
84 return rm_.is_valid();
88 int Register::NumAllocatableRegisters() {
89 return kMaxNumAllocatableRegisters;
93 int DoubleRegister::NumRegisters() {
94 return FPURegister::kMaxNumRegisters;
98 int DoubleRegister::NumAllocatableRegisters() {
99 return FPURegister::kMaxNumAllocatableRegisters;
103 int DoubleRegister::NumAllocatableAliasedRegisters() {
104 return NumAllocatableRegisters();
108 int FPURegister::ToAllocationIndex(FPURegister reg) {
109 DCHECK(reg.code() % 2 == 0);
110 DCHECK(reg.code() / 2 < kMaxNumAllocatableRegisters);
111 DCHECK(reg.is_valid());
112 DCHECK(!reg.is(kDoubleRegZero));
113 DCHECK(!reg.is(kLithiumScratchDouble));
114 return (reg.code() / 2);
118 // -----------------------------------------------------------------------------
121 void RelocInfo::apply(intptr_t delta, ICacheFlushMode icache_flush_mode) {
122 if (IsCodeTarget(rmode_)) {
123 uint32_t scope1 = (uint32_t) target_address() & ~kImm28Mask;
124 uint32_t scope2 = reinterpret_cast<uint32_t>(pc_) & ~kImm28Mask;
126 if (scope1 != scope2) {
127 Assembler::JumpLabelToJumpRegister(pc_);
130 if (IsInternalReference(rmode_)) {
131 // Absolute code pointer inside code object moves with the code object.
132 byte* p = reinterpret_cast<byte*>(pc_);
133 int count = Assembler::RelocateInternalReference(p, delta);
134 CpuFeatures::FlushICache(p, count * sizeof(uint32_t));
139 Address RelocInfo::target_address() {
140 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
141 return Assembler::target_address_at(pc_, host_);
145 Address RelocInfo::target_address_address() {
146 DCHECK(IsCodeTarget(rmode_) ||
147 IsRuntimeEntry(rmode_) ||
148 rmode_ == EMBEDDED_OBJECT ||
149 rmode_ == EXTERNAL_REFERENCE);
150 // Read the address of the word containing the target_address in an
151 // instruction stream.
152 // The only architecture-independent user of this function is the serializer.
153 // The serializer uses it to find out how many raw bytes of instruction to
154 // output before the next target.
155 // For an instruction like LUI/ORI where the target bits are mixed into the
156 // instruction bits, the size of the target will be zero, indicating that the
157 // serializer should not step forward in memory after a target is resolved
158 // and written. In this case the target_address_address function should
159 // return the end of the instructions to be patched, allowing the
160 // deserializer to deserialize the instructions as raw bytes and put them in
161 // place, ready to be patched with the target. After jump optimization,
162 // that is the address of the instruction that follows J/JAL/JR/JALR
164 return reinterpret_cast<Address>(
165 pc_ + Assembler::kInstructionsFor32BitConstant * Assembler::kInstrSize);
169 Address RelocInfo::constant_pool_entry_address() {
175 int RelocInfo::target_address_size() {
176 return Assembler::kSpecialTargetSize;
180 void RelocInfo::set_target_address(Address target,
181 WriteBarrierMode write_barrier_mode,
182 ICacheFlushMode icache_flush_mode) {
183 DCHECK(IsCodeTarget(rmode_) || IsRuntimeEntry(rmode_));
184 Assembler::set_target_address_at(pc_, host_, target, icache_flush_mode);
185 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
186 host() != NULL && IsCodeTarget(rmode_)) {
187 Object* target_code = Code::GetCodeFromTargetAddress(target);
188 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
189 host(), this, HeapObject::cast(target_code));
194 Address Assembler::target_address_from_return_address(Address pc) {
195 return pc - kCallTargetAddressOffset;
199 Address Assembler::break_address_from_return_address(Address pc) {
200 return pc - Assembler::kPatchDebugBreakSlotReturnOffset;
204 Object* RelocInfo::target_object() {
205 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
206 return reinterpret_cast<Object*>(Assembler::target_address_at(pc_, host_));
210 Handle<Object> RelocInfo::target_object_handle(Assembler* origin) {
211 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
212 return Handle<Object>(reinterpret_cast<Object**>(
213 Assembler::target_address_at(pc_, host_)));
217 void RelocInfo::set_target_object(Object* target,
218 WriteBarrierMode write_barrier_mode,
219 ICacheFlushMode icache_flush_mode) {
220 DCHECK(IsCodeTarget(rmode_) || rmode_ == EMBEDDED_OBJECT);
221 Assembler::set_target_address_at(pc_, host_,
222 reinterpret_cast<Address>(target),
224 if (write_barrier_mode == UPDATE_WRITE_BARRIER &&
226 target->IsHeapObject()) {
227 host()->GetHeap()->incremental_marking()->RecordWrite(
228 host(), &Memory::Object_at(pc_), HeapObject::cast(target));
233 Address RelocInfo::target_reference() {
234 DCHECK(rmode_ == EXTERNAL_REFERENCE);
235 return Assembler::target_address_at(pc_, host_);
239 Address RelocInfo::target_runtime_entry(Assembler* origin) {
240 DCHECK(IsRuntimeEntry(rmode_));
241 return target_address();
245 void RelocInfo::set_target_runtime_entry(Address target,
246 WriteBarrierMode write_barrier_mode,
247 ICacheFlushMode icache_flush_mode) {
248 DCHECK(IsRuntimeEntry(rmode_));
249 if (target_address() != target)
250 set_target_address(target, write_barrier_mode, icache_flush_mode);
254 Handle<Cell> RelocInfo::target_cell_handle() {
255 DCHECK(rmode_ == RelocInfo::CELL);
256 Address address = Memory::Address_at(pc_);
257 return Handle<Cell>(reinterpret_cast<Cell**>(address));
261 Cell* RelocInfo::target_cell() {
262 DCHECK(rmode_ == RelocInfo::CELL);
263 return Cell::FromValueAddress(Memory::Address_at(pc_));
267 void RelocInfo::set_target_cell(Cell* cell,
268 WriteBarrierMode write_barrier_mode,
269 ICacheFlushMode icache_flush_mode) {
270 DCHECK(rmode_ == RelocInfo::CELL);
271 Address address = cell->address() + Cell::kValueOffset;
272 Memory::Address_at(pc_) = address;
273 if (write_barrier_mode == UPDATE_WRITE_BARRIER && host() != NULL) {
274 // TODO(1550) We are passing NULL as a slot because cell can never be on
275 // evacuation candidate.
276 host()->GetHeap()->incremental_marking()->RecordWrite(
282 static const int kNoCodeAgeSequenceLength = 7 * Assembler::kInstrSize;
285 Handle<Object> RelocInfo::code_age_stub_handle(Assembler* origin) {
286 UNREACHABLE(); // This should never be reached on Arm.
287 return Handle<Object>();
291 Code* RelocInfo::code_age_stub() {
292 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
293 return Code::GetCodeFromTargetAddress(
294 Assembler::target_address_at(pc_ + Assembler::kInstrSize, host_));
298 void RelocInfo::set_code_age_stub(Code* stub,
299 ICacheFlushMode icache_flush_mode) {
300 DCHECK(rmode_ == RelocInfo::CODE_AGE_SEQUENCE);
301 Assembler::set_target_address_at(pc_ + Assembler::kInstrSize,
303 stub->instruction_start());
307 Address RelocInfo::call_address() {
308 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
309 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
310 // The pc_ offset of 0 assumes mips patched return sequence per
311 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
312 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
313 return Assembler::target_address_at(pc_, host_);
317 void RelocInfo::set_call_address(Address target) {
318 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
319 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
320 // The pc_ offset of 0 assumes mips patched return sequence per
321 // debug-mips.cc BreakLocationIterator::SetDebugBreakAtReturn(), or
322 // debug break slot per BreakLocationIterator::SetDebugBreakAtSlot().
323 Assembler::set_target_address_at(pc_, host_, target);
324 if (host() != NULL) {
325 Object* target_code = Code::GetCodeFromTargetAddress(target);
326 host()->GetHeap()->incremental_marking()->RecordWriteIntoCode(
327 host(), this, HeapObject::cast(target_code));
332 Object* RelocInfo::call_object() {
333 return *call_object_address();
337 Object** RelocInfo::call_object_address() {
338 DCHECK((IsJSReturn(rmode()) && IsPatchedReturnSequence()) ||
339 (IsDebugBreakSlot(rmode()) && IsPatchedDebugBreakSlotSequence()));
340 return reinterpret_cast<Object**>(pc_ + 2 * Assembler::kInstrSize);
344 void RelocInfo::set_call_object(Object* target) {
345 *call_object_address() = target;
349 void RelocInfo::WipeOut() {
350 DCHECK(IsEmbeddedObject(rmode_) ||
351 IsCodeTarget(rmode_) ||
352 IsRuntimeEntry(rmode_) ||
353 IsExternalReference(rmode_));
354 Assembler::set_target_address_at(pc_, host_, NULL);
358 bool RelocInfo::IsPatchedReturnSequence() {
359 Instr instr0 = Assembler::instr_at(pc_);
360 Instr instr1 = Assembler::instr_at(pc_ + 1 * Assembler::kInstrSize);
361 Instr instr2 = Assembler::instr_at(pc_ + 2 * Assembler::kInstrSize);
362 bool patched_return = ((instr0 & kOpcodeMask) == LUI &&
363 (instr1 & kOpcodeMask) == ORI &&
364 ((instr2 & kOpcodeMask) == JAL ||
365 ((instr2 & kOpcodeMask) == SPECIAL &&
366 (instr2 & kFunctionFieldMask) == JALR)));
367 return patched_return;
371 bool RelocInfo::IsPatchedDebugBreakSlotSequence() {
372 Instr current_instr = Assembler::instr_at(pc_);
373 return !Assembler::IsNop(current_instr, Assembler::DEBUG_BREAK_NOP);
377 void RelocInfo::Visit(Isolate* isolate, ObjectVisitor* visitor) {
378 RelocInfo::Mode mode = rmode();
379 if (mode == RelocInfo::EMBEDDED_OBJECT) {
380 visitor->VisitEmbeddedPointer(this);
381 } else if (RelocInfo::IsCodeTarget(mode)) {
382 visitor->VisitCodeTarget(this);
383 } else if (mode == RelocInfo::CELL) {
384 visitor->VisitCell(this);
385 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
386 visitor->VisitExternalReference(this);
387 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
388 visitor->VisitCodeAgeSequence(this);
389 } else if (((RelocInfo::IsJSReturn(mode) &&
390 IsPatchedReturnSequence()) ||
391 (RelocInfo::IsDebugBreakSlot(mode) &&
392 IsPatchedDebugBreakSlotSequence())) &&
393 isolate->debug()->has_break_points()) {
394 visitor->VisitDebugTarget(this);
395 } else if (RelocInfo::IsRuntimeEntry(mode)) {
396 visitor->VisitRuntimeEntry(this);
401 template<typename StaticVisitor>
402 void RelocInfo::Visit(Heap* heap) {
403 RelocInfo::Mode mode = rmode();
404 if (mode == RelocInfo::EMBEDDED_OBJECT) {
405 StaticVisitor::VisitEmbeddedPointer(heap, this);
406 } else if (RelocInfo::IsCodeTarget(mode)) {
407 StaticVisitor::VisitCodeTarget(heap, this);
408 } else if (mode == RelocInfo::CELL) {
409 StaticVisitor::VisitCell(heap, this);
410 } else if (mode == RelocInfo::EXTERNAL_REFERENCE) {
411 StaticVisitor::VisitExternalReference(this);
412 } else if (RelocInfo::IsCodeAgeSequence(mode)) {
413 StaticVisitor::VisitCodeAgeSequence(heap, this);
414 } else if (heap->isolate()->debug()->has_break_points() &&
415 ((RelocInfo::IsJSReturn(mode) &&
416 IsPatchedReturnSequence()) ||
417 (RelocInfo::IsDebugBreakSlot(mode) &&
418 IsPatchedDebugBreakSlotSequence()))) {
419 StaticVisitor::VisitDebugTarget(heap, this);
420 } else if (RelocInfo::IsRuntimeEntry(mode)) {
421 StaticVisitor::VisitRuntimeEntry(this);
426 // -----------------------------------------------------------------------------
430 void Assembler::CheckBuffer() {
431 if (buffer_space() <= kGap) {
437 void Assembler::CheckTrampolinePoolQuick() {
438 if (pc_offset() >= next_buffer_check_) {
439 CheckTrampolinePool();
444 void Assembler::emit(Instr x) {
445 if (!is_buffer_growth_blocked()) {
448 *reinterpret_cast<Instr*>(pc_) = x;
450 CheckTrampolinePoolQuick();
454 } } // namespace v8::internal
456 #endif // V8_MIPS_ASSEMBLER_MIPS_INL_H_