Fix build error in 64-bit 70/277370/2 accepted/tizen_7.0_unified accepted/tizen_7.0_unified_hotfix tizen_7.0 tizen_7.0_hotfix accepted/tizen/7.0/unified/20221110.063224 accepted/tizen/7.0/unified/hotfix/20221116.105922 accepted/tizen/unified/20220708.132847 submit/tizen/20220706.014810 submit/tizen/20220707.045729 tizen_7.0_m2_release
authorXuelian Bai <xuelian.bai@samsung.com>
Wed, 6 Jul 2022 00:49:05 +0000 (08:49 +0800)
committerXuelian Bai <xuelian.bai@samsung.com>
Wed, 6 Jul 2022 00:54:49 +0000 (08:54 +0800)
Use PRId64 for both 32-bit long long int and 64-bit long int.

Change-Id: Ie0049ae29769cea90198c76d108980eacd0409af

src/modules/coregl_tracepath_egl.c

index 24f5131..51a831b 100644 (file)
@@ -6,6 +6,7 @@
 
 #include <sys/types.h>
 #include <unistd.h>
+#include <inttypes.h>
 
 Mutex ctx_access_mutex = MUTEX_INITIALIZER;
 Ctx_Data *ctx_data = NULL;
@@ -1609,7 +1610,7 @@ tracepath_eglClientWaitSync(EGLDisplay dpy, EGLSync sync, EGLint flags, EGLTime
 {
        EGLint ret = EGL_FALSE;
 
-       _COREGL_TRACEPATH_FUNC_BEGIN("(%p, %p, %d, %lld)", dpy, sync, flags, timeout);
+       _COREGL_TRACEPATH_FUNC_BEGIN("(%p, %p, %d, %" PRId64 ")", dpy, sync, flags, timeout);
        ret = _orig_tracepath_eglClientWaitSync(dpy, sync, flags, timeout);
        goto finish;