mmc: sh_mmcif: Configure DMA slave bus width
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Tue, 15 Jul 2014 22:45:13 +0000 (00:45 +0200)
committerSimon Horman <horms@verge.net.au>
Fri, 5 Dec 2014 00:24:24 +0000 (09:24 +0900)
The data register is 4 bytes wide, hardcode the DMA transfer size to
4 bytes in both directions.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit e36152aa84cf68bd7f09acffd480cd2b6aa5480d)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
drivers/mmc/host/sh_mmcif.c

index 863d21e..d11708c 100644 (file)
@@ -418,10 +418,13 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
        cfg.slave_id = slave_id;
        cfg.direction = direction;
 
-       if (direction == DMA_DEV_TO_MEM)
+       if (direction == DMA_DEV_TO_MEM) {
                cfg.src_addr = res->start + MMCIF_CE_DATA;
-       else
+               cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+       } else {
                cfg.dst_addr = res->start + MMCIF_CE_DATA;
+               cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
+       }
 
        ret = dmaengine_slave_config(chan, &cfg);
        if (ret < 0) {