clk: tegra: Initialize DSI low-power clocks
authorThierry Reding <thierry.reding@gmail.com>
Mon, 18 Nov 2013 15:11:36 +0000 (16:11 +0100)
committerPeter De Schrijver <pdeschrijver@nvidia.com>
Tue, 26 Nov 2013 16:46:58 +0000 (18:46 +0200)
commit39409aa4244f22eae3fa8f8db4b0cf9466b73c44
tree6c488cf25b168ad13342a24ea69fac2ddcc92679
parent5ab5d4048e6ed8811245a4ea45264456c180545e
clk: tegra: Initialize DSI low-power clocks

The low-power DSI clocks are used during host-driven transactions on the
DSI bus. Documentation recommends that they be children of PLLP and run
at a frequency of at least 52 MHz.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-tegra114.c