2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 #define PORT_WAKE_BITS (PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E)
40 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
41 static int link_quirk;
42 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
43 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
45 static unsigned int quirks;
46 module_param(quirks, uint, S_IRUGO);
47 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
49 /* TODO: copied from ehci-hcd.c - can this be refactored? */
51 * xhci_handshake - spin reading hc until handshake completes or fails
52 * @ptr: address of hc register to be read
53 * @mask: bits to look at in result of read
54 * @done: value of those bits when handshake succeeds
55 * @usec: timeout in microseconds
57 * Returns negative errno, or zero on success
59 * Success happens when the "mask" bits have the specified value (hardware
60 * handshake done). There are two failure modes: "usec" have passed (major
61 * hardware flakeout), or the register reads as all-ones (hardware removed).
63 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
64 u32 mask, u32 done, int usec)
70 if (result == ~(u32)0) /* card removed */
82 * Disable interrupts and begin the xHCI halting process.
84 void xhci_quiesce(struct xhci_hcd *xhci)
91 halted = readl(&xhci->op_regs->status) & STS_HALT;
95 cmd = readl(&xhci->op_regs->command);
97 writel(cmd, &xhci->op_regs->command);
101 * Force HC into halt state.
103 * Disable any IRQs and clear the run/stop bit.
104 * HC will complete any current and actively pipelined transactions, and
105 * should halt within 16 ms of the run/stop bit being cleared.
106 * Read HC Halted bit in the status register to see when the HC is finished.
108 int xhci_halt(struct xhci_hcd *xhci)
111 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
114 ret = xhci_handshake(xhci, &xhci->op_regs->status,
115 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
117 xhci->xhc_state |= XHCI_STATE_HALTED;
118 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
120 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
126 * Set the run bit and wait for the host to be running.
128 static int xhci_start(struct xhci_hcd *xhci)
133 temp = readl(&xhci->op_regs->command);
135 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
137 writel(temp, &xhci->op_regs->command);
140 * Wait for the HCHalted Status bit to be 0 to indicate the host is
143 ret = xhci_handshake(xhci, &xhci->op_regs->status,
144 STS_HALT, 0, XHCI_MAX_HALT_USEC);
145 if (ret == -ETIMEDOUT)
146 xhci_err(xhci, "Host took too long to start, "
147 "waited %u microseconds.\n",
150 xhci->xhc_state &= ~XHCI_STATE_HALTED;
157 * This resets pipelines, timers, counters, state machines, etc.
158 * Transactions will be terminated immediately, and operational registers
159 * will be set to their defaults.
161 int xhci_reset(struct xhci_hcd *xhci)
167 state = readl(&xhci->op_regs->status);
168 if ((state & STS_HALT) == 0) {
169 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
173 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
174 command = readl(&xhci->op_regs->command);
175 command |= CMD_RESET;
176 writel(command, &xhci->op_regs->command);
178 ret = xhci_handshake(xhci, &xhci->op_regs->command,
179 CMD_RESET, 0, 10 * 1000 * 1000);
183 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
184 "Wait for controller to be ready for doorbell rings");
186 * xHCI cannot write to any doorbells or operational registers other
187 * than status until the "Controller Not Ready" flag is cleared.
189 ret = xhci_handshake(xhci, &xhci->op_regs->status,
190 STS_CNR, 0, 10 * 1000 * 1000);
192 for (i = 0; i < 2; ++i) {
193 xhci->bus_state[i].port_c_suspend = 0;
194 xhci->bus_state[i].suspended_ports = 0;
195 xhci->bus_state[i].resuming_ports = 0;
202 static int xhci_free_msi(struct xhci_hcd *xhci)
206 if (!xhci->msix_entries)
209 for (i = 0; i < xhci->msix_count; i++)
210 if (xhci->msix_entries[i].vector)
211 free_irq(xhci->msix_entries[i].vector,
219 static int xhci_setup_msi(struct xhci_hcd *xhci)
222 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
224 ret = pci_enable_msi(pdev);
226 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
227 "failed to allocate MSI entry");
231 ret = request_irq(pdev->irq, xhci_msi_irq,
232 0, "xhci_hcd", xhci_to_hcd(xhci));
234 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
235 "disable MSI interrupt");
236 pci_disable_msi(pdev);
244 * free all IRQs request
246 static void xhci_free_irq(struct xhci_hcd *xhci)
248 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
251 /* return if using legacy interrupt */
252 if (xhci_to_hcd(xhci)->irq > 0)
255 ret = xhci_free_msi(xhci);
259 free_irq(pdev->irq, xhci_to_hcd(xhci));
267 static int xhci_setup_msix(struct xhci_hcd *xhci)
270 struct usb_hcd *hcd = xhci_to_hcd(xhci);
271 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
274 * calculate number of msi-x vectors supported.
275 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
276 * with max number of interrupters based on the xhci HCSPARAMS1.
277 * - num_online_cpus: maximum msi-x vectors per CPUs core.
278 * Add additional 1 vector to ensure always available interrupt.
280 xhci->msix_count = min(num_online_cpus() + 1,
281 HCS_MAX_INTRS(xhci->hcs_params1));
284 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
286 if (!xhci->msix_entries) {
287 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
291 for (i = 0; i < xhci->msix_count; i++) {
292 xhci->msix_entries[i].entry = i;
293 xhci->msix_entries[i].vector = 0;
296 ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
298 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
299 "Failed to enable MSI-X");
303 for (i = 0; i < xhci->msix_count; i++) {
304 ret = request_irq(xhci->msix_entries[i].vector,
306 0, "xhci_hcd", xhci_to_hcd(xhci));
311 hcd->msix_enabled = 1;
315 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
317 pci_disable_msix(pdev);
319 kfree(xhci->msix_entries);
320 xhci->msix_entries = NULL;
324 /* Free any IRQs and disable MSI-X */
325 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
327 struct usb_hcd *hcd = xhci_to_hcd(xhci);
328 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
330 if (xhci->quirks & XHCI_PLAT)
335 if (xhci->msix_entries) {
336 pci_disable_msix(pdev);
337 kfree(xhci->msix_entries);
338 xhci->msix_entries = NULL;
340 pci_disable_msi(pdev);
343 hcd->msix_enabled = 0;
347 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
351 if (xhci->msix_entries) {
352 for (i = 0; i < xhci->msix_count; i++)
353 synchronize_irq(xhci->msix_entries[i].vector);
357 static int xhci_try_enable_msi(struct usb_hcd *hcd)
359 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
360 struct pci_dev *pdev;
363 /* The xhci platform device has set up IRQs through usb_add_hcd. */
364 if (xhci->quirks & XHCI_PLAT)
367 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
369 * Some Fresco Logic host controllers advertise MSI, but fail to
370 * generate interrupts. Don't even try to enable MSI.
372 if (xhci->quirks & XHCI_BROKEN_MSI)
375 /* unregister the legacy interrupt */
377 free_irq(hcd->irq, hcd);
380 ret = xhci_setup_msix(xhci);
382 /* fall back to msi*/
383 ret = xhci_setup_msi(xhci);
386 /* hcd->irq is 0, we have MSI */
390 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
395 /* fall back to legacy interrupt*/
396 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
397 hcd->irq_descr, hcd);
399 xhci_err(xhci, "request interrupt %d failed\n",
403 hcd->irq = pdev->irq;
409 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
414 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
418 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
424 static void compliance_mode_recovery(unsigned long arg)
426 struct xhci_hcd *xhci;
431 xhci = (struct xhci_hcd *)arg;
433 for (i = 0; i < xhci->num_usb3_ports; i++) {
434 temp = readl(xhci->usb3_ports[i]);
435 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
437 * Compliance Mode Detected. Letting USB Core
438 * handle the Warm Reset
440 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
441 "Compliance mode detected->port %d",
443 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
444 "Attempting compliance mode recovery");
445 hcd = xhci->shared_hcd;
447 if (hcd->state == HC_STATE_SUSPENDED)
448 usb_hcd_resume_root_hub(hcd);
450 usb_hcd_poll_rh_status(hcd);
454 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
455 mod_timer(&xhci->comp_mode_recovery_timer,
456 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
460 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
461 * that causes ports behind that hardware to enter compliance mode sometimes.
462 * The quirk creates a timer that polls every 2 seconds the link state of
463 * each host controller's port and recovers it by issuing a Warm reset
464 * if Compliance mode is detected, otherwise the port will become "dead" (no
465 * device connections or disconnections will be detected anymore). Becasue no
466 * status event is generated when entering compliance mode (per xhci spec),
467 * this quirk is needed on systems that have the failing hardware installed.
469 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
471 xhci->port_status_u0 = 0;
472 init_timer(&xhci->comp_mode_recovery_timer);
474 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
475 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
476 xhci->comp_mode_recovery_timer.expires = jiffies +
477 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
479 set_timer_slack(&xhci->comp_mode_recovery_timer,
480 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
481 add_timer(&xhci->comp_mode_recovery_timer);
482 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
483 "Compliance mode recovery timer initialized");
487 * This function identifies the systems that have installed the SN65LVPE502CP
488 * USB3.0 re-driver and that need the Compliance Mode Quirk.
490 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
492 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
494 const char *dmi_product_name, *dmi_sys_vendor;
496 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
497 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
498 if (!dmi_product_name || !dmi_sys_vendor)
501 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
504 if (strstr(dmi_product_name, "Z420") ||
505 strstr(dmi_product_name, "Z620") ||
506 strstr(dmi_product_name, "Z820") ||
507 strstr(dmi_product_name, "Z1 Workstation"))
513 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
515 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
520 * Initialize memory for HCD and xHC (one-time init).
522 * Program the PAGESIZE register, initialize the device context array, create
523 * device contexts (?), set up a command ring segment (or two?), create event
524 * ring (one for now).
526 int xhci_init(struct usb_hcd *hcd)
528 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
531 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
532 spin_lock_init(&xhci->lock);
533 if (xhci->hci_version == 0x95 && link_quirk) {
534 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
535 "QUIRK: Not clearing Link TRB chain bits.");
536 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
538 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
539 "xHCI doesn't need link TRB QUIRK");
541 retval = xhci_mem_init(xhci, GFP_KERNEL);
542 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
544 /* Initializing Compliance Mode Recovery Data If Needed */
545 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
546 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
547 compliance_mode_recovery_timer_init(xhci);
553 /*-------------------------------------------------------------------------*/
556 static int xhci_run_finished(struct xhci_hcd *xhci)
558 if (xhci_start(xhci)) {
562 xhci->shared_hcd->state = HC_STATE_RUNNING;
563 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
565 if (xhci->quirks & XHCI_NEC_HOST)
566 xhci_ring_cmd_db(xhci);
568 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
569 "Finished xhci_run for USB3 roothub");
574 * Start the HC after it was halted.
576 * This function is called by the USB core when the HC driver is added.
577 * Its opposite is xhci_stop().
579 * xhci_init() must be called once before this function can be called.
580 * Reset the HC, enable device slot contexts, program DCBAAP, and
581 * set command ring pointer and event ring pointer.
583 * Setup MSI-X vectors and enable interrupts.
585 int xhci_run(struct usb_hcd *hcd)
590 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
592 /* Start the xHCI host controller running only after the USB 2.0 roothub
596 hcd->uses_new_polling = 1;
597 if (!usb_hcd_is_primary_hcd(hcd))
598 return xhci_run_finished(xhci);
600 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
602 ret = xhci_try_enable_msi(hcd);
606 xhci_dbg(xhci, "Command ring memory map follows:\n");
607 xhci_debug_ring(xhci, xhci->cmd_ring);
608 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
609 xhci_dbg_cmd_ptrs(xhci);
611 xhci_dbg(xhci, "ERST memory map follows:\n");
612 xhci_dbg_erst(xhci, &xhci->erst);
613 xhci_dbg(xhci, "Event ring:\n");
614 xhci_debug_ring(xhci, xhci->event_ring);
615 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
616 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
617 temp_64 &= ~ERST_PTR_MASK;
618 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
619 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
621 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
622 "// Set the interrupt modulation register");
623 temp = readl(&xhci->ir_set->irq_control);
624 temp &= ~ER_IRQ_INTERVAL_MASK;
626 writel(temp, &xhci->ir_set->irq_control);
628 /* Set the HCD state before we enable the irqs */
629 temp = readl(&xhci->op_regs->command);
631 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
632 "// Enable interrupts, cmd = 0x%x.", temp);
633 writel(temp, &xhci->op_regs->command);
635 temp = readl(&xhci->ir_set->irq_pending);
636 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
637 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
638 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
639 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
640 xhci_print_ir_set(xhci, 0);
642 if (xhci->quirks & XHCI_NEC_HOST)
643 xhci_queue_vendor_command(xhci, 0, 0, 0,
644 TRB_TYPE(TRB_NEC_GET_FW));
646 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
647 "Finished xhci_run for USB2 roothub");
651 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
653 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
655 spin_lock_irq(&xhci->lock);
658 /* The shared_hcd is going to be deallocated shortly (the USB core only
659 * calls this function when allocation fails in usb_add_hcd(), or
660 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
662 xhci->shared_hcd = NULL;
663 spin_unlock_irq(&xhci->lock);
669 * This function is called by the USB core when the HC driver is removed.
670 * Its opposite is xhci_run().
672 * Disable device contexts, disable IRQs, and quiesce the HC.
673 * Reset the HC, finish any completed transactions, and cleanup memory.
675 void xhci_stop(struct usb_hcd *hcd)
678 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
680 if (!usb_hcd_is_primary_hcd(hcd)) {
681 xhci_only_stop_hcd(xhci->shared_hcd);
685 spin_lock_irq(&xhci->lock);
686 /* Make sure the xHC is halted for a USB3 roothub
687 * (xhci_stop() could be called as part of failed init).
691 spin_unlock_irq(&xhci->lock);
693 xhci_cleanup_msix(xhci);
695 /* Deleting Compliance Mode Recovery Timer */
696 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
697 (!(xhci_all_ports_seen_u0(xhci)))) {
698 del_timer_sync(&xhci->comp_mode_recovery_timer);
699 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
700 "%s: compliance mode recovery timer deleted",
704 if (xhci->quirks & XHCI_AMD_PLL_FIX)
707 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
708 "// Disabling event ring interrupts");
709 temp = readl(&xhci->op_regs->status);
710 writel(temp & ~STS_EINT, &xhci->op_regs->status);
711 temp = readl(&xhci->ir_set->irq_pending);
712 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
713 xhci_print_ir_set(xhci, 0);
715 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
716 xhci_mem_cleanup(xhci);
717 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
718 "xhci_stop completed - status = %x",
719 readl(&xhci->op_regs->status));
723 * Shutdown HC (not bus-specific)
725 * This is called when the machine is rebooting or halting. We assume that the
726 * machine will be powered off, and the HC's internal state will be reset.
727 * Don't bother to free memory.
729 * This will only ever be called with the main usb_hcd (the USB3 roothub).
731 void xhci_shutdown(struct usb_hcd *hcd)
733 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
735 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
736 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
738 spin_lock_irq(&xhci->lock);
740 /* Workaround for spurious wakeups at shutdown with HSW */
741 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
743 spin_unlock_irq(&xhci->lock);
745 xhci_cleanup_msix(xhci);
747 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
748 "xhci_shutdown completed - status = %x",
749 readl(&xhci->op_regs->status));
751 /* Yet another workaround for spurious wakeups at shutdown with HSW */
752 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
753 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
757 static void xhci_save_registers(struct xhci_hcd *xhci)
759 xhci->s3.command = readl(&xhci->op_regs->command);
760 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
761 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
762 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
763 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
764 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
765 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
766 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
767 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
770 static void xhci_restore_registers(struct xhci_hcd *xhci)
772 writel(xhci->s3.command, &xhci->op_regs->command);
773 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
774 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
775 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
776 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
777 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
778 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
779 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
780 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
783 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
787 /* step 2: initialize command ring buffer */
788 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
789 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
790 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
791 xhci->cmd_ring->dequeue) &
792 (u64) ~CMD_RING_RSVD_BITS) |
793 xhci->cmd_ring->cycle_state;
794 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
795 "// Setting command ring address to 0x%llx",
796 (long unsigned long) val_64);
797 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
801 * The whole command ring must be cleared to zero when we suspend the host.
803 * The host doesn't save the command ring pointer in the suspend well, so we
804 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
805 * aligned, because of the reserved bits in the command ring dequeue pointer
806 * register. Therefore, we can't just set the dequeue pointer back in the
807 * middle of the ring (TRBs are 16-byte aligned).
809 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
811 struct xhci_ring *ring;
812 struct xhci_segment *seg;
814 ring = xhci->cmd_ring;
818 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
819 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
820 cpu_to_le32(~TRB_CYCLE);
822 } while (seg != ring->deq_seg);
824 /* Reset the software enqueue and dequeue pointers */
825 ring->deq_seg = ring->first_seg;
826 ring->dequeue = ring->first_seg->trbs;
827 ring->enq_seg = ring->deq_seg;
828 ring->enqueue = ring->dequeue;
830 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
832 * Ring is now zeroed, so the HW should look for change of ownership
833 * when the cycle bit is set to 1.
835 ring->cycle_state = 1;
838 * Reset the hardware dequeue pointer.
839 * Yes, this will need to be re-written after resume, but we're paranoid
840 * and want to make sure the hardware doesn't access bogus memory
841 * because, say, the BIOS or an SMI started the host without changing
842 * the command ring pointers.
844 xhci_set_cmd_ring_deq(xhci);
847 static void xhci_disable_port_wake_on_bits(struct xhci_hcd *xhci)
850 __le32 __iomem **port_array;
854 spin_lock_irqsave(&xhci->lock, flags);
856 /* disble usb3 ports Wake bits*/
857 port_index = xhci->num_usb3_ports;
858 port_array = xhci->usb3_ports;
859 while (port_index--) {
860 t1 = readl(port_array[port_index]);
861 t1 = xhci_port_state_to_neutral(t1);
862 t2 = t1 & ~PORT_WAKE_BITS;
864 writel(t2, port_array[port_index]);
867 /* disble usb2 ports Wake bits*/
868 port_index = xhci->num_usb2_ports;
869 port_array = xhci->usb2_ports;
870 while (port_index--) {
871 t1 = readl(port_array[port_index]);
872 t1 = xhci_port_state_to_neutral(t1);
873 t2 = t1 & ~PORT_WAKE_BITS;
875 writel(t2, port_array[port_index]);
878 spin_unlock_irqrestore(&xhci->lock, flags);
882 * Stop HC (not bus-specific)
884 * This is called when the machine transition into S3/S4 mode.
887 int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup)
890 unsigned int delay = XHCI_MAX_HALT_USEC;
891 struct usb_hcd *hcd = xhci_to_hcd(xhci);
894 if (hcd->state != HC_STATE_SUSPENDED ||
895 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
898 /* Clear root port wake on bits if wakeup not allowed. */
900 xhci_disable_port_wake_on_bits(xhci);
902 /* Don't poll the roothubs on bus suspend. */
903 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
904 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
905 del_timer_sync(&hcd->rh_timer);
907 spin_lock_irq(&xhci->lock);
908 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
909 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
910 /* step 1: stop endpoint */
911 /* skipped assuming that port suspend has done */
913 /* step 2: clear Run/Stop bit */
914 command = readl(&xhci->op_regs->command);
916 writel(command, &xhci->op_regs->command);
918 /* Some chips from Fresco Logic need an extraordinary delay */
919 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
921 if (xhci_handshake(xhci, &xhci->op_regs->status,
922 STS_HALT, STS_HALT, delay)) {
923 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
924 spin_unlock_irq(&xhci->lock);
927 xhci_clear_command_ring(xhci);
929 /* step 3: save registers */
930 xhci_save_registers(xhci);
932 /* step 4: set CSS flag */
933 command = readl(&xhci->op_regs->command);
935 writel(command, &xhci->op_regs->command);
936 if (xhci_handshake(xhci, &xhci->op_regs->status,
937 STS_SAVE, 0, 10 * 1000)) {
938 xhci_warn(xhci, "WARN: xHC save state timeout\n");
939 spin_unlock_irq(&xhci->lock);
942 spin_unlock_irq(&xhci->lock);
945 * Deleting Compliance Mode Recovery Timer because the xHCI Host
946 * is about to be suspended.
948 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
949 (!(xhci_all_ports_seen_u0(xhci)))) {
950 del_timer_sync(&xhci->comp_mode_recovery_timer);
951 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
952 "%s: compliance mode recovery timer deleted",
956 /* step 5: remove core well power */
957 /* synchronize irq when using MSI-X */
958 xhci_msix_sync_irqs(xhci);
964 * start xHC (not bus-specific)
966 * This is called when the machine transition from S3/S4 mode.
969 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
971 u32 command, temp = 0, status;
972 struct usb_hcd *hcd = xhci_to_hcd(xhci);
973 struct usb_hcd *secondary_hcd;
975 bool comp_timer_running = false;
977 /* Wait a bit if either of the roothubs need to settle from the
978 * transition into bus suspend.
980 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
982 xhci->bus_state[1].next_statechange))
985 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
986 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
988 spin_lock_irq(&xhci->lock);
989 if (xhci->quirks & XHCI_RESET_ON_RESUME)
993 /* step 1: restore register */
994 xhci_restore_registers(xhci);
995 /* step 2: initialize command ring buffer */
996 xhci_set_cmd_ring_deq(xhci);
997 /* step 3: restore state and start state*/
998 /* step 3: set CRS flag */
999 command = readl(&xhci->op_regs->command);
1001 writel(command, &xhci->op_regs->command);
1002 if (xhci_handshake(xhci, &xhci->op_regs->status,
1003 STS_RESTORE, 0, 10 * 1000)) {
1004 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
1005 spin_unlock_irq(&xhci->lock);
1008 temp = readl(&xhci->op_regs->status);
1011 /* If restore operation fails, re-initialize the HC during resume */
1012 if ((temp & STS_SRE) || hibernated) {
1014 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
1015 !(xhci_all_ports_seen_u0(xhci))) {
1016 del_timer_sync(&xhci->comp_mode_recovery_timer);
1017 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1018 "Compliance Mode Recovery Timer deleted!");
1021 /* Let the USB core know _both_ roothubs lost power. */
1022 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
1023 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
1025 xhci_dbg(xhci, "Stop HCD\n");
1028 spin_unlock_irq(&xhci->lock);
1029 xhci_cleanup_msix(xhci);
1031 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1032 temp = readl(&xhci->op_regs->status);
1033 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1034 temp = readl(&xhci->ir_set->irq_pending);
1035 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1036 xhci_print_ir_set(xhci, 0);
1038 xhci_dbg(xhci, "cleaning up memory\n");
1039 xhci_mem_cleanup(xhci);
1040 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1041 readl(&xhci->op_regs->status));
1043 /* USB core calls the PCI reinit and start functions twice:
1044 * first with the primary HCD, and then with the secondary HCD.
1045 * If we don't do the same, the host will never be started.
1047 if (!usb_hcd_is_primary_hcd(hcd))
1048 secondary_hcd = hcd;
1050 secondary_hcd = xhci->shared_hcd;
1052 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1053 retval = xhci_init(hcd->primary_hcd);
1056 comp_timer_running = true;
1058 xhci_dbg(xhci, "Start the primary HCD\n");
1059 retval = xhci_run(hcd->primary_hcd);
1061 xhci_dbg(xhci, "Start the secondary HCD\n");
1062 retval = xhci_run(secondary_hcd);
1064 hcd->state = HC_STATE_SUSPENDED;
1065 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1069 /* step 4: set Run/Stop bit */
1070 command = readl(&xhci->op_regs->command);
1072 writel(command, &xhci->op_regs->command);
1073 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1076 /* step 5: walk topology and initialize portsc,
1077 * portpmsc and portli
1079 /* this is done in bus_resume */
1081 /* step 6: restart each of the previously
1082 * Running endpoints by ringing their doorbells
1085 spin_unlock_irq(&xhci->lock);
1089 /* Resume root hubs only when have pending events. */
1090 status = readl(&xhci->op_regs->status);
1091 if (status & STS_EINT) {
1092 usb_hcd_resume_root_hub(hcd);
1093 usb_hcd_resume_root_hub(xhci->shared_hcd);
1098 * If system is subject to the Quirk, Compliance Mode Timer needs to
1099 * be re-initialized Always after a system resume. Ports are subject
1100 * to suffer the Compliance Mode issue again. It doesn't matter if
1101 * ports have entered previously to U0 before system's suspension.
1103 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1104 compliance_mode_recovery_timer_init(xhci);
1106 /* Re-enable port polling. */
1107 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1108 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1109 usb_hcd_poll_rh_status(hcd);
1113 #endif /* CONFIG_PM */
1115 /*-------------------------------------------------------------------------*/
1118 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1119 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1120 * value to right shift 1 for the bitmask.
1122 * Index = (epnum * 2) + direction - 1,
1123 * where direction = 0 for OUT, 1 for IN.
1124 * For control endpoints, the IN index is used (OUT index is unused), so
1125 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1127 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1130 if (usb_endpoint_xfer_control(desc))
1131 index = (unsigned int) (usb_endpoint_num(desc)*2);
1133 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1134 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1138 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1139 * address from the XHCI endpoint index.
1141 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1143 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1144 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1145 return direction | number;
1148 /* Find the flag for this endpoint (for use in the control context). Use the
1149 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1152 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1154 return 1 << (xhci_get_endpoint_index(desc) + 1);
1157 /* Find the flag for this endpoint (for use in the control context). Use the
1158 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1161 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1163 return 1 << (ep_index + 1);
1166 /* Compute the last valid endpoint context index. Basically, this is the
1167 * endpoint index plus one. For slot contexts with more than valid endpoint,
1168 * we find the most significant bit set in the added contexts flags.
1169 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1170 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1172 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1174 return fls(added_ctxs) - 1;
1177 /* Returns 1 if the arguments are OK;
1178 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1180 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1181 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1183 struct xhci_hcd *xhci;
1184 struct xhci_virt_device *virt_dev;
1186 if (!hcd || (check_ep && !ep) || !udev) {
1187 pr_debug("xHCI %s called with invalid args\n", func);
1190 if (!udev->parent) {
1191 pr_debug("xHCI %s called for root hub\n", func);
1195 xhci = hcd_to_xhci(hcd);
1196 if (check_virt_dev) {
1197 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1198 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1203 virt_dev = xhci->devs[udev->slot_id];
1204 if (virt_dev->udev != udev) {
1205 xhci_dbg(xhci, "xHCI %s called with udev and "
1206 "virt_dev does not match\n", func);
1211 if (xhci->xhc_state & XHCI_STATE_HALTED)
1217 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1218 struct usb_device *udev, struct xhci_command *command,
1219 bool ctx_change, bool must_succeed);
1222 * Full speed devices may have a max packet size greater than 8 bytes, but the
1223 * USB core doesn't know that until it reads the first 8 bytes of the
1224 * descriptor. If the usb_device's max packet size changes after that point,
1225 * we need to issue an evaluate context command and wait on it.
1227 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1228 unsigned int ep_index, struct urb *urb)
1230 struct xhci_container_ctx *in_ctx;
1231 struct xhci_container_ctx *out_ctx;
1232 struct xhci_input_control_ctx *ctrl_ctx;
1233 struct xhci_ep_ctx *ep_ctx;
1234 int max_packet_size;
1235 int hw_max_packet_size;
1238 out_ctx = xhci->devs[slot_id]->out_ctx;
1239 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1240 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1241 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1242 if (hw_max_packet_size != max_packet_size) {
1243 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1244 "Max Packet Size for ep 0 changed.");
1245 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1246 "Max packet size in usb_device = %d",
1248 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1249 "Max packet size in xHCI HW = %d",
1250 hw_max_packet_size);
1251 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1252 "Issuing evaluate context command.");
1254 /* Set up the input context flags for the command */
1255 /* FIXME: This won't work if a non-default control endpoint
1256 * changes max packet sizes.
1258 in_ctx = xhci->devs[slot_id]->in_ctx;
1259 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1261 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1265 /* Set up the modified control endpoint 0 */
1266 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1267 xhci->devs[slot_id]->out_ctx, ep_index);
1269 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
1270 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1271 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1273 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1274 ctrl_ctx->drop_flags = 0;
1276 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1277 xhci_dbg_ctx(xhci, in_ctx, ep_index);
1278 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1279 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1281 ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
1284 /* Clean up the input context for later use by bandwidth
1287 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1293 * non-error returns are a promise to giveback() the urb later
1294 * we drop ownership so next owner (or urb unlink) can get it
1296 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1298 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1299 struct xhci_td *buffer;
1300 unsigned long flags;
1302 unsigned int slot_id, ep_index;
1303 struct urb_priv *urb_priv;
1306 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1307 true, true, __func__) <= 0)
1310 slot_id = urb->dev->slot_id;
1311 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1313 if (!HCD_HW_ACCESSIBLE(hcd)) {
1314 if (!in_interrupt())
1315 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1320 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1321 size = urb->number_of_packets;
1325 urb_priv = kzalloc(sizeof(struct urb_priv) +
1326 size * sizeof(struct xhci_td *), mem_flags);
1330 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1336 for (i = 0; i < size; i++) {
1337 urb_priv->td[i] = buffer;
1341 urb_priv->length = size;
1342 urb_priv->td_cnt = 0;
1343 urb->hcpriv = urb_priv;
1345 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1346 /* Check to see if the max packet size for the default control
1347 * endpoint changed during FS device enumeration
1349 if (urb->dev->speed == USB_SPEED_FULL) {
1350 ret = xhci_check_maxpacket(xhci, slot_id,
1353 xhci_urb_free_priv(xhci, urb_priv);
1359 /* We have a spinlock and interrupts disabled, so we must pass
1360 * atomic context to this function, which may allocate memory.
1362 spin_lock_irqsave(&xhci->lock, flags);
1363 if (xhci->xhc_state & XHCI_STATE_DYING)
1365 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1369 spin_unlock_irqrestore(&xhci->lock, flags);
1370 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1371 spin_lock_irqsave(&xhci->lock, flags);
1372 if (xhci->xhc_state & XHCI_STATE_DYING)
1374 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1375 EP_GETTING_STREAMS) {
1376 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1377 "is transitioning to using streams.\n");
1379 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1380 EP_GETTING_NO_STREAMS) {
1381 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1382 "is transitioning to "
1383 "not having streams.\n");
1386 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1391 spin_unlock_irqrestore(&xhci->lock, flags);
1392 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1393 spin_lock_irqsave(&xhci->lock, flags);
1394 if (xhci->xhc_state & XHCI_STATE_DYING)
1396 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1400 spin_unlock_irqrestore(&xhci->lock, flags);
1402 spin_lock_irqsave(&xhci->lock, flags);
1403 if (xhci->xhc_state & XHCI_STATE_DYING)
1405 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1409 spin_unlock_irqrestore(&xhci->lock, flags);
1414 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1415 "non-responsive xHCI host.\n",
1416 urb->ep->desc.bEndpointAddress, urb);
1419 xhci_urb_free_priv(xhci, urb_priv);
1421 spin_unlock_irqrestore(&xhci->lock, flags);
1425 /* Get the right ring for the given URB.
1426 * If the endpoint supports streams, boundary check the URB's stream ID.
1427 * If the endpoint doesn't support streams, return the singular endpoint ring.
1429 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1432 unsigned int slot_id;
1433 unsigned int ep_index;
1434 unsigned int stream_id;
1435 struct xhci_virt_ep *ep;
1437 slot_id = urb->dev->slot_id;
1438 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1439 stream_id = urb->stream_id;
1440 ep = &xhci->devs[slot_id]->eps[ep_index];
1441 /* Common case: no streams */
1442 if (!(ep->ep_state & EP_HAS_STREAMS))
1445 if (stream_id == 0) {
1447 "WARN: Slot ID %u, ep index %u has streams, "
1448 "but URB has no stream ID.\n",
1453 if (stream_id < ep->stream_info->num_streams)
1454 return ep->stream_info->stream_rings[stream_id];
1457 "WARN: Slot ID %u, ep index %u has "
1458 "stream IDs 1 to %u allocated, "
1459 "but stream ID %u is requested.\n",
1461 ep->stream_info->num_streams - 1,
1467 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1468 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1469 * should pick up where it left off in the TD, unless a Set Transfer Ring
1470 * Dequeue Pointer is issued.
1472 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1473 * the ring. Since the ring is a contiguous structure, they can't be physically
1474 * removed. Instead, there are two options:
1476 * 1) If the HC is in the middle of processing the URB to be canceled, we
1477 * simply move the ring's dequeue pointer past those TRBs using the Set
1478 * Transfer Ring Dequeue Pointer command. This will be the common case,
1479 * when drivers timeout on the last submitted URB and attempt to cancel.
1481 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1482 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1483 * HC will need to invalidate the any TRBs it has cached after the stop
1484 * endpoint command, as noted in the xHCI 0.95 errata.
1486 * 3) The TD may have completed by the time the Stop Endpoint Command
1487 * completes, so software needs to handle that case too.
1489 * This function should protect against the TD enqueueing code ringing the
1490 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1491 * It also needs to account for multiple cancellations on happening at the same
1492 * time for the same endpoint.
1494 * Note that this function can be called in any context, or so says
1495 * usb_hcd_unlink_urb()
1497 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1499 unsigned long flags;
1502 struct xhci_hcd *xhci;
1503 struct urb_priv *urb_priv;
1505 unsigned int ep_index;
1506 struct xhci_ring *ep_ring;
1507 struct xhci_virt_ep *ep;
1509 xhci = hcd_to_xhci(hcd);
1510 spin_lock_irqsave(&xhci->lock, flags);
1511 /* Make sure the URB hasn't completed or been unlinked already */
1512 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1513 if (ret || !urb->hcpriv)
1515 temp = readl(&xhci->op_regs->status);
1516 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1517 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1518 "HW died, freeing TD.");
1519 urb_priv = urb->hcpriv;
1520 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1521 td = urb_priv->td[i];
1522 if (!list_empty(&td->td_list))
1523 list_del_init(&td->td_list);
1524 if (!list_empty(&td->cancelled_td_list))
1525 list_del_init(&td->cancelled_td_list);
1528 usb_hcd_unlink_urb_from_ep(hcd, urb);
1529 spin_unlock_irqrestore(&xhci->lock, flags);
1530 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1531 xhci_urb_free_priv(xhci, urb_priv);
1534 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1535 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1536 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1537 "Ep 0x%x: URB %p to be canceled on "
1538 "non-responsive xHCI host.",
1539 urb->ep->desc.bEndpointAddress, urb);
1540 /* Let the stop endpoint command watchdog timer (which set this
1541 * state) finish cleaning up the endpoint TD lists. We must
1542 * have caught it in the middle of dropping a lock and giving
1548 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1549 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1550 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1556 urb_priv = urb->hcpriv;
1557 i = urb_priv->td_cnt;
1558 if (i < urb_priv->length)
1559 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1560 "Cancel URB %p, dev %s, ep 0x%x, "
1561 "starting at offset 0x%llx",
1562 urb, urb->dev->devpath,
1563 urb->ep->desc.bEndpointAddress,
1564 (unsigned long long) xhci_trb_virt_to_dma(
1565 urb_priv->td[i]->start_seg,
1566 urb_priv->td[i]->first_trb));
1568 for (; i < urb_priv->length; i++) {
1569 td = urb_priv->td[i];
1570 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1573 /* Queue a stop endpoint command, but only if this is
1574 * the first cancellation to be handled.
1576 if (!(ep->ep_state & EP_HALT_PENDING)) {
1577 ep->ep_state |= EP_HALT_PENDING;
1578 ep->stop_cmds_pending++;
1579 ep->stop_cmd_timer.expires = jiffies +
1580 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1581 add_timer(&ep->stop_cmd_timer);
1582 xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index, 0);
1583 xhci_ring_cmd_db(xhci);
1586 spin_unlock_irqrestore(&xhci->lock, flags);
1590 /* Drop an endpoint from a new bandwidth configuration for this device.
1591 * Only one call to this function is allowed per endpoint before
1592 * check_bandwidth() or reset_bandwidth() must be called.
1593 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1594 * add the endpoint to the schedule with possibly new parameters denoted by a
1595 * different endpoint descriptor in usb_host_endpoint.
1596 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1599 * The USB core will not allow URBs to be queued to an endpoint that is being
1600 * disabled, so there's no need for mutual exclusion to protect
1601 * the xhci->devs[slot_id] structure.
1603 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1604 struct usb_host_endpoint *ep)
1606 struct xhci_hcd *xhci;
1607 struct xhci_container_ctx *in_ctx, *out_ctx;
1608 struct xhci_input_control_ctx *ctrl_ctx;
1609 struct xhci_slot_ctx *slot_ctx;
1610 unsigned int last_ctx;
1611 unsigned int ep_index;
1612 struct xhci_ep_ctx *ep_ctx;
1614 u32 new_add_flags, new_drop_flags, new_slot_info;
1617 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1620 xhci = hcd_to_xhci(hcd);
1621 if (xhci->xhc_state & XHCI_STATE_DYING)
1624 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1625 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1626 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1627 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1628 __func__, drop_flag);
1632 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1633 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1634 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1636 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1641 ep_index = xhci_get_endpoint_index(&ep->desc);
1642 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1643 /* If the HC already knows the endpoint is disabled,
1644 * or the HCD has noted it is disabled, ignore this request
1646 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1647 cpu_to_le32(EP_STATE_DISABLED)) ||
1648 le32_to_cpu(ctrl_ctx->drop_flags) &
1649 xhci_get_endpoint_flag(&ep->desc)) {
1650 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1655 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1656 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1658 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1659 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1661 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1662 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1663 /* Update the last valid endpoint context, if we deleted the last one */
1664 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1665 LAST_CTX(last_ctx)) {
1666 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1667 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1669 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1671 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1673 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1674 (unsigned int) ep->desc.bEndpointAddress,
1676 (unsigned int) new_drop_flags,
1677 (unsigned int) new_add_flags,
1678 (unsigned int) new_slot_info);
1682 /* Add an endpoint to a new possible bandwidth configuration for this device.
1683 * Only one call to this function is allowed per endpoint before
1684 * check_bandwidth() or reset_bandwidth() must be called.
1685 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1686 * add the endpoint to the schedule with possibly new parameters denoted by a
1687 * different endpoint descriptor in usb_host_endpoint.
1688 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1691 * The USB core will not allow URBs to be queued to an endpoint until the
1692 * configuration or alt setting is installed in the device, so there's no need
1693 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1695 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1696 struct usb_host_endpoint *ep)
1698 struct xhci_hcd *xhci;
1699 struct xhci_container_ctx *in_ctx, *out_ctx;
1700 unsigned int ep_index;
1701 struct xhci_slot_ctx *slot_ctx;
1702 struct xhci_input_control_ctx *ctrl_ctx;
1704 unsigned int last_ctx;
1705 u32 new_add_flags, new_drop_flags, new_slot_info;
1706 struct xhci_virt_device *virt_dev;
1709 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1711 /* So we won't queue a reset ep command for a root hub */
1715 xhci = hcd_to_xhci(hcd);
1716 if (xhci->xhc_state & XHCI_STATE_DYING)
1719 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1720 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1721 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1722 /* FIXME when we have to issue an evaluate endpoint command to
1723 * deal with ep0 max packet size changing once we get the
1726 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1727 __func__, added_ctxs);
1731 virt_dev = xhci->devs[udev->slot_id];
1732 in_ctx = virt_dev->in_ctx;
1733 out_ctx = virt_dev->out_ctx;
1734 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1736 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1741 ep_index = xhci_get_endpoint_index(&ep->desc);
1742 /* If this endpoint is already in use, and the upper layers are trying
1743 * to add it again without dropping it, reject the addition.
1745 if (virt_dev->eps[ep_index].ring &&
1746 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1747 xhci_get_endpoint_flag(&ep->desc))) {
1748 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1749 "without dropping it.\n",
1750 (unsigned int) ep->desc.bEndpointAddress);
1754 /* If the HCD has already noted the endpoint is enabled,
1755 * ignore this request.
1757 if (le32_to_cpu(ctrl_ctx->add_flags) &
1758 xhci_get_endpoint_flag(&ep->desc)) {
1759 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1765 * Configuration and alternate setting changes must be done in
1766 * process context, not interrupt context (or so documenation
1767 * for usb_set_interface() and usb_set_configuration() claim).
1769 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1770 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1771 __func__, ep->desc.bEndpointAddress);
1775 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1776 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1778 /* If xhci_endpoint_disable() was called for this endpoint, but the
1779 * xHC hasn't been notified yet through the check_bandwidth() call,
1780 * this re-adds a new state for the endpoint from the new endpoint
1781 * descriptors. We must drop and re-add this endpoint, so we leave the
1784 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1786 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1787 /* Update the last valid endpoint context, if we just added one past */
1788 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1789 LAST_CTX(last_ctx)) {
1790 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1791 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1793 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1795 /* Store the usb_device pointer for later use */
1798 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1799 (unsigned int) ep->desc.bEndpointAddress,
1801 (unsigned int) new_drop_flags,
1802 (unsigned int) new_add_flags,
1803 (unsigned int) new_slot_info);
1807 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1809 struct xhci_input_control_ctx *ctrl_ctx;
1810 struct xhci_ep_ctx *ep_ctx;
1811 struct xhci_slot_ctx *slot_ctx;
1814 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1816 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1821 /* When a device's add flag and drop flag are zero, any subsequent
1822 * configure endpoint command will leave that endpoint's state
1823 * untouched. Make sure we don't leave any old state in the input
1824 * endpoint contexts.
1826 ctrl_ctx->drop_flags = 0;
1827 ctrl_ctx->add_flags = 0;
1828 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1829 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1830 /* Endpoint 0 is always valid */
1831 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1832 for (i = 1; i < 31; ++i) {
1833 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1834 ep_ctx->ep_info = 0;
1835 ep_ctx->ep_info2 = 0;
1837 ep_ctx->tx_info = 0;
1841 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1842 struct usb_device *udev, u32 *cmd_status)
1846 switch (*cmd_status) {
1848 dev_warn(&udev->dev, "Not enough host controller resources "
1849 "for new device state.\n");
1851 /* FIXME: can we allocate more resources for the HC? */
1854 case COMP_2ND_BW_ERR:
1855 dev_warn(&udev->dev, "Not enough bandwidth "
1856 "for new device state.\n");
1858 /* FIXME: can we go back to the old state? */
1861 /* the HCD set up something wrong */
1862 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1864 "and endpoint is not disabled.\n");
1868 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1869 "configure command.\n");
1873 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1874 "Successful Endpoint Configure command");
1878 xhci_err(xhci, "ERROR: unexpected command completion "
1879 "code 0x%x.\n", *cmd_status);
1886 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1887 struct usb_device *udev, u32 *cmd_status)
1890 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1892 switch (*cmd_status) {
1894 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1895 "context command.\n");
1899 dev_warn(&udev->dev, "WARN: slot not enabled for"
1900 "evaluate context command.\n");
1903 case COMP_CTX_STATE:
1904 dev_warn(&udev->dev, "WARN: invalid context state for "
1905 "evaluate context command.\n");
1906 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1910 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1911 "context command.\n");
1915 /* Max Exit Latency too large error */
1916 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1920 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1921 "Successful evaluate context command");
1925 xhci_err(xhci, "ERROR: unexpected command completion "
1926 "code 0x%x.\n", *cmd_status);
1933 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1934 struct xhci_input_control_ctx *ctrl_ctx)
1936 u32 valid_add_flags;
1937 u32 valid_drop_flags;
1939 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1940 * (bit 1). The default control endpoint is added during the Address
1941 * Device command and is never removed until the slot is disabled.
1943 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1944 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1946 /* Use hweight32 to count the number of ones in the add flags, or
1947 * number of endpoints added. Don't count endpoints that are changed
1948 * (both added and dropped).
1950 return hweight32(valid_add_flags) -
1951 hweight32(valid_add_flags & valid_drop_flags);
1954 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1955 struct xhci_input_control_ctx *ctrl_ctx)
1957 u32 valid_add_flags;
1958 u32 valid_drop_flags;
1960 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1961 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1963 return hweight32(valid_drop_flags) -
1964 hweight32(valid_add_flags & valid_drop_flags);
1968 * We need to reserve the new number of endpoints before the configure endpoint
1969 * command completes. We can't subtract the dropped endpoints from the number
1970 * of active endpoints until the command completes because we can oversubscribe
1971 * the host in this case:
1973 * - the first configure endpoint command drops more endpoints than it adds
1974 * - a second configure endpoint command that adds more endpoints is queued
1975 * - the first configure endpoint command fails, so the config is unchanged
1976 * - the second command may succeed, even though there isn't enough resources
1978 * Must be called with xhci->lock held.
1980 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1981 struct xhci_input_control_ctx *ctrl_ctx)
1985 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1986 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1987 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1988 "Not enough ep ctxs: "
1989 "%u active, need to add %u, limit is %u.",
1990 xhci->num_active_eps, added_eps,
1991 xhci->limit_active_eps);
1994 xhci->num_active_eps += added_eps;
1995 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1996 "Adding %u ep ctxs, %u now active.", added_eps,
1997 xhci->num_active_eps);
2002 * The configure endpoint was failed by the xHC for some other reason, so we
2003 * need to revert the resources that failed configuration would have used.
2005 * Must be called with xhci->lock held.
2007 static void xhci_free_host_resources(struct xhci_hcd *xhci,
2008 struct xhci_input_control_ctx *ctrl_ctx)
2012 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
2013 xhci->num_active_eps -= num_failed_eps;
2014 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2015 "Removing %u failed ep ctxs, %u now active.",
2017 xhci->num_active_eps);
2021 * Now that the command has completed, clean up the active endpoint count by
2022 * subtracting out the endpoints that were dropped (but not changed).
2024 * Must be called with xhci->lock held.
2026 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2027 struct xhci_input_control_ctx *ctrl_ctx)
2029 u32 num_dropped_eps;
2031 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2032 xhci->num_active_eps -= num_dropped_eps;
2033 if (num_dropped_eps)
2034 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2035 "Removing %u dropped ep ctxs, %u now active.",
2037 xhci->num_active_eps);
2040 static unsigned int xhci_get_block_size(struct usb_device *udev)
2042 switch (udev->speed) {
2044 case USB_SPEED_FULL:
2046 case USB_SPEED_HIGH:
2048 case USB_SPEED_SUPER:
2050 case USB_SPEED_UNKNOWN:
2051 case USB_SPEED_WIRELESS:
2053 /* Should never happen */
2059 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2061 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2063 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2068 /* If we are changing a LS/FS device under a HS hub,
2069 * make sure (if we are activating a new TT) that the HS bus has enough
2070 * bandwidth for this new TT.
2072 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2073 struct xhci_virt_device *virt_dev,
2076 struct xhci_interval_bw_table *bw_table;
2077 struct xhci_tt_bw_info *tt_info;
2079 /* Find the bandwidth table for the root port this TT is attached to. */
2080 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2081 tt_info = virt_dev->tt_info;
2082 /* If this TT already had active endpoints, the bandwidth for this TT
2083 * has already been added. Removing all periodic endpoints (and thus
2084 * making the TT enactive) will only decrease the bandwidth used.
2088 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2089 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2093 /* Not sure why we would have no new active endpoints...
2095 * Maybe because of an Evaluate Context change for a hub update or a
2096 * control endpoint 0 max packet size change?
2097 * FIXME: skip the bandwidth calculation in that case.
2102 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2103 struct xhci_virt_device *virt_dev)
2105 unsigned int bw_reserved;
2107 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2108 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2111 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2112 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2119 * This algorithm is a very conservative estimate of the worst-case scheduling
2120 * scenario for any one interval. The hardware dynamically schedules the
2121 * packets, so we can't tell which microframe could be the limiting factor in
2122 * the bandwidth scheduling. This only takes into account periodic endpoints.
2124 * Obviously, we can't solve an NP complete problem to find the minimum worst
2125 * case scenario. Instead, we come up with an estimate that is no less than
2126 * the worst case bandwidth used for any one microframe, but may be an
2129 * We walk the requirements for each endpoint by interval, starting with the
2130 * smallest interval, and place packets in the schedule where there is only one
2131 * possible way to schedule packets for that interval. In order to simplify
2132 * this algorithm, we record the largest max packet size for each interval, and
2133 * assume all packets will be that size.
2135 * For interval 0, we obviously must schedule all packets for each interval.
2136 * The bandwidth for interval 0 is just the amount of data to be transmitted
2137 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2138 * the number of packets).
2140 * For interval 1, we have two possible microframes to schedule those packets
2141 * in. For this algorithm, if we can schedule the same number of packets for
2142 * each possible scheduling opportunity (each microframe), we will do so. The
2143 * remaining number of packets will be saved to be transmitted in the gaps in
2144 * the next interval's scheduling sequence.
2146 * As we move those remaining packets to be scheduled with interval 2 packets,
2147 * we have to double the number of remaining packets to transmit. This is
2148 * because the intervals are actually powers of 2, and we would be transmitting
2149 * the previous interval's packets twice in this interval. We also have to be
2150 * sure that when we look at the largest max packet size for this interval, we
2151 * also look at the largest max packet size for the remaining packets and take
2152 * the greater of the two.
2154 * The algorithm continues to evenly distribute packets in each scheduling
2155 * opportunity, and push the remaining packets out, until we get to the last
2156 * interval. Then those packets and their associated overhead are just added
2157 * to the bandwidth used.
2159 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2160 struct xhci_virt_device *virt_dev,
2163 unsigned int bw_reserved;
2164 unsigned int max_bandwidth;
2165 unsigned int bw_used;
2166 unsigned int block_size;
2167 struct xhci_interval_bw_table *bw_table;
2168 unsigned int packet_size = 0;
2169 unsigned int overhead = 0;
2170 unsigned int packets_transmitted = 0;
2171 unsigned int packets_remaining = 0;
2174 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2175 return xhci_check_ss_bw(xhci, virt_dev);
2177 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2178 max_bandwidth = HS_BW_LIMIT;
2179 /* Convert percent of bus BW reserved to blocks reserved */
2180 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2182 max_bandwidth = FS_BW_LIMIT;
2183 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2186 bw_table = virt_dev->bw_table;
2187 /* We need to translate the max packet size and max ESIT payloads into
2188 * the units the hardware uses.
2190 block_size = xhci_get_block_size(virt_dev->udev);
2192 /* If we are manipulating a LS/FS device under a HS hub, double check
2193 * that the HS bus has enough bandwidth if we are activing a new TT.
2195 if (virt_dev->tt_info) {
2196 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2197 "Recalculating BW for rootport %u",
2198 virt_dev->real_port);
2199 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2200 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2201 "newly activated TT.\n");
2204 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2205 "Recalculating BW for TT slot %u port %u",
2206 virt_dev->tt_info->slot_id,
2207 virt_dev->tt_info->ttport);
2209 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2210 "Recalculating BW for rootport %u",
2211 virt_dev->real_port);
2214 /* Add in how much bandwidth will be used for interval zero, or the
2215 * rounded max ESIT payload + number of packets * largest overhead.
2217 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2218 bw_table->interval_bw[0].num_packets *
2219 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2221 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2222 unsigned int bw_added;
2223 unsigned int largest_mps;
2224 unsigned int interval_overhead;
2227 * How many packets could we transmit in this interval?
2228 * If packets didn't fit in the previous interval, we will need
2229 * to transmit that many packets twice within this interval.
2231 packets_remaining = 2 * packets_remaining +
2232 bw_table->interval_bw[i].num_packets;
2234 /* Find the largest max packet size of this or the previous
2237 if (list_empty(&bw_table->interval_bw[i].endpoints))
2240 struct xhci_virt_ep *virt_ep;
2241 struct list_head *ep_entry;
2243 ep_entry = bw_table->interval_bw[i].endpoints.next;
2244 virt_ep = list_entry(ep_entry,
2245 struct xhci_virt_ep, bw_endpoint_list);
2246 /* Convert to blocks, rounding up */
2247 largest_mps = DIV_ROUND_UP(
2248 virt_ep->bw_info.max_packet_size,
2251 if (largest_mps > packet_size)
2252 packet_size = largest_mps;
2254 /* Use the larger overhead of this or the previous interval. */
2255 interval_overhead = xhci_get_largest_overhead(
2256 &bw_table->interval_bw[i]);
2257 if (interval_overhead > overhead)
2258 overhead = interval_overhead;
2260 /* How many packets can we evenly distribute across
2261 * (1 << (i + 1)) possible scheduling opportunities?
2263 packets_transmitted = packets_remaining >> (i + 1);
2265 /* Add in the bandwidth used for those scheduled packets */
2266 bw_added = packets_transmitted * (overhead + packet_size);
2268 /* How many packets do we have remaining to transmit? */
2269 packets_remaining = packets_remaining % (1 << (i + 1));
2271 /* What largest max packet size should those packets have? */
2272 /* If we've transmitted all packets, don't carry over the
2273 * largest packet size.
2275 if (packets_remaining == 0) {
2278 } else if (packets_transmitted > 0) {
2279 /* Otherwise if we do have remaining packets, and we've
2280 * scheduled some packets in this interval, take the
2281 * largest max packet size from endpoints with this
2284 packet_size = largest_mps;
2285 overhead = interval_overhead;
2287 /* Otherwise carry over packet_size and overhead from the last
2288 * time we had a remainder.
2290 bw_used += bw_added;
2291 if (bw_used > max_bandwidth) {
2292 xhci_warn(xhci, "Not enough bandwidth. "
2293 "Proposed: %u, Max: %u\n",
2294 bw_used, max_bandwidth);
2299 * Ok, we know we have some packets left over after even-handedly
2300 * scheduling interval 15. We don't know which microframes they will
2301 * fit into, so we over-schedule and say they will be scheduled every
2304 if (packets_remaining > 0)
2305 bw_used += overhead + packet_size;
2307 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2308 unsigned int port_index = virt_dev->real_port - 1;
2310 /* OK, we're manipulating a HS device attached to a
2311 * root port bandwidth domain. Include the number of active TTs
2312 * in the bandwidth used.
2314 bw_used += TT_HS_OVERHEAD *
2315 xhci->rh_bw[port_index].num_active_tts;
2318 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2319 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2320 "Available: %u " "percent",
2321 bw_used, max_bandwidth, bw_reserved,
2322 (max_bandwidth - bw_used - bw_reserved) * 100 /
2325 bw_used += bw_reserved;
2326 if (bw_used > max_bandwidth) {
2327 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2328 bw_used, max_bandwidth);
2332 bw_table->bw_used = bw_used;
2336 static bool xhci_is_async_ep(unsigned int ep_type)
2338 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2339 ep_type != ISOC_IN_EP &&
2340 ep_type != INT_IN_EP);
2343 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2345 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2348 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2350 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2352 if (ep_bw->ep_interval == 0)
2353 return SS_OVERHEAD_BURST +
2354 (ep_bw->mult * ep_bw->num_packets *
2355 (SS_OVERHEAD + mps));
2356 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2357 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2358 1 << ep_bw->ep_interval);
2362 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2363 struct xhci_bw_info *ep_bw,
2364 struct xhci_interval_bw_table *bw_table,
2365 struct usb_device *udev,
2366 struct xhci_virt_ep *virt_ep,
2367 struct xhci_tt_bw_info *tt_info)
2369 struct xhci_interval_bw *interval_bw;
2370 int normalized_interval;
2372 if (xhci_is_async_ep(ep_bw->type))
2375 if (udev->speed == USB_SPEED_SUPER) {
2376 if (xhci_is_sync_in_ep(ep_bw->type))
2377 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2378 xhci_get_ss_bw_consumed(ep_bw);
2380 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2381 xhci_get_ss_bw_consumed(ep_bw);
2385 /* SuperSpeed endpoints never get added to intervals in the table, so
2386 * this check is only valid for HS/FS/LS devices.
2388 if (list_empty(&virt_ep->bw_endpoint_list))
2390 /* For LS/FS devices, we need to translate the interval expressed in
2391 * microframes to frames.
2393 if (udev->speed == USB_SPEED_HIGH)
2394 normalized_interval = ep_bw->ep_interval;
2396 normalized_interval = ep_bw->ep_interval - 3;
2398 if (normalized_interval == 0)
2399 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2400 interval_bw = &bw_table->interval_bw[normalized_interval];
2401 interval_bw->num_packets -= ep_bw->num_packets;
2402 switch (udev->speed) {
2404 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2406 case USB_SPEED_FULL:
2407 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2409 case USB_SPEED_HIGH:
2410 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2412 case USB_SPEED_SUPER:
2413 case USB_SPEED_UNKNOWN:
2414 case USB_SPEED_WIRELESS:
2415 /* Should never happen because only LS/FS/HS endpoints will get
2416 * added to the endpoint list.
2421 tt_info->active_eps -= 1;
2422 list_del_init(&virt_ep->bw_endpoint_list);
2425 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2426 struct xhci_bw_info *ep_bw,
2427 struct xhci_interval_bw_table *bw_table,
2428 struct usb_device *udev,
2429 struct xhci_virt_ep *virt_ep,
2430 struct xhci_tt_bw_info *tt_info)
2432 struct xhci_interval_bw *interval_bw;
2433 struct xhci_virt_ep *smaller_ep;
2434 int normalized_interval;
2436 if (xhci_is_async_ep(ep_bw->type))
2439 if (udev->speed == USB_SPEED_SUPER) {
2440 if (xhci_is_sync_in_ep(ep_bw->type))
2441 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2442 xhci_get_ss_bw_consumed(ep_bw);
2444 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2445 xhci_get_ss_bw_consumed(ep_bw);
2449 /* For LS/FS devices, we need to translate the interval expressed in
2450 * microframes to frames.
2452 if (udev->speed == USB_SPEED_HIGH)
2453 normalized_interval = ep_bw->ep_interval;
2455 normalized_interval = ep_bw->ep_interval - 3;
2457 if (normalized_interval == 0)
2458 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2459 interval_bw = &bw_table->interval_bw[normalized_interval];
2460 interval_bw->num_packets += ep_bw->num_packets;
2461 switch (udev->speed) {
2463 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2465 case USB_SPEED_FULL:
2466 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2468 case USB_SPEED_HIGH:
2469 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2471 case USB_SPEED_SUPER:
2472 case USB_SPEED_UNKNOWN:
2473 case USB_SPEED_WIRELESS:
2474 /* Should never happen because only LS/FS/HS endpoints will get
2475 * added to the endpoint list.
2481 tt_info->active_eps += 1;
2482 /* Insert the endpoint into the list, largest max packet size first. */
2483 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2485 if (ep_bw->max_packet_size >=
2486 smaller_ep->bw_info.max_packet_size) {
2487 /* Add the new ep before the smaller endpoint */
2488 list_add_tail(&virt_ep->bw_endpoint_list,
2489 &smaller_ep->bw_endpoint_list);
2493 /* Add the new endpoint at the end of the list. */
2494 list_add_tail(&virt_ep->bw_endpoint_list,
2495 &interval_bw->endpoints);
2498 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2499 struct xhci_virt_device *virt_dev,
2502 struct xhci_root_port_bw_info *rh_bw_info;
2503 if (!virt_dev->tt_info)
2506 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2507 if (old_active_eps == 0 &&
2508 virt_dev->tt_info->active_eps != 0) {
2509 rh_bw_info->num_active_tts += 1;
2510 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2511 } else if (old_active_eps != 0 &&
2512 virt_dev->tt_info->active_eps == 0) {
2513 rh_bw_info->num_active_tts -= 1;
2514 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2518 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2519 struct xhci_virt_device *virt_dev,
2520 struct xhci_container_ctx *in_ctx)
2522 struct xhci_bw_info ep_bw_info[31];
2524 struct xhci_input_control_ctx *ctrl_ctx;
2525 int old_active_eps = 0;
2527 if (virt_dev->tt_info)
2528 old_active_eps = virt_dev->tt_info->active_eps;
2530 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2532 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2537 for (i = 0; i < 31; i++) {
2538 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2541 /* Make a copy of the BW info in case we need to revert this */
2542 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2543 sizeof(ep_bw_info[i]));
2544 /* Drop the endpoint from the interval table if the endpoint is
2545 * being dropped or changed.
2547 if (EP_IS_DROPPED(ctrl_ctx, i))
2548 xhci_drop_ep_from_interval_table(xhci,
2549 &virt_dev->eps[i].bw_info,
2555 /* Overwrite the information stored in the endpoints' bw_info */
2556 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2557 for (i = 0; i < 31; i++) {
2558 /* Add any changed or added endpoints to the interval table */
2559 if (EP_IS_ADDED(ctrl_ctx, i))
2560 xhci_add_ep_to_interval_table(xhci,
2561 &virt_dev->eps[i].bw_info,
2568 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2569 /* Ok, this fits in the bandwidth we have.
2570 * Update the number of active TTs.
2572 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2576 /* We don't have enough bandwidth for this, revert the stored info. */
2577 for (i = 0; i < 31; i++) {
2578 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2581 /* Drop the new copies of any added or changed endpoints from
2582 * the interval table.
2584 if (EP_IS_ADDED(ctrl_ctx, i)) {
2585 xhci_drop_ep_from_interval_table(xhci,
2586 &virt_dev->eps[i].bw_info,
2592 /* Revert the endpoint back to its old information */
2593 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2594 sizeof(ep_bw_info[i]));
2595 /* Add any changed or dropped endpoints back into the table */
2596 if (EP_IS_DROPPED(ctrl_ctx, i))
2597 xhci_add_ep_to_interval_table(xhci,
2598 &virt_dev->eps[i].bw_info,
2608 /* Issue a configure endpoint command or evaluate context command
2609 * and wait for it to finish.
2611 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2612 struct usb_device *udev,
2613 struct xhci_command *command,
2614 bool ctx_change, bool must_succeed)
2618 unsigned long flags;
2619 struct xhci_container_ctx *in_ctx;
2620 struct xhci_input_control_ctx *ctrl_ctx;
2621 struct completion *cmd_completion;
2623 struct xhci_virt_device *virt_dev;
2624 union xhci_trb *cmd_trb;
2626 spin_lock_irqsave(&xhci->lock, flags);
2627 virt_dev = xhci->devs[udev->slot_id];
2630 in_ctx = command->in_ctx;
2632 in_ctx = virt_dev->in_ctx;
2633 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2635 spin_unlock_irqrestore(&xhci->lock, flags);
2636 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2641 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2642 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2643 spin_unlock_irqrestore(&xhci->lock, flags);
2644 xhci_warn(xhci, "Not enough host resources, "
2645 "active endpoint contexts = %u\n",
2646 xhci->num_active_eps);
2649 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2650 xhci_reserve_bandwidth(xhci, virt_dev, in_ctx)) {
2651 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2652 xhci_free_host_resources(xhci, ctrl_ctx);
2653 spin_unlock_irqrestore(&xhci->lock, flags);
2654 xhci_warn(xhci, "Not enough bandwidth\n");
2659 cmd_completion = command->completion;
2660 cmd_status = &command->status;
2661 command->command_trb = xhci_find_next_enqueue(xhci->cmd_ring);
2662 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2664 cmd_completion = &virt_dev->cmd_completion;
2665 cmd_status = &virt_dev->cmd_status;
2667 init_completion(cmd_completion);
2669 cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring);
2671 ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
2672 udev->slot_id, must_succeed);
2674 ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
2675 udev->slot_id, must_succeed);
2678 list_del(&command->cmd_list);
2679 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2680 xhci_free_host_resources(xhci, ctrl_ctx);
2681 spin_unlock_irqrestore(&xhci->lock, flags);
2682 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2683 "FIXME allocate a new ring segment");
2686 xhci_ring_cmd_db(xhci);
2687 spin_unlock_irqrestore(&xhci->lock, flags);
2689 /* Wait for the configure endpoint command to complete */
2690 timeleft = wait_for_completion_interruptible_timeout(
2692 XHCI_CMD_DEFAULT_TIMEOUT);
2693 if (timeleft <= 0) {
2694 xhci_warn(xhci, "%s while waiting for %s command\n",
2695 timeleft == 0 ? "Timeout" : "Signal",
2697 "configure endpoint" :
2698 "evaluate context");
2699 /* cancel the configure endpoint command */
2700 ret = xhci_cancel_cmd(xhci, command, cmd_trb);
2707 ret = xhci_configure_endpoint_result(xhci, udev, cmd_status);
2709 ret = xhci_evaluate_context_result(xhci, udev, cmd_status);
2711 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2712 spin_lock_irqsave(&xhci->lock, flags);
2713 /* If the command failed, remove the reserved resources.
2714 * Otherwise, clean up the estimate to include dropped eps.
2717 xhci_free_host_resources(xhci, ctrl_ctx);
2719 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2720 spin_unlock_irqrestore(&xhci->lock, flags);
2725 /* Called after one or more calls to xhci_add_endpoint() or
2726 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2727 * to call xhci_reset_bandwidth().
2729 * Since we are in the middle of changing either configuration or
2730 * installing a new alt setting, the USB core won't allow URBs to be
2731 * enqueued for any endpoint on the old config or interface. Nothing
2732 * else should be touching the xhci->devs[slot_id] structure, so we
2733 * don't need to take the xhci->lock for manipulating that.
2735 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2739 struct xhci_hcd *xhci;
2740 struct xhci_virt_device *virt_dev;
2741 struct xhci_input_control_ctx *ctrl_ctx;
2742 struct xhci_slot_ctx *slot_ctx;
2744 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2747 xhci = hcd_to_xhci(hcd);
2748 if (xhci->xhc_state & XHCI_STATE_DYING)
2751 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2752 virt_dev = xhci->devs[udev->slot_id];
2754 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2755 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
2757 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2761 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2762 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2763 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2765 /* Don't issue the command if there's no endpoints to update. */
2766 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2767 ctrl_ctx->drop_flags == 0)
2770 xhci_dbg(xhci, "New Input Control Context:\n");
2771 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2772 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2773 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2775 ret = xhci_configure_endpoint(xhci, udev, NULL,
2778 /* Callee should call reset_bandwidth() */
2782 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2783 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2784 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2786 /* Free any rings that were dropped, but not changed. */
2787 for (i = 1; i < 31; ++i) {
2788 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2789 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1))))
2790 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2792 xhci_zero_in_ctx(xhci, virt_dev);
2794 * Install any rings for completely new endpoints or changed endpoints,
2795 * and free or cache any old rings from changed endpoints.
2797 for (i = 1; i < 31; ++i) {
2798 if (!virt_dev->eps[i].new_ring)
2800 /* Only cache or free the old ring if it exists.
2801 * It may not if this is the first add of an endpoint.
2803 if (virt_dev->eps[i].ring) {
2804 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2806 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2807 virt_dev->eps[i].new_ring = NULL;
2813 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2815 struct xhci_hcd *xhci;
2816 struct xhci_virt_device *virt_dev;
2819 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2822 xhci = hcd_to_xhci(hcd);
2824 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2825 virt_dev = xhci->devs[udev->slot_id];
2826 /* Free any rings allocated for added endpoints */
2827 for (i = 0; i < 31; ++i) {
2828 if (virt_dev->eps[i].new_ring) {
2829 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2830 virt_dev->eps[i].new_ring = NULL;
2833 xhci_zero_in_ctx(xhci, virt_dev);
2836 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2837 struct xhci_container_ctx *in_ctx,
2838 struct xhci_container_ctx *out_ctx,
2839 struct xhci_input_control_ctx *ctrl_ctx,
2840 u32 add_flags, u32 drop_flags)
2842 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2843 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2844 xhci_slot_copy(xhci, in_ctx, out_ctx);
2845 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2847 xhci_dbg(xhci, "Input Context:\n");
2848 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2851 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2852 unsigned int slot_id, unsigned int ep_index,
2853 struct xhci_dequeue_state *deq_state)
2855 struct xhci_input_control_ctx *ctrl_ctx;
2856 struct xhci_container_ctx *in_ctx;
2857 struct xhci_ep_ctx *ep_ctx;
2861 in_ctx = xhci->devs[slot_id]->in_ctx;
2862 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2864 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2869 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2870 xhci->devs[slot_id]->out_ctx, ep_index);
2871 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2872 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2873 deq_state->new_deq_ptr);
2875 xhci_warn(xhci, "WARN Cannot submit config ep after "
2876 "reset ep command\n");
2877 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2878 deq_state->new_deq_seg,
2879 deq_state->new_deq_ptr);
2882 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2884 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2885 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2886 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2887 added_ctxs, added_ctxs);
2890 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2891 struct usb_device *udev, unsigned int ep_index)
2893 struct xhci_dequeue_state deq_state;
2894 struct xhci_virt_ep *ep;
2896 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2897 "Cleaning up stalled endpoint ring");
2898 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2899 /* We need to move the HW's dequeue pointer past this TD,
2900 * or it will attempt to resend it on the next doorbell ring.
2902 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2903 ep_index, ep->stopped_stream, ep->stopped_td,
2906 /* HW with the reset endpoint quirk will use the saved dequeue state to
2907 * issue a configure endpoint command later.
2909 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2910 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2911 "Queueing new dequeue state");
2912 xhci_queue_new_dequeue_state(xhci, udev->slot_id,
2913 ep_index, ep->stopped_stream, &deq_state);
2915 /* Better hope no one uses the input context between now and the
2916 * reset endpoint completion!
2917 * XXX: No idea how this hardware will react when stream rings
2920 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2921 "Setting up input context for "
2922 "configure endpoint command");
2923 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2924 ep_index, &deq_state);
2928 /* Deal with stalled endpoints. The core should have sent the control message
2929 * to clear the halt condition. However, we need to make the xHCI hardware
2930 * reset its sequence number, since a device will expect a sequence number of
2931 * zero after the halt condition is cleared.
2932 * Context: in_interrupt
2934 void xhci_endpoint_reset(struct usb_hcd *hcd,
2935 struct usb_host_endpoint *ep)
2937 struct xhci_hcd *xhci;
2938 struct usb_device *udev;
2939 unsigned int ep_index;
2940 unsigned long flags;
2942 struct xhci_virt_ep *virt_ep;
2944 xhci = hcd_to_xhci(hcd);
2945 udev = (struct usb_device *) ep->hcpriv;
2946 /* Called with a root hub endpoint (or an endpoint that wasn't added
2947 * with xhci_add_endpoint()
2951 ep_index = xhci_get_endpoint_index(&ep->desc);
2952 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2953 if (!virt_ep->stopped_td) {
2954 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2955 "Endpoint 0x%x not halted, refusing to reset.",
2956 ep->desc.bEndpointAddress);
2959 if (usb_endpoint_xfer_control(&ep->desc)) {
2960 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2961 "Control endpoint stall already handled.");
2965 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2966 "Queueing reset endpoint command");
2967 spin_lock_irqsave(&xhci->lock, flags);
2968 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
2970 * Can't change the ring dequeue pointer until it's transitioned to the
2971 * stopped state, which is only upon a successful reset endpoint
2972 * command. Better hope that last command worked!
2975 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2976 kfree(virt_ep->stopped_td);
2977 xhci_ring_cmd_db(xhci);
2979 virt_ep->stopped_td = NULL;
2980 virt_ep->stopped_stream = 0;
2981 spin_unlock_irqrestore(&xhci->lock, flags);
2984 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2987 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2988 struct usb_device *udev, struct usb_host_endpoint *ep,
2989 unsigned int slot_id)
2992 unsigned int ep_index;
2993 unsigned int ep_state;
2997 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
3000 if (ep->ss_ep_comp.bmAttributes == 0) {
3001 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
3002 " descriptor for ep 0x%x does not support streams\n",
3003 ep->desc.bEndpointAddress);
3007 ep_index = xhci_get_endpoint_index(&ep->desc);
3008 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3009 if (ep_state & EP_HAS_STREAMS ||
3010 ep_state & EP_GETTING_STREAMS) {
3011 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3012 "already has streams set up.\n",
3013 ep->desc.bEndpointAddress);
3014 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3015 "dynamic stream context array reallocation.\n");
3018 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3019 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3020 "endpoint 0x%x; URBs are pending.\n",
3021 ep->desc.bEndpointAddress);
3027 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3028 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3030 unsigned int max_streams;
3032 /* The stream context array size must be a power of two */
3033 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3035 * Find out how many primary stream array entries the host controller
3036 * supports. Later we may use secondary stream arrays (similar to 2nd
3037 * level page entries), but that's an optional feature for xHCI host
3038 * controllers. xHCs must support at least 4 stream IDs.
3040 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3041 if (*num_stream_ctxs > max_streams) {
3042 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3044 *num_stream_ctxs = max_streams;
3045 *num_streams = max_streams;
3049 /* Returns an error code if one of the endpoint already has streams.
3050 * This does not change any data structures, it only checks and gathers
3053 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3054 struct usb_device *udev,
3055 struct usb_host_endpoint **eps, unsigned int num_eps,
3056 unsigned int *num_streams, u32 *changed_ep_bitmask)
3058 unsigned int max_streams;
3059 unsigned int endpoint_flag;
3063 for (i = 0; i < num_eps; i++) {
3064 ret = xhci_check_streams_endpoint(xhci, udev,
3065 eps[i], udev->slot_id);
3069 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3070 if (max_streams < (*num_streams - 1)) {
3071 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3072 eps[i]->desc.bEndpointAddress,
3074 *num_streams = max_streams+1;
3077 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3078 if (*changed_ep_bitmask & endpoint_flag)
3080 *changed_ep_bitmask |= endpoint_flag;
3085 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3086 struct usb_device *udev,
3087 struct usb_host_endpoint **eps, unsigned int num_eps)
3089 u32 changed_ep_bitmask = 0;
3090 unsigned int slot_id;
3091 unsigned int ep_index;
3092 unsigned int ep_state;
3095 slot_id = udev->slot_id;
3096 if (!xhci->devs[slot_id])
3099 for (i = 0; i < num_eps; i++) {
3100 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3101 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3102 /* Are streams already being freed for the endpoint? */
3103 if (ep_state & EP_GETTING_NO_STREAMS) {
3104 xhci_warn(xhci, "WARN Can't disable streams for "
3106 "streams are being disabled already\n",
3107 eps[i]->desc.bEndpointAddress);
3110 /* Are there actually any streams to free? */
3111 if (!(ep_state & EP_HAS_STREAMS) &&
3112 !(ep_state & EP_GETTING_STREAMS)) {
3113 xhci_warn(xhci, "WARN Can't disable streams for "
3115 "streams are already disabled!\n",
3116 eps[i]->desc.bEndpointAddress);
3117 xhci_warn(xhci, "WARN xhci_free_streams() called "
3118 "with non-streams endpoint\n");
3121 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3123 return changed_ep_bitmask;
3127 * The USB device drivers use this function (though the HCD interface in USB
3128 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3129 * coordinate mass storage command queueing across multiple endpoints (basically
3130 * a stream ID == a task ID).
3132 * Setting up streams involves allocating the same size stream context array
3133 * for each endpoint and issuing a configure endpoint command for all endpoints.
3135 * Don't allow the call to succeed if one endpoint only supports one stream
3136 * (which means it doesn't support streams at all).
3138 * Drivers may get less stream IDs than they asked for, if the host controller
3139 * hardware or endpoints claim they can't support the number of requested
3142 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3143 struct usb_host_endpoint **eps, unsigned int num_eps,
3144 unsigned int num_streams, gfp_t mem_flags)
3147 struct xhci_hcd *xhci;
3148 struct xhci_virt_device *vdev;
3149 struct xhci_command *config_cmd;
3150 struct xhci_input_control_ctx *ctrl_ctx;
3151 unsigned int ep_index;
3152 unsigned int num_stream_ctxs;
3153 unsigned long flags;
3154 u32 changed_ep_bitmask = 0;
3159 /* Add one to the number of streams requested to account for
3160 * stream 0 that is reserved for xHCI usage.
3163 xhci = hcd_to_xhci(hcd);
3164 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3167 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3169 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3172 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3174 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3176 xhci_free_command(xhci, config_cmd);
3180 /* Check to make sure all endpoints are not already configured for
3181 * streams. While we're at it, find the maximum number of streams that
3182 * all the endpoints will support and check for duplicate endpoints.
3184 spin_lock_irqsave(&xhci->lock, flags);
3185 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3186 num_eps, &num_streams, &changed_ep_bitmask);
3188 xhci_free_command(xhci, config_cmd);
3189 spin_unlock_irqrestore(&xhci->lock, flags);
3192 if (num_streams <= 1) {
3193 xhci_warn(xhci, "WARN: endpoints can't handle "
3194 "more than one stream.\n");
3195 xhci_free_command(xhci, config_cmd);
3196 spin_unlock_irqrestore(&xhci->lock, flags);
3199 vdev = xhci->devs[udev->slot_id];
3200 /* Mark each endpoint as being in transition, so
3201 * xhci_urb_enqueue() will reject all URBs.
3203 for (i = 0; i < num_eps; i++) {
3204 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3205 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3207 spin_unlock_irqrestore(&xhci->lock, flags);
3209 /* Setup internal data structures and allocate HW data structures for
3210 * streams (but don't install the HW structures in the input context
3211 * until we're sure all memory allocation succeeded).
3213 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3214 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3215 num_stream_ctxs, num_streams);
3217 for (i = 0; i < num_eps; i++) {
3218 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3219 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3221 num_streams, mem_flags);
3222 if (!vdev->eps[ep_index].stream_info)
3224 /* Set maxPstreams in endpoint context and update deq ptr to
3225 * point to stream context array. FIXME
3229 /* Set up the input context for a configure endpoint command. */
3230 for (i = 0; i < num_eps; i++) {
3231 struct xhci_ep_ctx *ep_ctx;
3233 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3234 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3236 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3237 vdev->out_ctx, ep_index);
3238 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3239 vdev->eps[ep_index].stream_info);
3241 /* Tell the HW to drop its old copy of the endpoint context info
3242 * and add the updated copy from the input context.
3244 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3245 vdev->out_ctx, ctrl_ctx,
3246 changed_ep_bitmask, changed_ep_bitmask);
3248 /* Issue and wait for the configure endpoint command */
3249 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3252 /* xHC rejected the configure endpoint command for some reason, so we
3253 * leave the old ring intact and free our internal streams data
3259 spin_lock_irqsave(&xhci->lock, flags);
3260 for (i = 0; i < num_eps; i++) {
3261 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3262 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3263 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3264 udev->slot_id, ep_index);
3265 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3267 xhci_free_command(xhci, config_cmd);
3268 spin_unlock_irqrestore(&xhci->lock, flags);
3270 /* Subtract 1 for stream 0, which drivers can't use */
3271 return num_streams - 1;
3274 /* If it didn't work, free the streams! */
3275 for (i = 0; i < num_eps; i++) {
3276 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3277 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3278 vdev->eps[ep_index].stream_info = NULL;
3279 /* FIXME Unset maxPstreams in endpoint context and
3280 * update deq ptr to point to normal string ring.
3282 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3283 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3284 xhci_endpoint_zero(xhci, vdev, eps[i]);
3286 xhci_free_command(xhci, config_cmd);
3290 /* Transition the endpoint from using streams to being a "normal" endpoint
3293 * Modify the endpoint context state, submit a configure endpoint command,
3294 * and free all endpoint rings for streams if that completes successfully.
3296 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3297 struct usb_host_endpoint **eps, unsigned int num_eps,
3301 struct xhci_hcd *xhci;
3302 struct xhci_virt_device *vdev;
3303 struct xhci_command *command;
3304 struct xhci_input_control_ctx *ctrl_ctx;
3305 unsigned int ep_index;
3306 unsigned long flags;
3307 u32 changed_ep_bitmask;
3309 xhci = hcd_to_xhci(hcd);
3310 vdev = xhci->devs[udev->slot_id];
3312 /* Set up a configure endpoint command to remove the streams rings */
3313 spin_lock_irqsave(&xhci->lock, flags);
3314 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3315 udev, eps, num_eps);
3316 if (changed_ep_bitmask == 0) {
3317 spin_unlock_irqrestore(&xhci->lock, flags);
3321 /* Use the xhci_command structure from the first endpoint. We may have
3322 * allocated too many, but the driver may call xhci_free_streams() for
3323 * each endpoint it grouped into one call to xhci_alloc_streams().
3325 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3326 command = vdev->eps[ep_index].stream_info->free_streams_command;
3327 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3329 spin_unlock_irqrestore(&xhci->lock, flags);
3330 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3335 for (i = 0; i < num_eps; i++) {
3336 struct xhci_ep_ctx *ep_ctx;
3338 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3339 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3340 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3341 EP_GETTING_NO_STREAMS;
3343 xhci_endpoint_copy(xhci, command->in_ctx,
3344 vdev->out_ctx, ep_index);
3345 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3346 &vdev->eps[ep_index]);
3348 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3349 vdev->out_ctx, ctrl_ctx,
3350 changed_ep_bitmask, changed_ep_bitmask);
3351 spin_unlock_irqrestore(&xhci->lock, flags);
3353 /* Issue and wait for the configure endpoint command,
3354 * which must succeed.
3356 ret = xhci_configure_endpoint(xhci, udev, command,
3359 /* xHC rejected the configure endpoint command for some reason, so we
3360 * leave the streams rings intact.
3365 spin_lock_irqsave(&xhci->lock, flags);
3366 for (i = 0; i < num_eps; i++) {
3367 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3368 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3369 vdev->eps[ep_index].stream_info = NULL;
3370 /* FIXME Unset maxPstreams in endpoint context and
3371 * update deq ptr to point to normal string ring.
3373 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3374 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3376 spin_unlock_irqrestore(&xhci->lock, flags);
3382 * Deletes endpoint resources for endpoints that were active before a Reset
3383 * Device command, or a Disable Slot command. The Reset Device command leaves
3384 * the control endpoint intact, whereas the Disable Slot command deletes it.
3386 * Must be called with xhci->lock held.
3388 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3389 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3392 unsigned int num_dropped_eps = 0;
3393 unsigned int drop_flags = 0;
3395 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3396 if (virt_dev->eps[i].ring) {
3397 drop_flags |= 1 << i;
3401 xhci->num_active_eps -= num_dropped_eps;
3402 if (num_dropped_eps)
3403 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3404 "Dropped %u ep ctxs, flags = 0x%x, "
3406 num_dropped_eps, drop_flags,
3407 xhci->num_active_eps);
3411 * This submits a Reset Device Command, which will set the device state to 0,
3412 * set the device address to 0, and disable all the endpoints except the default
3413 * control endpoint. The USB core should come back and call
3414 * xhci_address_device(), and then re-set up the configuration. If this is
3415 * called because of a usb_reset_and_verify_device(), then the old alternate
3416 * settings will be re-installed through the normal bandwidth allocation
3419 * Wait for the Reset Device command to finish. Remove all structures
3420 * associated with the endpoints that were disabled. Clear the input device
3421 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3423 * If the virt_dev to be reset does not exist or does not match the udev,
3424 * it means the device is lost, possibly due to the xHC restore error and
3425 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3426 * re-allocate the device.
3428 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3431 unsigned long flags;
3432 struct xhci_hcd *xhci;
3433 unsigned int slot_id;
3434 struct xhci_virt_device *virt_dev;
3435 struct xhci_command *reset_device_cmd;
3437 int last_freed_endpoint;
3438 struct xhci_slot_ctx *slot_ctx;
3439 int old_active_eps = 0;
3441 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3444 xhci = hcd_to_xhci(hcd);
3445 slot_id = udev->slot_id;
3446 virt_dev = xhci->devs[slot_id];
3448 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3449 "not exist. Re-allocate the device\n", slot_id);
3450 ret = xhci_alloc_dev(hcd, udev);
3457 if (virt_dev->udev != udev) {
3458 /* If the virt_dev and the udev does not match, this virt_dev
3459 * may belong to another udev.
3460 * Re-allocate the device.
3462 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3463 "not match the udev. Re-allocate the device\n",
3465 ret = xhci_alloc_dev(hcd, udev);
3472 /* If device is not setup, there is no point in resetting it */
3473 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3474 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3475 SLOT_STATE_DISABLED)
3478 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3479 /* Allocate the command structure that holds the struct completion.
3480 * Assume we're in process context, since the normal device reset
3481 * process has to wait for the device anyway. Storage devices are
3482 * reset as part of error handling, so use GFP_NOIO instead of
3485 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3486 if (!reset_device_cmd) {
3487 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3491 /* Attempt to submit the Reset Device command to the command ring */
3492 spin_lock_irqsave(&xhci->lock, flags);
3493 reset_device_cmd->command_trb = xhci_find_next_enqueue(xhci->cmd_ring);
3495 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3496 ret = xhci_queue_reset_device(xhci, slot_id);
3498 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3499 list_del(&reset_device_cmd->cmd_list);
3500 spin_unlock_irqrestore(&xhci->lock, flags);
3501 goto command_cleanup;
3503 xhci_ring_cmd_db(xhci);
3504 spin_unlock_irqrestore(&xhci->lock, flags);
3506 /* Wait for the Reset Device command to finish */
3507 timeleft = wait_for_completion_interruptible_timeout(
3508 reset_device_cmd->completion,
3509 XHCI_CMD_DEFAULT_TIMEOUT);
3510 if (timeleft <= 0) {
3511 xhci_warn(xhci, "%s while waiting for reset device command\n",
3512 timeleft == 0 ? "Timeout" : "Signal");
3513 spin_lock_irqsave(&xhci->lock, flags);
3514 /* The timeout might have raced with the event ring handler, so
3515 * only delete from the list if the item isn't poisoned.
3517 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3518 list_del(&reset_device_cmd->cmd_list);
3519 spin_unlock_irqrestore(&xhci->lock, flags);
3521 goto command_cleanup;
3524 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3525 * unless we tried to reset a slot ID that wasn't enabled,
3526 * or the device wasn't in the addressed or configured state.
3528 ret = reset_device_cmd->status;
3530 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3531 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3532 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3534 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3535 xhci_dbg(xhci, "Not freeing device rings.\n");
3536 /* Don't treat this as an error. May change my mind later. */
3538 goto command_cleanup;
3540 xhci_dbg(xhci, "Successful reset device command.\n");
3543 if (xhci_is_vendor_info_code(xhci, ret))
3545 xhci_warn(xhci, "Unknown completion code %u for "
3546 "reset device command.\n", ret);
3548 goto command_cleanup;
3551 /* Free up host controller endpoint resources */
3552 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3553 spin_lock_irqsave(&xhci->lock, flags);
3554 /* Don't delete the default control endpoint resources */
3555 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3556 spin_unlock_irqrestore(&xhci->lock, flags);
3559 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3560 last_freed_endpoint = 1;
3561 for (i = 1; i < 31; ++i) {
3562 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3564 if (ep->ep_state & EP_HAS_STREAMS) {
3565 xhci_free_stream_info(xhci, ep->stream_info);
3566 ep->stream_info = NULL;
3567 ep->ep_state &= ~EP_HAS_STREAMS;
3571 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3572 last_freed_endpoint = i;
3574 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3575 xhci_drop_ep_from_interval_table(xhci,
3576 &virt_dev->eps[i].bw_info,
3581 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3583 /* If necessary, update the number of active TTs on this root port */
3584 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3586 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3587 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3591 xhci_free_command(xhci, reset_device_cmd);
3596 * At this point, the struct usb_device is about to go away, the device has
3597 * disconnected, and all traffic has been stopped and the endpoints have been
3598 * disabled. Free any HC data structures associated with that device.
3600 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3602 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3603 struct xhci_virt_device *virt_dev;
3604 unsigned long flags;
3608 #ifndef CONFIG_USB_DEFAULT_PERSIST
3610 * We called pm_runtime_get_noresume when the device was attached.
3611 * Decrement the counter here to allow controller to runtime suspend
3612 * if no devices remain.
3614 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3615 pm_runtime_put_noidle(hcd->self.controller);
3618 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3619 /* If the host is halted due to driver unload, we still need to free the
3622 if (ret <= 0 && ret != -ENODEV)
3625 virt_dev = xhci->devs[udev->slot_id];
3627 /* Stop any wayward timer functions (which may grab the lock) */
3628 for (i = 0; i < 31; ++i) {
3629 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3630 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3633 spin_lock_irqsave(&xhci->lock, flags);
3634 /* Don't disable the slot if the host controller is dead. */
3635 state = readl(&xhci->op_regs->status);
3636 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3637 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3638 xhci_free_virt_device(xhci, udev->slot_id);
3639 spin_unlock_irqrestore(&xhci->lock, flags);
3643 if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
3644 spin_unlock_irqrestore(&xhci->lock, flags);
3645 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3648 xhci_ring_cmd_db(xhci);
3649 spin_unlock_irqrestore(&xhci->lock, flags);
3651 * Event command completion handler will free any data structures
3652 * associated with the slot. XXX Can free sleep?
3657 * Checks if we have enough host controller resources for the default control
3660 * Must be called with xhci->lock held.
3662 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3664 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3665 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3666 "Not enough ep ctxs: "
3667 "%u active, need to add 1, limit is %u.",
3668 xhci->num_active_eps, xhci->limit_active_eps);
3671 xhci->num_active_eps += 1;
3672 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3673 "Adding 1 ep ctx, %u now active.",
3674 xhci->num_active_eps);
3680 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3681 * timed out, or allocating memory failed. Returns 1 on success.
3683 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3685 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3686 unsigned long flags;
3689 union xhci_trb *cmd_trb;
3691 spin_lock_irqsave(&xhci->lock, flags);
3692 cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring);
3693 ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
3695 spin_unlock_irqrestore(&xhci->lock, flags);
3696 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3699 xhci_ring_cmd_db(xhci);
3700 spin_unlock_irqrestore(&xhci->lock, flags);
3702 /* XXX: how much time for xHC slot assignment? */
3703 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3704 XHCI_CMD_DEFAULT_TIMEOUT);
3705 if (timeleft <= 0) {
3706 xhci_warn(xhci, "%s while waiting for a slot\n",
3707 timeleft == 0 ? "Timeout" : "Signal");
3708 /* cancel the enable slot request */
3709 return xhci_cancel_cmd(xhci, NULL, cmd_trb);
3712 if (!xhci->slot_id) {
3713 xhci_err(xhci, "Error while assigning device slot ID\n");
3717 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3718 spin_lock_irqsave(&xhci->lock, flags);
3719 ret = xhci_reserve_host_control_ep_resources(xhci);
3721 spin_unlock_irqrestore(&xhci->lock, flags);
3722 xhci_warn(xhci, "Not enough host resources, "
3723 "active endpoint contexts = %u\n",
3724 xhci->num_active_eps);
3727 spin_unlock_irqrestore(&xhci->lock, flags);
3729 /* Use GFP_NOIO, since this function can be called from
3730 * xhci_discover_or_reset_device(), which may be called as part of
3731 * mass storage driver error handling.
3733 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3734 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3737 udev->slot_id = xhci->slot_id;
3739 #ifndef CONFIG_USB_DEFAULT_PERSIST
3741 * If resetting upon resume, we can't put the controller into runtime
3742 * suspend if there is a device attached.
3744 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3745 pm_runtime_get_noresume(hcd->self.controller);
3748 /* Is this a LS or FS device under a HS hub? */
3749 /* Hub or peripherial? */
3753 /* Disable slot, if we can do it without mem alloc */
3754 spin_lock_irqsave(&xhci->lock, flags);
3755 if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
3756 xhci_ring_cmd_db(xhci);
3757 spin_unlock_irqrestore(&xhci->lock, flags);
3762 * Issue an Address Device command and optionally send a corresponding
3763 * SetAddress request to the device.
3764 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3765 * we should only issue and wait on one address command at the same time.
3767 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3768 enum xhci_setup_dev setup)
3770 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3771 unsigned long flags;
3773 struct xhci_virt_device *virt_dev;
3775 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3776 struct xhci_slot_ctx *slot_ctx;
3777 struct xhci_input_control_ctx *ctrl_ctx;
3779 union xhci_trb *cmd_trb;
3781 if (!udev->slot_id) {
3782 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3783 "Bad Slot ID %d", udev->slot_id);
3787 virt_dev = xhci->devs[udev->slot_id];
3789 if (WARN_ON(!virt_dev)) {
3791 * In plug/unplug torture test with an NEC controller,
3792 * a zero-dereference was observed once due to virt_dev = 0.
3793 * Print useful debug rather than crash if it is observed again!
3795 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3800 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3801 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3803 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3808 * If this is the first Set Address since device plug-in or
3809 * virt_device realloaction after a resume with an xHCI power loss,
3810 * then set up the slot context.
3812 if (!slot_ctx->dev_info)
3813 xhci_setup_addressable_virt_dev(xhci, udev);
3814 /* Otherwise, update the control endpoint ring enqueue pointer. */
3816 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3817 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3818 ctrl_ctx->drop_flags = 0;
3820 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3821 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3822 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3823 le32_to_cpu(slot_ctx->dev_info) >> 27);
3825 spin_lock_irqsave(&xhci->lock, flags);
3826 cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring);
3827 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
3828 udev->slot_id, setup);
3830 spin_unlock_irqrestore(&xhci->lock, flags);
3831 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3832 "FIXME: allocate a command ring segment");
3835 xhci_ring_cmd_db(xhci);
3836 spin_unlock_irqrestore(&xhci->lock, flags);
3838 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3839 timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
3840 XHCI_CMD_DEFAULT_TIMEOUT);
3841 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3842 * the SetAddress() "recovery interval" required by USB and aborting the
3843 * command on a timeout.
3845 if (timeleft <= 0) {
3846 xhci_warn(xhci, "%s while waiting for setup %s command\n",
3847 timeleft == 0 ? "Timeout" : "Signal", act);
3848 /* cancel the address device command */
3849 ret = xhci_cancel_cmd(xhci, NULL, cmd_trb);
3855 switch (virt_dev->cmd_status) {
3856 case COMP_CTX_STATE:
3858 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3859 act, udev->slot_id);
3863 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3867 dev_warn(&udev->dev,
3868 "ERROR: Incompatible device for setup %s command\n", act);
3872 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3873 "Successful setup %s command", act);
3877 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3878 act, virt_dev->cmd_status);
3879 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3880 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3881 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3888 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3889 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3890 "Op regs DCBAA ptr = %#016llx", temp_64);
3891 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3892 "Slot ID %d dcbaa entry @%p = %#016llx",
3894 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3895 (unsigned long long)
3896 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3897 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3898 "Output Context DMA address = %#08llx",
3899 (unsigned long long)virt_dev->out_ctx->dma);
3900 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3901 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3902 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3903 le32_to_cpu(slot_ctx->dev_info) >> 27);
3904 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3905 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3907 * USB core uses address 1 for the roothubs, so we add one to the
3908 * address given back to us by the HC.
3910 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3911 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3912 le32_to_cpu(slot_ctx->dev_info) >> 27);
3913 /* Zero the input context control for later use */
3914 ctrl_ctx->add_flags = 0;
3915 ctrl_ctx->drop_flags = 0;
3917 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3918 "Internal device address = %d",
3919 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3924 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3926 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3929 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3931 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3935 * Transfer the port index into real index in the HW port status
3936 * registers. Caculate offset between the port's PORTSC register
3937 * and port status base. Divide the number of per port register
3938 * to get the real index. The raw port number bases 1.
3940 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3942 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3943 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3944 __le32 __iomem *addr;
3947 if (hcd->speed != HCD_USB3)
3948 addr = xhci->usb2_ports[port1 - 1];
3950 addr = xhci->usb3_ports[port1 - 1];
3952 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3957 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3958 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3960 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3961 struct usb_device *udev, u16 max_exit_latency)
3963 struct xhci_virt_device *virt_dev;
3964 struct xhci_command *command;
3965 struct xhci_input_control_ctx *ctrl_ctx;
3966 struct xhci_slot_ctx *slot_ctx;
3967 unsigned long flags;
3970 spin_lock_irqsave(&xhci->lock, flags);
3972 virt_dev = xhci->devs[udev->slot_id];
3975 * virt_dev might not exists yet if xHC resumed from hibernate (S4) and
3976 * xHC was re-initialized. Exit latency will be set later after
3977 * hub_port_finish_reset() is done and xhci->devs[] are re-allocated
3980 if (!virt_dev || max_exit_latency == virt_dev->current_mel) {
3981 spin_unlock_irqrestore(&xhci->lock, flags);
3985 /* Attempt to issue an Evaluate Context command to change the MEL. */
3986 command = xhci->lpm_command;
3987 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3989 spin_unlock_irqrestore(&xhci->lock, flags);
3990 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3995 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3996 spin_unlock_irqrestore(&xhci->lock, flags);
3998 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3999 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4000 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4001 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4003 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4004 "Set up evaluate context for LPM MEL change.");
4005 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4006 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4008 /* Issue and wait for the evaluate context command. */
4009 ret = xhci_configure_endpoint(xhci, udev, command,
4011 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4012 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4015 spin_lock_irqsave(&xhci->lock, flags);
4016 virt_dev->current_mel = max_exit_latency;
4017 spin_unlock_irqrestore(&xhci->lock, flags);
4022 #ifdef CONFIG_PM_RUNTIME
4024 /* BESL to HIRD Encoding array for USB2 LPM */
4025 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4026 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4028 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4029 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4030 struct usb_device *udev)
4032 int u2del, besl, besl_host;
4033 int besl_device = 0;
4036 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4037 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4039 if (field & USB_BESL_SUPPORT) {
4040 for (besl_host = 0; besl_host < 16; besl_host++) {
4041 if (xhci_besl_encoding[besl_host] >= u2del)
4044 /* Use baseline BESL value as default */
4045 if (field & USB_BESL_BASELINE_VALID)
4046 besl_device = USB_GET_BESL_BASELINE(field);
4047 else if (field & USB_BESL_DEEP_VALID)
4048 besl_device = USB_GET_BESL_DEEP(field);
4053 besl_host = (u2del - 51) / 75 + 1;
4056 besl = besl_host + besl_device;
4063 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4064 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4071 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4073 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4074 l1 = udev->l1_params.timeout / 256;
4076 /* device has preferred BESLD */
4077 if (field & USB_BESL_DEEP_VALID) {
4078 besld = USB_GET_BESL_DEEP(field);
4082 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4085 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4086 struct usb_device *udev, int enable)
4088 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4089 __le32 __iomem **port_array;
4090 __le32 __iomem *pm_addr, *hlpm_addr;
4091 u32 pm_val, hlpm_val, field;
4092 unsigned int port_num;
4093 unsigned long flags;
4094 int hird, exit_latency;
4097 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4101 if (!udev->parent || udev->parent->parent ||
4102 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4105 if (udev->usb2_hw_lpm_capable != 1)
4108 spin_lock_irqsave(&xhci->lock, flags);
4110 port_array = xhci->usb2_ports;
4111 port_num = udev->portnum - 1;
4112 pm_addr = port_array[port_num] + PORTPMSC;
4113 pm_val = readl(pm_addr);
4114 hlpm_addr = port_array[port_num] + PORTHLPMC;
4115 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4117 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4118 enable ? "enable" : "disable", port_num);
4121 /* Host supports BESL timeout instead of HIRD */
4122 if (udev->usb2_hw_lpm_besl_capable) {
4123 /* if device doesn't have a preferred BESL value use a
4124 * default one which works with mixed HIRD and BESL
4125 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4127 if ((field & USB_BESL_SUPPORT) &&
4128 (field & USB_BESL_BASELINE_VALID))
4129 hird = USB_GET_BESL_BASELINE(field);
4131 hird = udev->l1_params.besl;
4133 exit_latency = xhci_besl_encoding[hird];
4134 spin_unlock_irqrestore(&xhci->lock, flags);
4136 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4137 * input context for link powermanagement evaluate
4138 * context commands. It is protected by hcd->bandwidth
4139 * mutex and is shared by all devices. We need to set
4140 * the max ext latency in USB 2 BESL LPM as well, so
4141 * use the same mutex and xhci_change_max_exit_latency()
4143 mutex_lock(hcd->bandwidth_mutex);
4144 ret = xhci_change_max_exit_latency(xhci, udev,
4146 mutex_unlock(hcd->bandwidth_mutex);
4150 spin_lock_irqsave(&xhci->lock, flags);
4152 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4153 writel(hlpm_val, hlpm_addr);
4157 hird = xhci_calculate_hird_besl(xhci, udev);
4160 pm_val &= ~PORT_HIRD_MASK;
4161 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4162 writel(pm_val, pm_addr);
4163 pm_val = readl(pm_addr);
4165 writel(pm_val, pm_addr);
4169 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4170 writel(pm_val, pm_addr);
4173 if (udev->usb2_hw_lpm_besl_capable) {
4174 spin_unlock_irqrestore(&xhci->lock, flags);
4175 mutex_lock(hcd->bandwidth_mutex);
4176 xhci_change_max_exit_latency(xhci, udev, 0);
4177 mutex_unlock(hcd->bandwidth_mutex);
4182 spin_unlock_irqrestore(&xhci->lock, flags);
4186 /* check if a usb2 port supports a given extened capability protocol
4187 * only USB2 ports extended protocol capability values are cached.
4188 * Return 1 if capability is supported
4190 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4191 unsigned capability)
4193 u32 port_offset, port_count;
4196 for (i = 0; i < xhci->num_ext_caps; i++) {
4197 if (xhci->ext_caps[i] & capability) {
4198 /* port offsets starts at 1 */
4199 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4200 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4201 if (port >= port_offset &&
4202 port < port_offset + port_count)
4209 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4211 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4212 int portnum = udev->portnum - 1;
4214 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4218 /* we only support lpm for non-hub device connected to root hub yet */
4219 if (!udev->parent || udev->parent->parent ||
4220 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4223 if (xhci->hw_lpm_support == 1 &&
4224 xhci_check_usb2_port_capability(
4225 xhci, portnum, XHCI_HLC)) {
4226 udev->usb2_hw_lpm_capable = 1;
4227 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4228 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4229 if (xhci_check_usb2_port_capability(xhci, portnum,
4231 udev->usb2_hw_lpm_besl_capable = 1;
4239 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4240 struct usb_device *udev, int enable)
4245 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4250 #endif /* CONFIG_PM_RUNTIME */
4252 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4255 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4256 static unsigned long long xhci_service_interval_to_ns(
4257 struct usb_endpoint_descriptor *desc)
4259 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4262 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4263 enum usb3_link_state state)
4265 unsigned long long sel;
4266 unsigned long long pel;
4267 unsigned int max_sel_pel;
4272 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4273 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4274 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4275 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4279 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4280 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4281 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4285 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4287 return USB3_LPM_DISABLED;
4290 if (sel <= max_sel_pel && pel <= max_sel_pel)
4291 return USB3_LPM_DEVICE_INITIATED;
4293 if (sel > max_sel_pel)
4294 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4295 "due to long SEL %llu ms\n",
4298 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4299 "due to long PEL %llu ms\n",
4301 return USB3_LPM_DISABLED;
4304 /* Returns the hub-encoded U1 timeout value.
4305 * The U1 timeout should be the maximum of the following values:
4306 * - For control endpoints, U1 system exit latency (SEL) * 3
4307 * - For bulk endpoints, U1 SEL * 5
4308 * - For interrupt endpoints:
4309 * - Notification EPs, U1 SEL * 3
4310 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4311 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4313 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4314 struct usb_endpoint_descriptor *desc)
4316 unsigned long long timeout_ns;
4320 ep_type = usb_endpoint_type(desc);
4322 case USB_ENDPOINT_XFER_CONTROL:
4323 timeout_ns = udev->u1_params.sel * 3;
4325 case USB_ENDPOINT_XFER_BULK:
4326 timeout_ns = udev->u1_params.sel * 5;
4328 case USB_ENDPOINT_XFER_INT:
4329 intr_type = usb_endpoint_interrupt_type(desc);
4330 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4331 timeout_ns = udev->u1_params.sel * 3;
4334 /* Otherwise the calculation is the same as isoc eps */
4335 case USB_ENDPOINT_XFER_ISOC:
4336 timeout_ns = xhci_service_interval_to_ns(desc);
4337 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4338 if (timeout_ns < udev->u1_params.sel * 2)
4339 timeout_ns = udev->u1_params.sel * 2;
4345 /* The U1 timeout is encoded in 1us intervals. */
4346 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4347 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4348 if (timeout_ns == USB3_LPM_DISABLED)
4351 /* If the necessary timeout value is bigger than what we can set in the
4352 * USB 3.0 hub, we have to disable hub-initiated U1.
4354 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4356 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4357 "due to long timeout %llu ms\n", timeout_ns);
4358 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4361 /* Returns the hub-encoded U2 timeout value.
4362 * The U2 timeout should be the maximum of:
4363 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4364 * - largest bInterval of any active periodic endpoint (to avoid going
4365 * into lower power link states between intervals).
4366 * - the U2 Exit Latency of the device
4368 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4369 struct usb_endpoint_descriptor *desc)
4371 unsigned long long timeout_ns;
4372 unsigned long long u2_del_ns;
4374 timeout_ns = 10 * 1000 * 1000;
4376 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4377 (xhci_service_interval_to_ns(desc) > timeout_ns))
4378 timeout_ns = xhci_service_interval_to_ns(desc);
4380 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4381 if (u2_del_ns > timeout_ns)
4382 timeout_ns = u2_del_ns;
4384 /* The U2 timeout is encoded in 256us intervals */
4385 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4386 /* If the necessary timeout value is bigger than what we can set in the
4387 * USB 3.0 hub, we have to disable hub-initiated U2.
4389 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4391 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4392 "due to long timeout %llu ms\n", timeout_ns);
4393 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4396 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4397 struct usb_device *udev,
4398 struct usb_endpoint_descriptor *desc,
4399 enum usb3_link_state state,
4402 if (state == USB3_LPM_U1) {
4403 if (xhci->quirks & XHCI_INTEL_HOST)
4404 return xhci_calculate_intel_u1_timeout(udev, desc);
4406 if (xhci->quirks & XHCI_INTEL_HOST)
4407 return xhci_calculate_intel_u2_timeout(udev, desc);
4410 return USB3_LPM_DISABLED;
4413 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4414 struct usb_device *udev,
4415 struct usb_endpoint_descriptor *desc,
4416 enum usb3_link_state state,
4421 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4422 desc, state, timeout);
4424 /* If we found we can't enable hub-initiated LPM, or
4425 * the U1 or U2 exit latency was too high to allow
4426 * device-initiated LPM as well, just stop searching.
4428 if (alt_timeout == USB3_LPM_DISABLED ||
4429 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4430 *timeout = alt_timeout;
4433 if (alt_timeout > *timeout)
4434 *timeout = alt_timeout;
4438 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4439 struct usb_device *udev,
4440 struct usb_host_interface *alt,
4441 enum usb3_link_state state,
4446 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4447 if (xhci_update_timeout_for_endpoint(xhci, udev,
4448 &alt->endpoint[j].desc, state, timeout))
4455 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4456 enum usb3_link_state state)
4458 struct usb_device *parent;
4459 unsigned int num_hubs;
4461 if (state == USB3_LPM_U2)
4464 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4465 for (parent = udev->parent, num_hubs = 0; parent->parent;
4466 parent = parent->parent)
4472 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4473 " below second-tier hub.\n");
4474 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4475 "to decrease power consumption.\n");
4479 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4480 struct usb_device *udev,
4481 enum usb3_link_state state)
4483 if (xhci->quirks & XHCI_INTEL_HOST)
4484 return xhci_check_intel_tier_policy(udev, state);
4488 /* Returns the U1 or U2 timeout that should be enabled.
4489 * If the tier check or timeout setting functions return with a non-zero exit
4490 * code, that means the timeout value has been finalized and we shouldn't look
4491 * at any more endpoints.
4493 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4494 struct usb_device *udev, enum usb3_link_state state)
4496 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4497 struct usb_host_config *config;
4500 u16 timeout = USB3_LPM_DISABLED;
4502 if (state == USB3_LPM_U1)
4504 else if (state == USB3_LPM_U2)
4507 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4512 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4515 /* Gather some information about the currently installed configuration
4516 * and alternate interface settings.
4518 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4522 config = udev->actconfig;
4526 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4527 struct usb_driver *driver;
4528 struct usb_interface *intf = config->interface[i];
4533 /* Check if any currently bound drivers want hub-initiated LPM
4536 if (intf->dev.driver) {
4537 driver = to_usb_driver(intf->dev.driver);
4538 if (driver && driver->disable_hub_initiated_lpm) {
4539 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4540 "at request of driver %s\n",
4541 state_name, driver->name);
4542 return xhci_get_timeout_no_hub_lpm(udev, state);
4546 /* Not sure how this could happen... */
4547 if (!intf->cur_altsetting)
4550 if (xhci_update_timeout_for_interface(xhci, udev,
4551 intf->cur_altsetting,
4558 static int calculate_max_exit_latency(struct usb_device *udev,
4559 enum usb3_link_state state_changed,
4560 u16 hub_encoded_timeout)
4562 unsigned long long u1_mel_us = 0;
4563 unsigned long long u2_mel_us = 0;
4564 unsigned long long mel_us = 0;
4570 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4571 hub_encoded_timeout == USB3_LPM_DISABLED);
4572 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4573 hub_encoded_timeout == USB3_LPM_DISABLED);
4575 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4576 hub_encoded_timeout != USB3_LPM_DISABLED);
4577 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4578 hub_encoded_timeout != USB3_LPM_DISABLED);
4580 /* If U1 was already enabled and we're not disabling it,
4581 * or we're going to enable U1, account for the U1 max exit latency.
4583 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4585 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4586 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4588 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4590 if (u1_mel_us > u2_mel_us)
4594 /* xHCI host controller max exit latency field is only 16 bits wide. */
4595 if (mel_us > MAX_EXIT) {
4596 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4597 "is too big.\n", mel_us);
4603 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4604 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4605 struct usb_device *udev, enum usb3_link_state state)
4607 struct xhci_hcd *xhci;
4608 u16 hub_encoded_timeout;
4612 xhci = hcd_to_xhci(hcd);
4613 /* The LPM timeout values are pretty host-controller specific, so don't
4614 * enable hub-initiated timeouts unless the vendor has provided
4615 * information about their timeout algorithm.
4617 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4618 !xhci->devs[udev->slot_id])
4619 return USB3_LPM_DISABLED;
4621 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4622 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4624 /* Max Exit Latency is too big, disable LPM. */
4625 hub_encoded_timeout = USB3_LPM_DISABLED;
4629 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4632 return hub_encoded_timeout;
4635 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4636 struct usb_device *udev, enum usb3_link_state state)
4638 struct xhci_hcd *xhci;
4642 xhci = hcd_to_xhci(hcd);
4643 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4644 !xhci->devs[udev->slot_id])
4647 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4648 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4653 #else /* CONFIG_PM */
4655 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4656 struct usb_device *udev, enum usb3_link_state state)
4658 return USB3_LPM_DISABLED;
4661 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4662 struct usb_device *udev, enum usb3_link_state state)
4666 #endif /* CONFIG_PM */
4668 /*-------------------------------------------------------------------------*/
4670 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4671 * internal data structures for the device.
4673 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4674 struct usb_tt *tt, gfp_t mem_flags)
4676 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4677 struct xhci_virt_device *vdev;
4678 struct xhci_command *config_cmd;
4679 struct xhci_input_control_ctx *ctrl_ctx;
4680 struct xhci_slot_ctx *slot_ctx;
4681 unsigned long flags;
4682 unsigned think_time;
4685 /* Ignore root hubs */
4689 vdev = xhci->devs[hdev->slot_id];
4691 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4694 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4696 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4699 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4701 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4703 xhci_free_command(xhci, config_cmd);
4707 spin_lock_irqsave(&xhci->lock, flags);
4708 if (hdev->speed == USB_SPEED_HIGH &&
4709 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4710 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4711 xhci_free_command(xhci, config_cmd);
4712 spin_unlock_irqrestore(&xhci->lock, flags);
4716 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4717 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4718 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4719 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4721 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4722 if (xhci->hci_version > 0x95) {
4723 xhci_dbg(xhci, "xHCI version %x needs hub "
4724 "TT think time and number of ports\n",
4725 (unsigned int) xhci->hci_version);
4726 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4727 /* Set TT think time - convert from ns to FS bit times.
4728 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4729 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4731 * xHCI 1.0: this field shall be 0 if the device is not a
4734 think_time = tt->think_time;
4735 if (think_time != 0)
4736 think_time = (think_time / 666) - 1;
4737 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4738 slot_ctx->tt_info |=
4739 cpu_to_le32(TT_THINK_TIME(think_time));
4741 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4742 "TT think time or number of ports\n",
4743 (unsigned int) xhci->hci_version);
4745 slot_ctx->dev_state = 0;
4746 spin_unlock_irqrestore(&xhci->lock, flags);
4748 xhci_dbg(xhci, "Set up %s for hub device.\n",
4749 (xhci->hci_version > 0x95) ?
4750 "configure endpoint" : "evaluate context");
4751 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4752 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4754 /* Issue and wait for the configure endpoint or
4755 * evaluate context command.
4757 if (xhci->hci_version > 0x95)
4758 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4761 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4764 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4765 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4767 xhci_free_command(xhci, config_cmd);
4771 int xhci_get_frame(struct usb_hcd *hcd)
4773 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4774 /* EHCI mods by the periodic size. Why? */
4775 return readl(&xhci->run_regs->microframe_index) >> 3;
4778 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4780 struct xhci_hcd *xhci;
4781 struct device *dev = hcd->self.controller;
4784 /* Accept arbitrarily long scatter-gather lists */
4785 hcd->self.sg_tablesize = ~0;
4787 /* support to build packet from discontinuous buffers */
4788 hcd->self.no_sg_constraint = 1;
4790 /* XHCI controllers don't stop the ep queue on short packets :| */
4791 hcd->self.no_stop_on_short = 1;
4793 if (usb_hcd_is_primary_hcd(hcd)) {
4794 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4797 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4798 xhci->main_hcd = hcd;
4799 /* Mark the first roothub as being USB 2.0.
4800 * The xHCI driver will register the USB 3.0 roothub.
4802 hcd->speed = HCD_USB2;
4803 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4805 * USB 2.0 roothub under xHCI has an integrated TT,
4806 * (rate matching hub) as opposed to having an OHCI/UHCI
4807 * companion controller.
4811 /* xHCI private pointer was set in xhci_pci_probe for the second
4812 * registered roothub.
4817 xhci->cap_regs = hcd->regs;
4818 xhci->op_regs = hcd->regs +
4819 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4820 xhci->run_regs = hcd->regs +
4821 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4822 /* Cache read-only capability registers */
4823 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4824 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4825 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4826 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4827 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4828 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4829 xhci_print_registers(xhci);
4831 xhci->quirks = quirks;
4833 get_quirks(dev, xhci);
4835 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4836 * success event after a short transfer. This quirk will ignore such
4839 if (xhci->hci_version > 0x96)
4840 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4842 /* Make sure the HC is halted. */
4843 retval = xhci_halt(xhci);
4847 xhci_dbg(xhci, "Resetting HCD\n");
4848 /* Reset the internal HC memory state and registers. */
4849 retval = xhci_reset(xhci);
4852 xhci_dbg(xhci, "Reset complete\n");
4854 /* Set dma_mask and coherent_dma_mask to 64-bits,
4855 * if xHC supports 64-bit addressing */
4856 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4857 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4858 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4859 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4862 xhci_dbg(xhci, "Calling HCD init\n");
4863 /* Initialize HCD and host controller data structures. */
4864 retval = xhci_init(hcd);
4867 xhci_dbg(xhci, "Called HCD init\n");
4874 static const struct hc_driver xhci_hc_driver = {
4875 .description = "xhci-hcd",
4876 .product_desc = "xHCI Host Controller",
4877 .hcd_priv_size = sizeof(struct xhci_hcd *),
4880 * generic hardware linkage
4883 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
4886 * basic lifecycle operations
4888 .reset = NULL, /* set in xhci_init_driver() */
4891 .shutdown = xhci_shutdown,
4894 * managing i/o requests and associated device resources
4896 .urb_enqueue = xhci_urb_enqueue,
4897 .urb_dequeue = xhci_urb_dequeue,
4898 .alloc_dev = xhci_alloc_dev,
4899 .free_dev = xhci_free_dev,
4900 .alloc_streams = xhci_alloc_streams,
4901 .free_streams = xhci_free_streams,
4902 .add_endpoint = xhci_add_endpoint,
4903 .drop_endpoint = xhci_drop_endpoint,
4904 .endpoint_reset = xhci_endpoint_reset,
4905 .check_bandwidth = xhci_check_bandwidth,
4906 .reset_bandwidth = xhci_reset_bandwidth,
4907 .address_device = xhci_address_device,
4908 .enable_device = xhci_enable_device,
4909 .update_hub_device = xhci_update_hub_device,
4910 .reset_device = xhci_discover_or_reset_device,
4913 * scheduling support
4915 .get_frame_number = xhci_get_frame,
4920 .hub_control = xhci_hub_control,
4921 .hub_status_data = xhci_hub_status_data,
4922 .bus_suspend = xhci_bus_suspend,
4923 .bus_resume = xhci_bus_resume,
4926 * call back when device connected and addressed
4928 .update_device = xhci_update_device,
4929 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
4930 .enable_usb3_lpm_timeout = xhci_enable_usb3_lpm_timeout,
4931 .disable_usb3_lpm_timeout = xhci_disable_usb3_lpm_timeout,
4932 .find_raw_port_number = xhci_find_raw_port_number,
4935 void xhci_init_driver(struct hc_driver *drv, int (*setup_fn)(struct usb_hcd *))
4938 *drv = xhci_hc_driver;
4939 drv->reset = setup_fn;
4941 EXPORT_SYMBOL_GPL(xhci_init_driver);
4943 MODULE_DESCRIPTION(DRIVER_DESC);
4944 MODULE_AUTHOR(DRIVER_AUTHOR);
4945 MODULE_LICENSE("GPL");
4947 static int __init xhci_hcd_init(void)
4951 retval = xhci_register_pci();
4953 pr_debug("Problem registering PCI driver.\n");
4956 retval = xhci_register_plat();
4958 pr_debug("Problem registering platform driver.\n");
4962 * Check the compiler generated sizes of structures that must be laid
4963 * out in specific ways for hardware access.
4965 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4966 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4967 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4968 /* xhci_device_control has eight fields, and also
4969 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4971 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4972 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4973 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4974 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4975 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4976 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4977 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4980 xhci_unregister_pci();
4983 module_init(xhci_hcd_init);
4985 static void __exit xhci_hcd_cleanup(void)
4987 xhci_unregister_pci();
4988 xhci_unregister_plat();
4990 module_exit(xhci_hcd_cleanup);