nand_fdl/fdl-2/src/fdl_main.c

   1 #include <asm/arch/sci_types.h>
   2 #include "fdl_main.h"
   3 #include <asm/arch/cmd_def.h>
   4 #include <asm/arch/packet.h>
   5 #include <asm/arch/dl_engine.h>
   6 #include <asm/arch/sio_drv.h>
   7 #include "mcu_command.h"
   8 #include <asm/arch/usb_boot.h>
   9 #include <asm/arch/dma_drv_fdl.h>
  10 #include <asm/arch/sc_reg.h>
  11
  12 #include "fdl_cmd_proc.h"
  13
  14
  15 extern  const unsigned char FDL2_signature[][24];
  16 extern int sprd_clean_rtc(void);
  17
  18 static void fdl_error(void)
  19 {
  20     //sio_putstr("The second FDL failed!\r\n");
  21     for (;;) /*Do nothing*/;
  22 }
  23 /*
  24  * Avoid const string comment out by -O2 opt level of compiler
  25 */
  26 const unsigned char **FDL2_GetSig (void)
  27 {
  28     return (const unsigned char **) FDL2_signature;
  29 }
  30 extern unsigned long _bss_end;
  31 #ifdef CONFIG_SC8810
  32 extern unsigned long _bss_start;
  33
  34 static int bss_end_end;
  35 static int bss_start_start;
  36 char mempool[1024*1024] = {0};
  37
  38 extern void sprdbat_get_vbatauxadc_caldata (void);
  39 extern uint32_t sprdbat_get_vbatauxadc_caltype(void);
  40 extern int DCDC_Cal_ArmCore(void);
  41 #endif
  42 int main(void)
  43 {
  44         /* All hardware initialization has been done in the 1st FDL,
  45          * so we don't do initialization stuff here.
  46          * The UART has also been opened by the 1st FDL and the baudrate
  47          * has been setted correctly.
  48          */
  49         int err = 0;
  50         uint32 sigture_address;
  51         unsigned int i, j;
  52
  53         printf("fdl main \n");
  54         //MMU_Init(0);
  55
  56         sigture_address = (uint32)FDL2_signature;
  57
  58 #if defined(CHIP_ENDIAN_DEFAULT_LITTLE) && defined(CHIP_ENDIAN_BIG)
  59         usb_boot(1);
  60 #endif
  61
  62         FDL_PacketInit();
  63
  64 #ifdef CONFIG_SC8810
  65         bss_start_start = _bss_start;
  66         bss_end_end = _bss_end;
  67         mem_malloc_init (&mempool[0], 1024*1024);
  68 #else
  69         mem_malloc_init (_bss_end, CONFIG_SYS_MALLOC_LEN);
  70 #endif
  71         timer_init();
  72 #if defined (CONFIG_SC8830) || defined(CONFIG_SC9630)
  73         /* add calibration in fdl-2 */
  74         sprdbat_get_vbatauxadc_caldata();
  75         if (sprdbat_get_vbatauxadc_caltype() != 0)
  76         {
  77                 DCDC_Cal_ArmCore();
  78         }
  79 #else
  80         sprd_clean_rtc();
  81 #endif
  82
  83         do {
  84 #ifdef CONFIG_EMMC_BOOT
  85                 /* Initialize eMMC. */
  86                 extern int mmc_legacy_init(int dev);
  87                 mmc_legacy_init(1);
  88                 err = EMMC_SUCCESS;
  89 #else
  90                 nand_init();
  91                 fdl_ubi_dev_init();
  92 #endif
  93                 MMU_Init(0);
  94
  95 #ifdef FPGA_TRACE_DOWNLOAD
  96                 if(!err)
  97                 {
  98                         fdl_ram2flash_dl();
  99                 }
 100                 while(1);
 101 #else
 102                 /* Register command handler */
 103                 FDL_DlInit();
 104                 FDL_DlReg(BSL_CMD_START_DATA,     FDL2_Download_Start,         0);
 105                 FDL_DlReg(BSL_CMD_MIDST_DATA,     FDL2_Download_Midst,         0);
 106                 FDL_DlReg(BSL_CMD_END_DATA,       FDL2_Download_End,           0);
 107                 FDL_DlReg(BSL_CMD_READ_FLASH_START,     FDL2_Read_Start,         0);
 108                 FDL_DlReg(BSL_CMD_READ_FLASH_MIDST,     FDL2_Read_Midst,         0);
 109                 FDL_DlReg(BSL_CMD_READ_FLASH_END,     FDL2_Read_End,         0);
 110                 FDL_DlReg(BSL_ERASE_FLASH,        FDL2_Erase,        0);
 111                 FDL_DlReg(BSL_REPARTITION,         FDL2_Repartition,       0);
 112                 FDL_DlReg(BSL_CMD_NORMAL_RESET,   FDL_McuResetNormal/*mcu_reset_boot*/,   0);
 113                 FDL_DlReg(BSL_CMD_READ_CHIP_TYPE, FDL_McuReadChipType, 0);
 114                 FDL_DlReg(BSL_CMD_READ_MCP_TYPE, FDL_McuReadMcpType, 0);
 115                 //Send BSL_INCOMPATIBLE_PARTITION because of FDL2 will know nothing about new partition
 116                 FDL_SendAckPacket (BSL_INCOMPATIBLE_PARTITION);
 117
 118                 /* Start the download process. */
 119                 FDL_DlEntry (DL_STAGE_CONNECTED);
 120 #endif
 121         } while (0);
 122
 123         /* If we get here, there must be something wrong. */
 124         fdl_error();
 125         return 0;
 126 }
 127