drivers/video/sprdfb/sprdfb_chip_8825.h

   1 /******************************************************************************
   2  ** File Name:    sprdfb_chip_8825.h                                     *
   3  ** Author:       congfu.zhao                                           *
   4  ** DATE:         30/04/2013                                        *
   5  ** Copyright:    2013 Spreatrum, Incoporated. All Rights Reserved. *
   6  ** Description:                                                    *
   7  ******************************************************************************/
   8 /******************************************************************************
   9  **                   Edit    History                               *
  10  **---------------------------------------------------------------------------*
  11  ** DATE          NAME            DESCRIPTION                       *
  12
  13  ******************************************************************************/
  14 #ifndef _SC8825_DISPC_GLB_REG_U_H_
  15 #define _SC8825_DISPC_GLB_REG_U_H_
  16
  17
  18 #include <asm/arch/sc8810_reg_ahb.h>
  19 #include <asm/arch/sc8810_reg_global.h>
  20
  21 #define BIT(x) (1<<x)
  22
  23
  24 //#define       DSI_CTL_BEGIN   0x60100000
  25 #define SPRD_MIPI_DPHY_GEN1
  26
  27
  28 #define DISPC_AHB_SOFT_RST              AHB_SOFT_RST
  29 #define BIT_DISPC_SOFT_RST                      BIT(20)
  30
  31 #define DSI_AHB_SOFT_RST                        AHB_SOFT_RST
  32 #define BIT_DSI_SOFT_RST                        BIT(26)
  33
  34 #define DSI_REG_EB                              (AHB_REG_BASE+0x1C)
  35 #define DSI_BIT_EB                                      BIT(0)
  36
  37 #define DISPC_AHB_EN                            (AHB_CTL0)
  38 #define BIT_DISPC_AHB_EN                        (BIT(22))
  39
  40 #define DISPC_CORE_EN                   (AHB_CTL2)
  41 #define BIT_DISPC_CORE_EN                       (BIT(9))
  42
  43 #define DISPC_EMC_EN                            (AHB_CTL2)
  44 #define BIT_DISPC_EMC_EN                        (BIT(11))
  45
  46 #define DISPC_PLL_SEL_CFG                       AHB_DISPC_CLK
  47 #define BITS_DISPC_PLL_SEL_CFG          1
  48 #define BIT0_DISPC_PLL_SEL_CFG          BIT(1)
  49 #define BIT1_DISPC_PLL_SEL_CFG          BIT(2)
  50 #define BIT_DISPC_PLL_SEL_MSK           BIT1_DISPC_PLL_SEL_CFG | BIT0_DISPC_PLL_SEL_CFG
  51
  52 #define DISPC_PLL_DIV_CFG                       AHB_DISPC_CLK
  53 #define BITS_DISPC_PLL_DIV_CFG          3
  54 #define BIT0_DISPC_PLL_DIV_CFG          BIT(3)
  55 #define BIT1_DISPC_PLL_DIV_CFG          BIT(4)
  56 #define BIT2_DISPC_PLL_DIV_CFG          BIT(5)
  57 #define BIT_DISPC_PLL_DIV_MSK           BIT0_DISPC_PLL_DIV_CFG | BIT1_DISPC_PLL_DIV_CFG | BIT2_DISPC_PLL_DIV_CFG
  58
  59 #define DISPC_DBI_SEL_CFG                       AHB_DISPC_CLK
  60 #define BITS_DISPC_DBI_SEL_CFG          9
  61 #define BIT0_DISPC_DBI_SEL_CFG          BIT(9)
  62 #define BIT1_DISPC_DBI_SEL_CFG          BIT(10)
  63 #define BIT_DISPC_DBI_SEL_MSK           BIT0_DISPC_DBI_SEL_CFG | BIT1_DISPC_DBI_SEL_CFG
  64
  65 #define DISPC_DBI_DIV_CFG                       AHB_DISPC_CLK
  66 #define BITS_DISPC_DBI_DIV_CFG          11
  67 #define BIT0_DISPC_DBI_DIV_CFG          BIT(11)
  68 #define BIT1_DISPC_DBI_DIV_CFG          BIT(12)
  69 #define BIT2_DISPC_DBI_DIV_CFG          BIT(13)
  70 #define BIT_DISPC_DBI_DIV_MSK           BIT0_DISPC_DBI_DIV_CFG | BIT1_DISPC_DBI_DIV_CFG | BIT2_DISPC_DBI_DIV_CFG
  71
  72 #define DISPC_DPI_SEL_CFG                       AHB_DISPC_CLK
  73 #define BITS_DISPC_DPI_SEL_CFG          17
  74 #define BIT0_DISPC_DPI_SEL_CFG          BIT(17)
  75 #define BIT1_DISPC_DPI_SEL_CFG          BIT(18)
  76 #define BIT_DISPC_DPI_SEL_MSK           BIT0_DISPC_DPI_SEL_CFG | BIT1_DISPC_DPI_SEL_CFG
  77
  78 #define DISPC_DPI_DIV_CFG                       AHB_DISPC_CLK
  79 #define BITS_DISPC_DPI_DIV_CFG          19
  80 #define BIT0_DISPC_DPI_DIV_CFG          BIT(19)
  81 #define BIT1_DISPC_DPI_DIV_CFG          BIT(20)
  82 #define BIT2_DISPC_DPI_DIV_CFG          BIT(21)
  83 #define BIT3_DISPC_DPI_DIV_CFG          BIT(22)
  84 #define BIT4_DISPC_DPI_DIV_CFG          BIT(23)
  85 #define BIT5_DISPC_DPI_DIV_CFG          BIT(24)
  86 #define BIT6_DISPC_DPI_DIV_CFG          BIT(25)
  87 #define BIT7_DISPC_DPI_DIV_CFG          BIT(26)
  88 #define BIT_DISPC_DPI_DIV_MSK           BIT0_DISPC_DPI_DIV_CFG | BIT1_DISPC_DPI_DIV_CFG | BIT2_DISPC_DPI_DIV_CFG | BIT3_DISPC_DPI_DIV_CFG \
  89                                         | BIT4_DISPC_DPI_DIV_CFG | BIT5_DISPC_DPI_DIV_CFG | BIT6_DISPC_DPI_DIV_CFG | BIT7_DISPC_DPI_DIV_CFG
  90
  91
  92 enum{
  93         DISPC_PLL_SEL_256M = 0,
  94         DISPC_PLL_SEL_192M,
  95         DISPC_PLL_SEL_153_6M,
  96         DISPC_PLL_SEL_128M
  97 };
  98
  99 enum{
 100         DISPC_DBI_SEL_256M = 0,
 101         DISPC_DBI_SEL_192M,
 102         DISPC_DBI_SEL_153_6M,
 103         DISPC_DBI_SEL_128M
 104 };
 105
 106 enum{
 107         DISPC_DPI_SEL_384M = 0,
 108         DISPC_DPI_SEL_192M,
 109         DISPC_DPI_SEL_153_6M,
 110         DISPC_DPI_SEL_128M
 111 };
 112
 113 #define DISPC_PLL_SEL_DEFAULT   DISPC_PLL_SEL_256M
 114 #define DISPC_DBI_SEL_DEFAULT   DISPC_DBI_SEL_256M
 115 #define DISPC_DPI_SEL_DEFAULT   DISPC_DPI_SEL_384M
 116
 117 #define DISPC_PLL_DIV_DEFAULT   0
 118 #define DISPC_DBI_DIV_DEFAULT   0
 119 #define DISPC_DPI_DIV_DEFAULT   10
 120
 121
 122 void dsi_enable(void);
 123
 124 void dispc_print_clk(void);
 125
 126
 127
 128
 129
 130
 131 #endif