tizen 2.4 release
[kernel/u-boot-tm1.git] / drivers / video / sprdfb / dsi_1_10a / mipi_dsih_hal.h
1 /*                                                                                                                                      \r
2  * @file mipi_dsih_hal.h                                                                                                                \r
3  *                                                                                                                                      \r
4  *  Synopsys Inc.                                                                                                                       \r
5  *  SG DWC PT02                                                                                                                         \r
6  */                                                                                                                                     \r
7 /*                                                                                                                                      \r
8     The Synopsys Software Driver and documentation (hereinafter "Software")                                                             \r
9     is an unsupported proprietary work of Synopsys, Inc. unless otherwise                                                               \r
10     expressly agreed to in writing between  Synopsys and you.                                                                           \r
11                                                                                                                                         \r
12     The Software IS NOT an item of Licensed Software or Licensed Product under                                                          \r
13     any End User Software License Agreement or Agreement for Licensed Product                                                           \r
14     with Synopsys or any supplement thereto.  Permission is hereby granted,                                                             \r
15     free of charge, to any person obtaining a copy of this software annotated                                                           \r
16     with this license and the Software, to deal in the Software without                                                                 \r
17     restriction, including without limitation the rights to use, copy, modify,                                                          \r
18     merge, publish, distribute, sublicense, and/or sell copies of the Software,                                                         \r
19     and to permit persons to whom the Software is furnished to do so, subject                                                           \r
20     to the following conditions:                                                                                                        \r
21                                                                                                                                         \r
22     The above copyright notice and this permission notice shall be included in                                                          \r
23     all copies or substantial portions of the Software.                                                                                 \r
24                                                                                                                                         \r
25     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS                                                           \r
26     AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE                                                           \r
27     IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE                                                          \r
28     ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,                                                         \r
29     INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES                                                                  \r
30     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR                                                                  \r
31     SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER                                                          \r
32     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT                                                                  \r
33     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY                                                           \r
34     OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH                                                         \r
35     DAMAGE.                                                                                                                             \r
36  */                                                                                                                                     \r
37                                                                                                                                         \r
38 #ifndef MIPI_DSIH_HAL_H_                                                                                                                \r
39 #define MIPI_DSIH_HAL_H_                                                                                                                \r
40                                                                                                                                         \r
41 #include "mipi_dsih_local.h"                                                                                                            \r
42                                                                                                                                         \r
43 #define R_DSI_HOST_VERSION          0x00UL                                                                                              \r
44 #define R_DSI_HOST_PWR_UP           0x04UL                                                                                              \r
45 #define R_DSI_HOST_CLK_MGR          0x08UL                                                                                              \r
46 #define R_DSI_HOST_DPI_CFG          0x0CUL                                                                                              \r
47 #define R_DSI_HOST_DBI_CFG          0x10UL                                                                                              \r
48 #define R_DSI_HOST_DBI_CMDSIZE      0x14UL                                                                                              \r
49 #define R_DSI_HOST_PCKHDL_CFG       0x18UL                                                                                              \r
50 #define R_DSI_HOST_VID_MODE_CFG     0x1CUL                                                                                              \r
51 #define R_DSI_HOST_VID_PKT_CFG      0x20UL                                                                                              \r
52 #define R_DSI_HOST_CMD_MODE_CFG     0x24UL                                                                                              \r
53 #define R_DSI_HOST_TMR_LINE_CFG     0x28UL                                                                                              \r
54 #define R_DSI_HOST_VTIMING_CFG      0x2CUL                                                                                              \r
55 #define R_DSI_HOST_PHY_TMR_CFG      0x30UL                                                                                              \r
56 #define R_DSI_HOST_GEN_HDR          0x34UL                                                                                              \r
57 #define R_DSI_HOST_GEN_PLD_DATA     0x38UL                                                                                              \r
58 #define R_DSI_HOST_CMD_PKT_STATUS   0x3CUL                                                                                              \r
59 #define R_DSI_HOST_TO_CNT_CFG       0x40UL                                                                                              \r
60 #define R_DSI_HOST_ERROR_ST0        0x44UL                                                                                              \r
61 #define R_DSI_HOST_ERROR_ST1        0x48UL                                                                                              \r
62 #define R_DSI_HOST_ERROR_MSK0       0x4CUL                                                                                              \r
63 #define R_DSI_HOST_ERROR_MSK1       0x50UL                                                                                              \r
64                                                                                                                                         \r
65 #define R_DSI_HOST_EDPI_CFG         0x6CUL\r
66 uint32_t mipi_dsih_hal_get_version(dsih_ctrl_t * instance);                                                                             \r
67 void mipi_dsih_hal_power(dsih_ctrl_t * instance, int on);                                                                               \r
68 int mipi_dsih_hal_get_power(dsih_ctrl_t * instance);                                                                                    \r
69 void mipi_dsih_hal_tx_escape_division(dsih_ctrl_t * instance, uint8_t tx_escape_division);                                              \r
70 void mipi_dsih_hal_dpi_video_vc(dsih_ctrl_t * instance, uint8_t vc);                                                                    \r
71 uint8_t mipi_dsih_hal_dpi_get_video_vc(dsih_ctrl_t * instance);                                                                         \r
72                                                                                                                                         \r
73 dsih_error_t mipi_dsih_hal_dpi_color_coding(dsih_ctrl_t * instance, dsih_color_coding_t color_coding);                                  \r
74 dsih_color_coding_t mipi_dsih_hal_dpi_get_color_coding(dsih_ctrl_t * instance);                                                         \r
75 uint8_t mipi_dsih_hal_dpi_get_color_depth(dsih_ctrl_t * instance);                                                                      \r
76 uint8_t mipi_dsih_hal_dpi_get_color_config(dsih_ctrl_t * instance);                                                                     \r
77 void mipi_dsih_hal_dpi_18_loosely_packet_en(dsih_ctrl_t * instance, int enable);                                                        \r
78 void mipi_dsih_hal_dpi_color_mode_pol(dsih_ctrl_t * instance, int active_low);                                                          \r
79 void mipi_dsih_hal_dpi_shut_down_pol(dsih_ctrl_t * instance, int active_low);                                                           \r
80 void mipi_dsih_hal_dpi_hsync_pol(dsih_ctrl_t * instance, int active_low);                                                               \r
81 void mipi_dsih_hal_dpi_vsync_pol(dsih_ctrl_t * instance, int active_low);                                                               \r
82 void mipi_dsih_hal_dpi_dataen_pol(dsih_ctrl_t * instance, int active_low);                                                              \r
83 void mipi_dsih_hal_dpi_frame_ack_en(dsih_ctrl_t * instance, int enable);                                                                \r
84 void mipi_dsih_hal_dpi_null_packet_en(dsih_ctrl_t * instance, int enable);                                                              \r
85 void mipi_dsih_hal_dpi_multi_packet_en(dsih_ctrl_t * instance, int enable);                                                             \r
86 void mipi_dsih_hal_dpi_lp_during_hfp(dsih_ctrl_t * instance, int enable);                                                               \r
87 void mipi_dsih_hal_dpi_lp_during_hbp(dsih_ctrl_t * instance, int enable);                                                               \r
88 void mipi_dsih_hal_dpi_lp_during_vactive(dsih_ctrl_t * instance, int enable);                                                           \r
89 void mipi_dsih_hal_dpi_lp_during_vfp(dsih_ctrl_t * instance, int enable);                                                               \r
90 void mipi_dsih_hal_dpi_lp_during_vbp(dsih_ctrl_t * instance, int enable);                                                               \r
91 void mipi_dsih_hal_dpi_lp_during_vsync(dsih_ctrl_t * instance, int enable);                                                             \r
92                                                                                                                                         \r
93 dsih_error_t mipi_dsih_hal_dpi_video_mode_type(dsih_ctrl_t * instance, dsih_video_mode_t type);                                         \r
94 void mipi_dsih_hal_dpi_video_mode_en(dsih_ctrl_t * instance, int enable);                                                               \r
95 int mipi_dsih_hal_dpi_is_video_mode(dsih_ctrl_t * instance);                                                                            \r
96 dsih_error_t mipi_dsih_hal_dpi_null_packet_size(dsih_ctrl_t * instance, uint16_t size);                                                 \r
97 dsih_error_t mipi_dsih_hal_dpi_chunks_no(dsih_ctrl_t * instance, uint16_t no);                                                          \r
98 dsih_error_t mipi_dsih_hal_dpi_video_packet_size(dsih_ctrl_t * instance, uint16_t size);                                                \r
99                                                                                                                                         \r
100 void mipi_dsih_hal_tear_effect_ack_en(dsih_ctrl_t * instance, int enable);                                                              \r
101                                                                                                                                         \r
102 void mipi_dsih_hal_cmd_ack_en(dsih_ctrl_t * instance, int enable);                                                                      \r
103 dsih_error_t mipi_dsih_hal_dcs_wr_tx_type(dsih_ctrl_t * instance, unsigned no_of_param, int lp);                                        \r
104 dsih_error_t mipi_dsih_hal_dcs_rd_tx_type(dsih_ctrl_t * instance, unsigned no_of_param, int lp);     \r
105 /*Jessica add to support max rd packet size command*/\r
106 dsih_error_t mipi_dsih_hal_max_rd_packet_size_type(dsih_ctrl_t * instance, int lp);\r
107 dsih_error_t mipi_dsih_hal_gen_wr_tx_type(dsih_ctrl_t * instance, unsigned no_of_param, int lp);                                        \r
108 dsih_error_t mipi_dsih_hal_gen_rd_tx_type(dsih_ctrl_t * instance, unsigned no_of_param, int lp);                                        \r
109 void mipi_dsih_hal_max_rd_size_type(dsih_ctrl_t * instance, int lp);                                                                    \r
110 void mipi_dsih_hal_gen_cmd_mode_en(dsih_ctrl_t * instance, int enable);                                                                 \r
111 int mipi_dsih_hal_gen_is_cmd_mode(dsih_ctrl_t * instance);                                                                              \r
112                                                                                                                                         \r
113 void mipi_dsih_hal_dpi_hline(dsih_ctrl_t * instance, uint16_t time);                                                                    \r
114 void mipi_dsih_hal_dpi_hbp(dsih_ctrl_t * instance, uint16_t time);                                                                      \r
115 void mipi_dsih_hal_dpi_hsa(dsih_ctrl_t * instance, uint16_t time);                                                                      \r
116 void mipi_dsih_hal_dpi_vactive(dsih_ctrl_t * instance, uint16_t lines);                                                                 \r
117 void mipi_dsih_hal_dpi_vfp(dsih_ctrl_t * instance, uint16_t lines);                                                                     \r
118 void mipi_dsih_hal_dpi_vbp(dsih_ctrl_t * instance, uint16_t lines);                                                                     \r
119 void mipi_dsih_hal_dpi_vsync(dsih_ctrl_t * instance, uint16_t lines);                                                                   \r
120 dsih_error_t mipi_dsih_hal_gen_packet_header(dsih_ctrl_t * instance, uint8_t vc, uint8_t packet_type, uint8_t ms_byte, uint8_t ls_byte);\r
121 /*dsih_error_t mipi_dsih_hal_gen_packet_payload(dsih_ctrl_t * instance, uint32_t* payload, uint16_t payload_size);*/                    \r
122 dsih_error_t mipi_dsih_hal_gen_packet_payload(dsih_ctrl_t * instance, uint32_t payload);                                                \r
123 dsih_error_t mipi_dsih_hal_gen_read_payload(dsih_ctrl_t * instance, uint32_t* payload);                                                 \r
124                                                                                                                                         \r
125 void mipi_dsih_hal_timeout_clock_division(dsih_ctrl_t * instance, uint8_t byte_clk_division_factor);                                    \r
126 void mipi_dsih_hal_lp_rx_timeout(dsih_ctrl_t * instance, uint16_t count);                                                               \r
127 void mipi_dsih_hal_hs_tx_timeout(dsih_ctrl_t * instance, uint16_t count);                                                               \r
128                                                                                                                                         \r
129 uint32_t mipi_dsih_hal_error_status_0(dsih_ctrl_t * instance, uint32_t mask);                                                           \r
130 uint32_t mipi_dsih_hal_error_status_1(dsih_ctrl_t * instance, uint32_t mask);                                                           \r
131 void mipi_dsih_hal_error_mask_0(dsih_ctrl_t * instance, uint32_t mask);                                                                 \r
132 void mipi_dsih_hal_error_mask_1(dsih_ctrl_t * instance, uint32_t mask);                                                                 \r
133 uint32_t mipi_dsih_hal_get_error_mask_0(dsih_ctrl_t * instance, uint32_t mask);                                                         \r
134 uint32_t mipi_dsih_hal_get_error_mask_1(dsih_ctrl_t * instance, uint32_t mask);                                                         \r
135                                                                                                                                         \r
136 void mipi_dsih_hal_dbi_out_color_coding(dsih_ctrl_t * instance, uint8_t color_depth, uint8_t option);                                   \r
137 void mipi_dsih_hal_dbi_in_color_coding(dsih_ctrl_t * instance, uint8_t color_depth, uint8_t option);                                    \r
138 void mipi_dsih_hal_dbi_lut_size(dsih_ctrl_t * instance, uint8_t size);                                                                  \r
139 void mipi_dsih_hal_dbi_partitioning_en(dsih_ctrl_t * instance, int enable);                                                             \r
140 void mipi_dsih_hal_dbi_dcs_vc(dsih_ctrl_t * instance, uint8_t vc);                                                                      \r
141                                                                                                                                         \r
142 void mipi_dsih_hal_dbi_cmd_size(dsih_ctrl_t * instance, uint16_t size);                                                                 \r
143 void mipi_dsih_hal_dbi_max_cmd_size(dsih_ctrl_t * instance, uint16_t size);                                                             \r
144 int mipi_dsih_hal_dbi_rd_cmd_busy(dsih_ctrl_t * instance);                                                                              \r
145 int mipi_dsih_hal_dbi_read_fifo_full(dsih_ctrl_t * instance);                                                                           \r
146 int mipi_dsih_hal_dbi_read_fifo_empty(dsih_ctrl_t * instance);                                                                          \r
147 int mipi_dsih_hal_dbi_write_fifo_full(dsih_ctrl_t * instance);                                                                          \r
148 int mipi_dsih_hal_dbi_write_fifo_empty(dsih_ctrl_t * instance);                                                                         \r
149 int mipi_dsih_hal_dbi_cmd_fifo_full(dsih_ctrl_t * instance);                                                                            \r
150 int mipi_dsih_hal_dbi_cmd_fifo_empty(dsih_ctrl_t * instance);                                                                           \r
151                                                                                                                                         \r
152 void mipi_dsih_hal_gen_rd_vc(dsih_ctrl_t * instance, uint8_t vc);                                                                       \r
153 void mipi_dsih_hal_gen_eotp_rx_en(dsih_ctrl_t * instance, int enable);                                                                  \r
154 void mipi_dsih_hal_gen_eotp_tx_en(dsih_ctrl_t * instance, int enable);                                                                  \r
155 void mipi_dsih_hal_bta_en(dsih_ctrl_t * instance, int enable);                                                                          \r
156 void mipi_dsih_hal_gen_ecc_rx_en(dsih_ctrl_t * instance, int enable);                                                                   \r
157 void mipi_dsih_hal_gen_crc_rx_en(dsih_ctrl_t * instance, int enable);                                                                   \r
158 int mipi_dsih_hal_gen_rd_cmd_busy(dsih_ctrl_t * instance);                                                                              \r
159 int mipi_dsih_hal_gen_read_fifo_full(dsih_ctrl_t * instance);                                                                           \r
160 int mipi_dsih_hal_gen_read_fifo_empty(dsih_ctrl_t * instance);                                                                          \r
161 int mipi_dsih_hal_gen_write_fifo_full(dsih_ctrl_t * instance);                                                                          \r
162 int mipi_dsih_hal_gen_write_fifo_empty(dsih_ctrl_t * instance);                                                                         \r
163 int mipi_dsih_hal_gen_cmd_fifo_full(dsih_ctrl_t * instance);                                                                            \r
164 int mipi_dsih_hal_gen_cmd_fifo_empty(dsih_ctrl_t * instance);                                                                           \r
165                                                                                                                                         \r
166 /* only if DPI */                                                                                                                       \r
167 dsih_error_t mipi_dsih_phy_hs2lp_config(dsih_ctrl_t * instance, uint8_t no_of_byte_cycles);                                             \r
168 dsih_error_t mipi_dsih_phy_lp2hs_config(dsih_ctrl_t * instance, uint8_t no_of_byte_cycles);                                             \r
169 dsih_error_t mipi_dsih_phy_bta_time(dsih_ctrl_t * instance, uint16_t no_of_byte_cycles);                                                \r
170 /* */                                                                                                                                   \r
171                                                                                                                                         \r
172 void mipi_dsih_write_word(dsih_ctrl_t * instance, uint32_t reg_address, uint32_t data);                                                 \r
173 void mipi_dsih_write_part(dsih_ctrl_t * instance, uint32_t reg_address, uint32_t data, uint8_t shift, uint8_t width);                   \r
174 uint32_t mipi_dsih_read_word(dsih_ctrl_t * instance, uint32_t reg_address);                                                             \r
175 uint32_t mipi_dsih_read_part(dsih_ctrl_t * instance, uint32_t reg_address, uint8_t shift, uint8_t width);                               \r
176                                                                                                                                         \r
177 #endif /* MIPI_DSI_API_H_ */                                                                                                            \r
178