drivers/video/sc8825fb/mipi_dsih_local.h

   1                                                                                        \r
   2 /*                                                                                     \r
   3     The Synopsys Software Driver and documentation (hereinafter "Software")            \r
   4     is an unsupported proprietary work of Synopsys, Inc. unless otherwise              \r
   5     expressly agreed to in writing between  Synopsys and you.                          \r
   6                                                                                        \r
   7     The Software IS NOT an item of Licensed Software or Licensed Product under         \r
   8     any End User Software License Agreement or Agreement for Licensed Product          \r
   9     with Synopsys or any supplement thereto.  Permission is hereby granted,            \r
  10     free of charge, to any person obtaining a copy of this software annotated          \r
  11     with this license and the Software, to deal in the Software without                \r
  12     restriction, including without limitation the rights to use, copy, modify,         \r
  13     merge, publish, distribute, sublicense, and/or sell copies of the Software,        \r
  14     and to permit persons to whom the Software is furnished to do so, subject          \r
  15     to the following conditions:                                                       \r
  16                                                                                        \r
  17     The above copyright notice and this permission notice shall be included in         \r
  18     all copies or substantial portions of the Software.                                \r
  19                                                                                        \r
  20     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS          \r
  21     AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE          \r
  22     IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE         \r
  23     ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,        \r
  24     INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES                 \r
  25     (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR                 \r
  26     SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER         \r
  27     CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT                 \r
  28     LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY          \r
  29     OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH        \r
  30     DAMAGE.                                                                            \r
  31  */                                                                                    \r
  32                                                                                        \r
  33 #ifndef MIPI_DSIH_LOCAL_H_                                                             \r
  34 #define MIPI_DSIH_LOCAL_H_                                                             \r
  35                                                                                        \r
  36 //#include <stdint.h>             \r
  37 #include <common.h>\r
  38 \r
  39 \r
  40 //typedef unsigned char   uint8_t;       \r
  41 //typedef unsigned short  uint16_t;      \r
  42 //typedef unsigned int    uint32_t; \r
  43 \r
  44 #define DSIH_PIXEL_TOLERANCE  2                                                        \r
  45 #define DSIH_FIFO_ACTIVE_WAIT 500    /* no of tries to access the fifo*/\r
  46 #define DSIH_PHY_ACTIVE_WAIT  200                                                      \r
  47 #define ONE_MS_ACTIVE_WAIT    50000 /* 50MHz processor */                              \r
  48 #define DEFAULT_BYTE_CLOCK    864000 /* a value to start PHY PLL - random */           \r
  49                                                                                        \r
  50 #define DWC_MIPI_DPHY_BIDIR_TSMC40LP                                                   \r
  51 /* #define DPHY2Btql */ /* test chip PHY */                                            \r
  52 typedef enum                                                                           \r
  53 {                                                                                      \r
  54     OK = 0,                                                                            \r
  55     ERR_DSI_COLOR_CODING,                                                              \r
  56     ERR_DSI_OUT_OF_BOUND,                                                              \r
  57     ERR_DSI_OVERFLOW,                                                                  \r
  58     ERR_DSI_INVALID_INSTANCE,                                                          \r
  59     ERR_DSI_INVALID_IO,                                                                \r
  60     ERR_DSI_CORE_INCOMPATIBLE,                                                         \r
  61     ERR_DSI_VIDEO_MODE,                                                                \r
  62     ERR_DSI_INVALID_COMMAND,                                                           \r
  63     ERR_DSI_INVALID_EVENT,                                                             \r
  64     ERR_DSI_INVALID_HANDLE,                                                            \r
  65     ERR_DSI_PHY_POWERUP,                                                               \r
  66     ERR_DSI_PHY_INVALID,                                                               \r
  67     ERR_DSI_PHY_FREQ_OUT_OF_BOUND,                                                     \r
  68     ERR_DSI_TIMEOUT                                                                    \r
  69 }                                                                                      \r
  70 dsih_error_t;                                                                          \r
  71 typedef enum                                                                           \r
  72 {                                                                                      \r
  73     VIDEO_NON_BURST_WITH_SYNC_PULSES = 0,                                              \r
  74     VIDEO_NON_BURST_WITH_SYNC_EVENTS,                                                  \r
  75     VIDEO_BURST_WITH_SYNC_PULSES                                                       \r
  76 }                                                                                      \r
  77 dsih_video_mode_t;                                                                     \r
  78 typedef enum                                                                           \r
  79 {                                                                                      \r
  80     COLOR_CODE_16BIT_CONFIG1,                                                          \r
  81     COLOR_CODE_16BIT_CONFIG2,                                                          \r
  82     COLOR_CODE_16BIT_CONFIG3,                                                          \r
  83     COLOR_CODE_18BIT_CONFIG1,                                                          \r
  84     COLOR_CODE_18BIT_CONFIG2,                                                          \r
  85     COLOR_CODE_24BIT                                                                   \r
  86 }                                                                                      \r
  87 dsih_color_coding_t;                                                                   \r
  88 typedef enum                                                                           \r
  89 {                                                                                      \r
  90     ACK_SOT_ERR = 0,                                                                   \r
  91     ACK_SOT_SYNC,                                                                      \r
  92     ACK_EOT_SYNC,                                                                      \r
  93     ACK_ESCAPE_CMD_ERR,                                                                \r
  94     ACK_LP_TX_SYNC_ERR,                                                                \r
  95     ACK_HS_RX_TIMEOUT_ERR,                                                             \r
  96     ACK_FALSE_CONTROL_ERR,                                                             \r
  97     ACK_RSVD_DEVICE_ERR_7,                                                             \r
  98     ACK_ECC_SINGLE_BIT_ERR,                                                            \r
  99     ACK_ECC_MULTI_BIT_ERR,                                                             \r
 100     ACK_CHECKSUM_ERR,                                                                  \r
 101     ACK_DSI_TYPE_NOT_RECOGNIZED_ERR,                                                   \r
 102     ACK_VC_ID_INVALID_ERR,                                                             \r
 103     ACK_INVALID_TX_LENGTH_ERR,                                                         \r
 104     ACK_RSVD_DEVICE_ERR_14,                                                            \r
 105     ACK_DSI_PROTOCOL_ERR,                                                              \r
 106                                                                                        \r
 107     DPHY_ESC_ENTRY_ERR,                                                                \r
 108     DPHY_SYNC_ESC_LP_ERR,                                                              \r
 109     DPHY_CONTROL_LANE0_ERR,                                                            \r
 110     DPHY_CONTENTION_LP0_ERR,                                                           \r
 111     DPHY_CONTENTION_LP1_ERR,                                                           \r
 112     /* start of st1*/                                                                  \r
 113     HS_CONTENTION,                                                                     \r
 114     LP_CONTENTION,                                                                     \r
 115     RX_ECC_SINGLE_ERR,                                                                 \r
 116     RX_ECC_MULTI_ERR,                                                                  \r
 117     RX_CRC_ERR,                                                                        \r
 118     RX_PKT_SIZE_ERR,                                                                   \r
 119     RX_EOTP_ERR,                                                                       \r
 120     DPI_PLD_FIFO_FULL_ERR,                                                             \r
 121     GEN_TX_CMD_FIFO_FULL_ERR,                                                          \r
 122     GEN_TX_PLD_FIFO_FULL_ERR,                                                          \r
 123     GEN_TX_PLD_FIFO_EMPTY_ERR,                                                         \r
 124     GEN_RX_PLD_FIFO_EMPTY_ERR,                                                         \r
 125     GEN_RX_PLD_FIFO_FULL_ERR,                                                          \r
 126                                                                                        \r
 127     DBI_TX_CMD_FIFO_FULL_ERR,                                                          \r
 128     DBI_TX_PLD_FIFO_FULL_ERR,                                                          \r
 129     DBI_RX_PLD_FIFO_EMPTY_ERR,                                                         \r
 130     DBI_RX_PLD_FIFO_FULL_ERR,                                                          \r
 131     DBI_ILLEGAL_CMD_ERR,                                                               \r
 132     DSI_MAX_EVENT                                                                      \r
 133 }                                                                                      \r
 134 dsih_event_t;                                                                          \r
 135 typedef enum                                                                           \r
 136 {                                                                                      \r
 137     NOT_INITIALIZED = 0,                                                               \r
 138     INITIALIZED,                                                                       \r
 139     ON,                                                                                \r
 140     OFF                                                                                \r
 141 }                                                                                      \r
 142 dsih_state_t;                                                                          \r
 143                                                                                        \r
 144 typedef struct dphy_t                                                                  \r
 145 {                                                                                      \r
 146     uint32_t address;                                                                  \r
 147     uint32_t reference_freq;                                                           \r
 148     dsih_state_t status;                                                               \r
 149     void (*bsp_pre_config)(struct dphy_t *instance, void* param);                      \r
 150     uint32_t (*core_read_function)(uint32_t addr, uint32_t offset);                    \r
 151     void (*core_write_function)(uint32_t addr, uint32_t offset, uint32_t data);        \r
 152     void (*log_error)(const char * string);                                            \r
 153     void (*log_info)(const char *fmt, ...);                                            \r
 154 }                                                                                      \r
 155 dphy_t;                                                                                \r
 156                                                                                        \r
 157 typedef struct dsih_ctrl_t                                                             \r
 158 {                                                                                      \r
 159     uint32_t address;                                                                  \r
 160     dphy_t phy_instance;                                                               \r
 161     uint8_t max_lanes;                                                                 \r
 162     uint8_t max_hs_to_lp_cycles;                                                       \r
 163     uint8_t max_lp_to_hs_cycles;                                                       \r
 164     uint16_t max_bta_cycles;                                                           \r
 165     int color_mode_polarity;                                                           \r
 166     int shut_down_polarity;                                                            \r
 167     dsih_state_t status;                                                               \r
 168     uint32_t (*core_read_function)(uint32_t addr, uint32_t offset);                    \r
 169     void (*core_write_function)(uint32_t addr, uint32_t offset, uint32_t data);        \r
 170     void (*log_error)(const char * string);                                            \r
 171     void (*log_info)(const char *fmt, ...);                                            \r
 172     void (*event_registry[DSI_MAX_EVENT])(struct dsih_ctrl_t *instance, void *handler);\r
 173 }                                                                                      \r
 174 dsih_ctrl_t;                                                                           \r
 175 typedef struct                                                                         \r
 176 {                                                                                      \r
 177     uint8_t  no_of_lanes;                                                              \r
 178     uint8_t  virtual_channel;                                                          \r
 179     dsih_video_mode_t video_mode;                                                      \r
 180     int      receive_ack_packets;                                                      \r
 181     uint32_t byte_clock;                                                               \r
 182     uint32_t pixel_clock;                                                              \r
 183     dsih_color_coding_t color_coding;                                                  \r
 184     int      is_18_loosely;                                                            \r
 185     int      data_en_polarity;                                                         \r
 186     int      h_polarity;                                                               \r
 187     uint16_t h_active_pixels; /* hadr*/                                                \r
 188     uint16_t h_sync_pixels;                                                            \r
 189     uint16_t h_back_porch_pixels;   /* hbp */                                          \r
 190     uint16_t h_total_pixels;  /* h_total */                                            \r
 191     int      v_polarity;                                                               \r
 192     uint16_t v_active_lines; /* vadr*/                                                 \r
 193     uint16_t v_sync_lines;                                                             \r
 194     uint16_t v_back_porch_lines;   /* vbp */                                           \r
 195     uint16_t v_total_lines;  /* v_total */                                             \r
 196 }                                                                                      \r
 197 dsih_dpi_video_t;                                                                      \r
 198 typedef struct                                                                         \r
 199 {                                                                                      \r
 200     uint32_t addr;                                                                     \r
 201     uint32_t data;                                                                     \r
 202 }                                                                                      \r
 203 register_config_t;                                                                     \r
 204                                                                                        \r
 205 #endif /* MIPI_DSIH_LOCAL_H_ */                                                        \r
 206                                                                                              \r