drivers/video/sc8825fb/mipi_dsih_dphy.h

   1 /*                                                                                                                   \r
   2  * @file mipi_dsih_dphy.h                                                                                            \r
   3  *                                                                                                                   \r
   4  *  Synopsys Inc.                                                                                                    \r
   5  *  SG DWC PT02                                                                                                      \r
   6  */                                                                                                                  \r
   7                                                                                                                      \r
   8 #ifndef MIPI_DSIH_DPHY_H_                                                                                            \r
   9 #define MIPI_DSIH_DPHY_H_                                                                                            \r
  10                                                                                                                      \r
  11 #include "mipi_dsih_local.h"                                                                                         \r
  12                                                                                                                      \r
  13 #define R_DSI_HOST_PHY_RSTZ         0x54UL                                                                           \r
  14 #define R_DSI_HOST_PHY_IF_CFG       0x58UL                                                                           \r
  15 #define R_DSI_HOST_PHY_IF_CTRL      0x5CUL                                                                           \r
  16 #define R_DSI_HOST_PHY_STATUS       0x60UL                                                                           \r
  17 #define R_DSI_HOST_PHY_TST_CRTL0    0x64UL                                                                           \r
  18 #define R_DSI_HOST_PHY_TST_CRTL1    0x68UL                                                                           \r
  19                                                                                                                      \r
  20 /* obligatory functions - code can be changed for different phys*/                                                   \r
  21 dsih_error_t mipi_dsih_dphy_open(dphy_t * phy);                                                                      \r
  22 dsih_error_t mipi_dsih_dphy_configure(dphy_t * phy, uint8_t no_of_lanes, uint32_t output_freq);                      \r
  23 dsih_error_t mipi_dsih_dphy_close(dphy_t * phy);                                                                     \r
  24                                                                                                                      \r
  25 void mipi_dsih_dphy_clock_en(dphy_t * instance, int en);                                                             \r
  26 void mipi_dsih_dphy_reset(dphy_t * instance, int reset);                                                             \r
  27 void mipi_dsih_dphy_shutdown(dphy_t * instance, int powerup);                                                        \r
  28                                                                                                                      \r
  29 void mipi_dsih_dphy_stop_wait_time(dphy_t * instance, uint8_t no_of_byte_cycles);                                    \r
  30 void mipi_dsih_dphy_no_of_lanes(dphy_t * instance, uint8_t no_of_lanes);                                             \r
  31 uint8_t mipi_dsih_dphy_get_no_of_lanes(dphy_t * instance);                                                           \r
  32 void mipi_dsih_dphy_enable_hs_clk(dphy_t * instance, int enable);                                                    \r
  33 dsih_error_t mipi_dsih_dphy_escape_mode_trigger(dphy_t * instance, uint8_t trigger_request);                         \r
  34 void mipi_dsih_dphy_ulps_data_lanes(dphy_t * instance, int enable);                                                  \r
  35 void mipi_dsih_dphy_ulps_clk_lane(dphy_t * instance, int enable);                                                    \r
  36 uint32_t mipi_dsih_dphy_status(dphy_t * instance, uint16_t mask);                                                    \r
  37 /* end of obligatory functions*/                                                                                     \r
  38 void mipi_dsih_dphy_test_clock(dphy_t * instance, int value);                                                        \r
  39 void mipi_dsih_dphy_test_clear(dphy_t * instance, int value);                                                        \r
  40 void mipi_dsih_dphy_test_en(dphy_t * instance, uint8_t on_falling_edge);                                             \r
  41 uint8_t mipi_dsih_dphy_test_data_out(dphy_t * instance);                                                             \r
  42 void mipi_dsih_dphy_test_data_in(dphy_t * instance, uint8_t test_data);                                              \r
  43                                                                                                                      \r
  44 void mipi_dsih_dphy_write(dphy_t * instance, uint8_t address, uint8_t * data, uint8_t data_length);                  \r
  45                                                                                                                      \r
  46 void mipi_dsih_dphy_write_word(dphy_t * instance, uint32_t reg_address, uint32_t data);                              \r
  47 void mipi_dsih_dphy_write_part(dphy_t * instance, uint32_t reg_address, uint32_t data, uint8_t shift, uint8_t width);\r
  48 uint32_t mipi_dsih_dphy_read_word(dphy_t * instance, uint32_t reg_address);                                          \r
  49 uint32_t mipi_dsih_dphy_read_part(dphy_t * instance, uint32_t reg_address, uint8_t shift, uint8_t width);            \r
  50 #endif /* MIPI_DSIH_DPHY_H_ */                                                                                       \r
  51