1 /* ==========================================================================
2 * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.c $
7 * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
8 * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
9 * otherwise expressly agreed to in writing between Synopsys and you.
11 * The Software IS NOT an item of Licensed Software or Licensed Product under
12 * any End User Software License Agreement or Agreement for Licensed Product
13 * with Synopsys or any supplement thereto. You are permitted to use and
14 * redistribute this Software in source and binary forms, with or without
15 * modification, provided that redistributions of source code must retain this
16 * notice. You may not view, use, disclose, copy or distribute this file or
17 * any information contained herein except pursuant to this license grant from
18 * Synopsys. If you do not agree with this notice, including the disclaimer
19 * below, then you are not authorized to use the Software.
21 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
25 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
32 * ========================================================================== */
35 * The dwc_otg_driver module provides the initialization and cleanup entry
36 * points for the DWC_otg driver. This module will be dynamically installed
37 * after Linux is booted using the insmod command. When the module is
38 * installed, the dwc_otg_driver_init function is called. When the module is
39 * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
41 * This module also defines a data structure for the dwc_otg_driver, which is
42 * used in conjunction with the standard ARM lm_device structure. These
43 * structures allow the OTG driver to comply with the standard Linux driver
44 * model in which devices and drivers are registered with a bus driver. This
45 * has the benefit that Linux can expose attributes of the driver and device
46 * in its special sysfs file system. Users can then read or write files in
47 * this file system to perform diagnostics on the driver components or the
51 #include <asm/errno.h>
52 #include <linux/types.h>
53 #include <linux/stat.h> /* permission constants */
60 #include "dwc_otg_dbg.h"
61 #include "dwc_otg_driver.h"
62 #include "dwc_otg_core_if.h"
63 #include "dwc_otg_pcd_if.h"
64 #include <ubi_uboot.h>
66 #define DWC_DRIVER_VERSION "2.81a 04-FEB-2009"
67 #define DWC_DRIVER_DESC "HS OTG USB Controller driver"
69 static const char dwc_driver_name[] = "dwc_otg";
72 struct dwc_otg_device *_dev
76 struct platform_device *_dev
79 extern int pcd_remove(
80 struct platform_device *_dev
83 extern void hcd_remove(
84 struct platform_device *_dev
87 /*-------------------------------------------------------------------------*/
88 /* Encapsulate the module parameter settings */
90 struct dwc_otg_driver_module_params {
94 int32_t dma_desc_enable;
95 int32_t dma_burst_size;
97 int32_t host_support_fs_ls_low_power;
98 int32_t host_ls_low_power_phy_clk;
99 int32_t enable_dynamic_fifo;
100 int32_t data_fifo_size;
101 int32_t dev_rx_fifo_size;
102 int32_t dev_nperio_tx_fifo_size;
103 uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS];
104 int32_t host_rx_fifo_size;
105 int32_t host_nperio_tx_fifo_size;
106 int32_t host_perio_tx_fifo_size;
107 int32_t max_transfer_size;
108 int32_t max_packet_count;
109 int32_t host_channels;
110 int32_t dev_endpoints;
112 int32_t phy_utmi_width;
113 int32_t phy_ulpi_ddr;
114 int32_t phy_ulpi_ext_vbus;
118 int32_t en_multiple_tx_fifo;
119 uint32_t dev_tx_fifo_size[MAX_TX_FIFOS];
121 uint32_t tx_thr_length;
122 uint32_t rx_thr_length;
127 int32_t ahb_thr_ratio;
130 static struct dwc_otg_driver_module_params dwc_otg_module_params = {
135 .dma_desc_enable = 0,
136 .dma_burst_size = -1,
138 .host_support_fs_ls_low_power = -1,
139 .host_ls_low_power_phy_clk = -1,
140 .enable_dynamic_fifo = -1,
141 .data_fifo_size = -1,
142 .dev_rx_fifo_size = 0x114,
143 .dev_nperio_tx_fifo_size = 0x10,
144 .dev_perio_tx_fifo_size = {
145 /* dev_perio_tx_fifo_size_1 */
163 .host_rx_fifo_size = -1,
164 .host_nperio_tx_fifo_size = -1,
165 .host_perio_tx_fifo_size = -1,
166 .max_transfer_size = -1,
167 .max_packet_count = -1,
171 .phy_utmi_width = -1,
173 .phy_ulpi_ext_vbus = -1,
177 .en_multiple_tx_fifo = -1,
178 #if defined( CONFIG_SC8830) || defined(CONFIG_SC9630)
179 .dev_tx_fifo_size = {
180 /* dev_tx_fifo_size */
199 .dev_tx_fifo_size = {
200 /* dev_tx_fifo_size */
231 * This function shows the Driver Version.
233 static ssize_t version_show(struct device_driver *dev, char *buf)
235 return snprintf(buf, sizeof(DWC_DRIVER_VERSION) + 2, "%s\n",
239 static DRIVER_ATTR(version, S_IRUGO, version_show, NULL);
242 * Global Debug Level Mask.
244 //uint32_t g_dbg_lvl = 0xff; /* OFF */
245 uint32_t g_dbg_lvl = DBG_CIL | DBG_PCD | DBG_PCDV; /* OFF */
249 * This function shows the driver Debug Level.
251 static ssize_t dbg_level_show(struct device_driver *drv, char *buf)
253 return sprintf(buf, "0x%0x\n", g_dbg_lvl);
257 * This function stores the driver Debug Level.
259 static ssize_t dbg_level_store(struct device_driver *drv, const char *buf,
262 g_dbg_lvl = simple_strtoul(buf, NULL, 16);
267 static DRIVER_ATTR(debuglevel, S_IRUGO | S_IWUSR, dbg_level_show,
272 * This function is called during module intialization
273 * to pass module parameters to the DWC_OTG CORE.
275 static int set_parameters(dwc_otg_core_if_t * core_if)
280 if (dwc_otg_module_params.otg_cap != -1) {
282 dwc_otg_set_param_otg_cap(core_if,
283 dwc_otg_module_params.otg_cap);
285 if (dwc_otg_module_params.dma_enable != -1) {
287 dwc_otg_set_param_dma_enable(core_if,
288 dwc_otg_module_params.
291 if (dwc_otg_module_params.dma_desc_enable != -1) {
293 dwc_otg_set_param_dma_desc_enable(core_if,
294 dwc_otg_module_params.
297 if (dwc_otg_module_params.opt != -1) {
299 dwc_otg_set_param_opt(core_if, dwc_otg_module_params.opt);
301 if (dwc_otg_module_params.dma_burst_size != -1) {
303 dwc_otg_set_param_dma_burst_size(core_if,
304 dwc_otg_module_params.
307 if (dwc_otg_module_params.host_support_fs_ls_low_power != -1) {
309 dwc_otg_set_param_host_support_fs_ls_low_power(core_if,
310 dwc_otg_module_params.
311 host_support_fs_ls_low_power);
313 if (dwc_otg_module_params.enable_dynamic_fifo != -1) {
315 dwc_otg_set_param_enable_dynamic_fifo(core_if,
316 dwc_otg_module_params.
317 enable_dynamic_fifo);
319 if (dwc_otg_module_params.data_fifo_size != -1) {
321 dwc_otg_set_param_data_fifo_size(core_if,
322 dwc_otg_module_params.
325 if (dwc_otg_module_params.dev_rx_fifo_size != -1) {
327 dwc_otg_set_param_dev_rx_fifo_size(core_if,
328 dwc_otg_module_params.
331 if (dwc_otg_module_params.dev_nperio_tx_fifo_size != -1) {
333 dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if,
334 dwc_otg_module_params.
335 dev_nperio_tx_fifo_size);
337 if (dwc_otg_module_params.host_rx_fifo_size != -1) {
339 dwc_otg_set_param_host_rx_fifo_size(core_if,
340 dwc_otg_module_params.host_rx_fifo_size);
342 if (dwc_otg_module_params.host_nperio_tx_fifo_size != -1) {
344 dwc_otg_set_param_host_nperio_tx_fifo_size(core_if,
345 dwc_otg_module_params.
346 host_nperio_tx_fifo_size);
348 if (dwc_otg_module_params.host_perio_tx_fifo_size != -1) {
350 dwc_otg_set_param_host_perio_tx_fifo_size(core_if,
351 dwc_otg_module_params.
352 host_perio_tx_fifo_size);
354 if (dwc_otg_module_params.max_transfer_size != -1) {
356 dwc_otg_set_param_max_transfer_size(core_if,
357 dwc_otg_module_params.
360 if (dwc_otg_module_params.max_packet_count != -1) {
362 dwc_otg_set_param_max_packet_count(core_if,
363 dwc_otg_module_params.
366 if (dwc_otg_module_params.host_channels != -1) {
368 dwc_otg_set_param_host_channels(core_if,
369 dwc_otg_module_params.
372 if (dwc_otg_module_params.dev_endpoints != -1) {
374 dwc_otg_set_param_dev_endpoints(core_if,
375 dwc_otg_module_params.
378 if (dwc_otg_module_params.phy_type != -1) {
380 dwc_otg_set_param_phy_type(core_if,
381 dwc_otg_module_params.phy_type);
383 if (dwc_otg_module_params.speed != -1) {
385 dwc_otg_set_param_speed(core_if,
386 dwc_otg_module_params.speed);
388 if (dwc_otg_module_params.host_ls_low_power_phy_clk != -1) {
390 dwc_otg_set_param_host_ls_low_power_phy_clk(core_if,
391 dwc_otg_module_params.
392 host_ls_low_power_phy_clk);
394 if (dwc_otg_module_params.phy_ulpi_ddr != -1) {
396 dwc_otg_set_param_phy_ulpi_ddr(core_if,
397 dwc_otg_module_params.
400 if (dwc_otg_module_params.phy_ulpi_ext_vbus != -1) {
402 dwc_otg_set_param_phy_ulpi_ext_vbus(core_if,
403 dwc_otg_module_params.
406 if (dwc_otg_module_params.phy_utmi_width != -1) {
408 dwc_otg_set_param_phy_utmi_width(core_if,
409 dwc_otg_module_params.
412 if (dwc_otg_module_params.ts_dline != -1) {
414 dwc_otg_set_param_ts_dline(core_if,
415 dwc_otg_module_params.ts_dline);
417 if (dwc_otg_module_params.i2c_enable != -1) {
419 dwc_otg_set_param_i2c_enable(core_if,
420 dwc_otg_module_params.
423 if (dwc_otg_module_params.en_multiple_tx_fifo != -1) {
425 dwc_otg_set_param_en_multiple_tx_fifo(core_if,
426 dwc_otg_module_params.
427 en_multiple_tx_fifo);
429 for (i = 0; i < 15; i++) {
430 if (dwc_otg_module_params.dev_perio_tx_fifo_size[i] != -1) {
432 dwc_otg_set_param_dev_perio_tx_fifo_size(core_if,
433 dwc_otg_module_params.
434 dev_perio_tx_fifo_size
439 for (i = 0; i < 15; i++) {
440 if (dwc_otg_module_params.dev_tx_fifo_size[i] != -1) {
441 retval += dwc_otg_set_param_dev_tx_fifo_size(core_if,
442 dwc_otg_module_params.
447 if (dwc_otg_module_params.thr_ctl != -1) {
449 dwc_otg_set_param_thr_ctl(core_if,
450 dwc_otg_module_params.thr_ctl);
452 if (dwc_otg_module_params.mpi_enable != -1) {
454 dwc_otg_set_param_mpi_enable(core_if,
455 dwc_otg_module_params.
458 if (dwc_otg_module_params.pti_enable != -1) {
460 dwc_otg_set_param_pti_enable(core_if,
461 dwc_otg_module_params.
464 if (dwc_otg_module_params.lpm_enable != -1) {
466 dwc_otg_set_param_lpm_enable(core_if,
467 dwc_otg_module_params.
470 if (dwc_otg_module_params.ic_usb_cap != -1) {
472 dwc_otg_set_param_ic_usb_cap(core_if,
473 dwc_otg_module_params.
476 if (dwc_otg_module_params.tx_thr_length != -1) {
478 dwc_otg_set_param_tx_thr_length(core_if,
479 dwc_otg_module_params.tx_thr_length);
481 if (dwc_otg_module_params.rx_thr_length != -1) {
483 dwc_otg_set_param_rx_thr_length(core_if,
484 dwc_otg_module_params.
487 if(dwc_otg_module_params.ahb_thr_ratio != -1) {
489 dwc_otg_set_param_ahb_thr_ratio(core_if, dwc_otg_module_params.ahb_thr_ratio);
495 * This function is the top level interrupt handler for the Common
496 * (Device and host modes) interrupts.
500 static irqreturn_t dwc_otg_common_irq(int irq, void *dev)
502 dwc_otg_device_t *otg_dev = dev;
503 int32_t retval = IRQ_NONE;
505 retval = dwc_otg_handle_common_intr(otg_dev->core_if);
507 S3C2410X_CLEAR_EINTPEND();
509 return IRQ_RETVAL(retval);
513 * This function is called when a lm_device is unregistered with the
514 * dwc_otg_driver. This happens, for example, when the rmmod command is
515 * executed. The device may or may not be electrically present. If it is
516 * present, the driver stops device processing. Any resources used on behalf
517 * of this device are freed.
521 dwc_otg_device_t *dwc_otg_device;
522 static int dwc_otg_driver_remove(void)
526 dwc_otg_device_t *otg_dev = platform_get_drvdata(_dev);
529 DWC_DEBUGPL(DBG_ANY, "%s(%p)\n", __func__, _dev);
532 /* Memory allocation for the dwc_otg_device failed. */
533 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
537 #ifndef DWC_DEVICE_ONLY
538 if (dwc_otg_device->hcd) {
539 hcd_remove(dwc_otg_device);
541 DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
546 #ifndef DWC_HOST_ONLY
547 if (dwc_otg_device->pcd) {
548 pcd_remove(dwc_otg_device);
555 if (otg_dev->common_irq_installed) {
556 free_irq(_dev->irq, otg_dev);
559 if (dwc_otg_device->core_if) {
560 dwc_otg_cil_remove(dwc_otg_device->core_if);
564 * Remove the device attributes
566 //dwc_otg_attr_remove(_dev);
571 //if (otg_dev->base) {
572 // iounmap(otg_dev->base);
574 dwc_free(dwc_otg_device);
577 * Clear the drvdata pointer.
579 //platform_set_drvdata(_dev, 0);
583 void udc_power_on(void);
584 #if defined( CONFIG_SC8830) || defined(CONFIG_SC9630)
586 #define USB_PHYS 0x20200000
589 #define USB_PHYS 0x20300000
592 * This function is called when an lm_device is bound to a
593 * dwc_otg_driver. It creates the driver components required to
594 * control the device (CIL, HCD, and PCD) and it initializes the
595 * device. The driver components are stored in a dwc_otg_device
596 * structure. A reference to the dwc_otg_device is saved in the
597 * lm_device. This allows the driver to access the dwc_otg_device
598 * structure on subsequent calls to driver methods for this device.
600 * @param[in] _dev Bus device
602 static int dwc_otg_driver_probe(void)
605 //dwc_otg_device_t *dwc_otg_device;
608 dwc_debug("dwc_otg_driver_probe(%p)\n", dwc_otg_device);
610 dwc_otg_device = dwc_alloc(sizeof(dwc_otg_device_t));
612 if (!dwc_otg_device) {
613 dwc_debug("kmalloc of dwc_otg_device failed\n");
618 memset(dwc_otg_device, 0, sizeof(*dwc_otg_device));
619 dwc_otg_device->reg_offset = 0xFFFFFFFF;
622 * Map the DWC_otg Core memory into virtual address space.
625 //dwc_otg_device->base = platform_get_resource(_dev, IORESOURCE_MEM, 0)->start;
626 dwc_otg_device->base = USB_PHYS;
628 if (!dwc_otg_device->base) {
629 dwc_debug("ioremap() failed\n");
633 dwc_debug("base=0x%x\n", (unsigned)dwc_otg_device->base);
635 irq = platform_get_irq(_dev, 0);
636 dwc_debug(&_dev->dev, "base=0x%08x irq:%d\n", (unsigned)dwc_otg_device->base,
640 * Initialize driver data to point to the global DWC_otg
644 // platform_set_drvdata(_dev, dwc_otg_device);
646 dwc_debug("dwc_otg_device=0x%p\n", dwc_otg_device);
648 dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->base);
649 if (!dwc_otg_device->core_if) {
650 dwc_debug("CIL initialization failed!\n");
655 * Attempt to ensure this device is really a DWC_otg Controller.
656 * Read and verify the SNPSID register contents. The value should be
657 * 0x45F42XXX, which corresponds to "OT2", as in "OTG version 2.XX".
660 if ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) !=
662 dwc_debug("Bad value for SNPSID: 0x%08x\n",
663 dwc_otg_get_gsnpsid(dwc_otg_device->core_if));
664 dwc_otg_cil_remove(dwc_otg_device->core_if);
665 dwc_free(dwc_otg_device);
671 * Validate parameter values.
673 if (set_parameters(dwc_otg_device->core_if)) {
674 dwc_otg_cil_remove(dwc_otg_device->core_if);
680 * Create Device Attributes in sysfs
682 //dwc_otg_attr_create(_dev);
685 dwc_debug("number EP=%d\n", dwc_otg_get_param_dev_endpoints(dwc_otg_device->core_if));
688 * Disable the global interrupt until all the interrupt
689 * handlers are installed.
691 dwc_otg_disable_global_interrupts(dwc_otg_device->core_if);
694 * Install the interrupt handler for the common interrupts before
695 * enabling common interrupts in core_init below.
697 DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n",
701 retval = request_irq(irq, dwc_otg_common_irq,
702 0, "dwc_otg", dwc_otg_device);
703 //SA_SHIRQ, "dwc_otg", dwc_otg_device);
705 DWC_ERROR("request of irq%d failed\n", irq);
709 dwc_otg_device->common_irq_installed = 1;
714 * Initialize the DWC_otg core.
716 dwc_otg_core_init(dwc_otg_device->core_if);
718 #ifndef DWC_HOST_ONLY
722 retval = pcd_init(dwc_otg_device);
724 DWC_ERROR("pcd_init failed\n");
725 dwc_otg_device->pcd = NULL;
729 #ifndef DWC_DEVICE_ONLY
733 retval = hcd_init(_dev);
735 DWC_ERROR("hcd_init failed\n");
736 dwc_otg_device->hcd = NULL;
741 #ifndef DWC_HS_ELECT_TST
745 * Enable the global interrupt after all the interrupt
746 * handlers are installed.
748 dwc_otg_enable_global_interrupts(dwc_otg_device->core_if);
757 * This structure defines the methods to be called by a bus driver
758 * during the lifecycle of a device on that bus. Both drivers and
759 * devices are registered with a bus driver. The bus driver matches
760 * devices to drivers based on information in the device and driver
763 * The probe function is called when the bus driver matches a device
764 * to this driver. The remove function is called when a device is
765 * unregistered with the bus driver.
768 static struct platform_driver dwc_otg_driver = {
771 .owner = THIS_MODULE,
774 .probe = dwc_otg_driver_probe,
775 .remove = dwc_otg_driver_remove,
780 * This function is called when the dwc_otg_driver is installed with the
781 * insmod command. It registers the dwc_otg_driver structure with the
782 * appropriate bus driver. This will cause the dwc_otg_driver_probe function
783 * to be called. In addition, the bus driver will automatically expose
784 * attributes defined for the device and driver in the special sysfs file
790 int dwc_otg_driver_init(void)
794 dwc_debug("%s: version %s\n", dwc_driver_name,
796 dwc_debug("Working version %s\n", "No 007 - 10/24/2007");
800 //retval = platform_driver_probe(&dwc_otg_driver, dwc_otg_driver_probe);
801 retval = dwc_otg_driver_probe();
803 dwc_debug("%s retval=%d\n", __func__, retval);
807 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_version);
808 error = driver_create_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
812 void dwc_otg_driver_cleanup(void)
814 dwc_debug(KERN_DEBUG "dwc_otg_driver_cleanup()\n");
816 dwc_otg_driver_remove();
818 //driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
819 //driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version);
820 //platform_driver_unregister(&dwc_otg_driver);
822 dwc_debug(KERN_INFO "%s module removed\n", dwc_driver_name);
826 module_init(dwc_otg_driver_init);
829 * This function is called when the driver is removed from the kernel
830 * with the rmmod command. The driver unregisters itself with its bus
834 static void __exit dwc_otg_driver_cleanup(void)
836 dwc_debug(KERN_DEBUG "dwc_otg_driver_cleanup()\n");
839 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel);
840 driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version);
841 platform_driver_unregister(&dwc_otg_driver);
843 dwc_debug(KERN_INFO "%s module removed\n", dwc_driver_name);
845 module_exit(dwc_otg_driver_cleanup);
847 MODULE_DESCRIPTION(DWC_DRIVER_DESC);
848 MODULE_AUTHOR("Synopsys Inc.");
849 MODULE_LICENSE("GPL");
851 module_param_named(otg_cap, dwc_otg_module_params.otg_cap, int, 0444);
852 MODULE_PARM_DESC(otg_cap, "OTG Capabilities 0=HNP&SRP 1=SRP Only 2=None");
853 module_param_named(opt, dwc_otg_module_params.opt, int, 0444);
854 MODULE_PARM_DESC(opt, "OPT Mode");
855 module_param_named(dma_enable, dwc_otg_module_params.dma_enable, int, 0444);
856 MODULE_PARM_DESC(dma_enable, "DMA Mode 0=Slave 1=DMA enabled");
858 module_param_named(dma_desc_enable, dwc_otg_module_params.dma_desc_enable, int,
860 MODULE_PARM_DESC(dma_desc_enable,
861 "DMA Desc Mode 0=Address DMA 1=DMA Descriptor enabled");
863 module_param_named(dma_burst_size, dwc_otg_module_params.dma_burst_size, int,
865 MODULE_PARM_DESC(dma_burst_size,
866 "DMA Burst Size 1, 4, 8, 16, 32, 64, 128, 256");
867 module_param_named(speed, dwc_otg_module_params.speed, int, 0444);
868 MODULE_PARM_DESC(speed, "Speed 0=High Speed 1=Full Speed");
869 module_param_named(host_support_fs_ls_low_power,
870 dwc_otg_module_params.host_support_fs_ls_low_power, int,
872 MODULE_PARM_DESC(host_support_fs_ls_low_power,
873 "Support Low Power w/FS or LS 0=Support 1=Don't Support");
874 module_param_named(host_ls_low_power_phy_clk,
875 dwc_otg_module_params.host_ls_low_power_phy_clk, int, 0444);
876 MODULE_PARM_DESC(host_ls_low_power_phy_clk,
877 "Low Speed Low Power Clock 0=48Mhz 1=6Mhz");
878 module_param_named(enable_dynamic_fifo,
879 dwc_otg_module_params.enable_dynamic_fifo, int, 0444);
880 MODULE_PARM_DESC(enable_dynamic_fifo, "0=cC Setting 1=Allow Dynamic Sizing");
881 module_param_named(data_fifo_size, dwc_otg_module_params.data_fifo_size, int,
883 MODULE_PARM_DESC(data_fifo_size,
884 "Total number of words in the data FIFO memory 32-32768");
885 module_param_named(dev_rx_fifo_size, dwc_otg_module_params.dev_rx_fifo_size,
887 MODULE_PARM_DESC(dev_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
888 module_param_named(dev_nperio_tx_fifo_size,
889 dwc_otg_module_params.dev_nperio_tx_fifo_size, int, 0444);
890 MODULE_PARM_DESC(dev_nperio_tx_fifo_size,
891 "Number of words in the non-periodic Tx FIFO 16-32768");
892 module_param_named(dev_perio_tx_fifo_size_1,
893 dwc_otg_module_params.dev_perio_tx_fifo_size[0], int, 0444);
894 MODULE_PARM_DESC(dev_perio_tx_fifo_size_1,
895 "Number of words in the periodic Tx FIFO 4-768");
896 module_param_named(dev_perio_tx_fifo_size_2,
897 dwc_otg_module_params.dev_perio_tx_fifo_size[1], int, 0444);
898 MODULE_PARM_DESC(dev_perio_tx_fifo_size_2,
899 "Number of words in the periodic Tx FIFO 4-768");
900 module_param_named(dev_perio_tx_fifo_size_3,
901 dwc_otg_module_params.dev_perio_tx_fifo_size[2], int, 0444);
902 MODULE_PARM_DESC(dev_perio_tx_fifo_size_3,
903 "Number of words in the periodic Tx FIFO 4-768");
904 module_param_named(dev_perio_tx_fifo_size_4,
905 dwc_otg_module_params.dev_perio_tx_fifo_size[3], int, 0444);
906 MODULE_PARM_DESC(dev_perio_tx_fifo_size_4,
907 "Number of words in the periodic Tx FIFO 4-768");
908 module_param_named(dev_perio_tx_fifo_size_5,
909 dwc_otg_module_params.dev_perio_tx_fifo_size[4], int, 0444);
910 MODULE_PARM_DESC(dev_perio_tx_fifo_size_5,
911 "Number of words in the periodic Tx FIFO 4-768");
912 module_param_named(dev_perio_tx_fifo_size_6,
913 dwc_otg_module_params.dev_perio_tx_fifo_size[5], int, 0444);
914 MODULE_PARM_DESC(dev_perio_tx_fifo_size_6,
915 "Number of words in the periodic Tx FIFO 4-768");
916 module_param_named(dev_perio_tx_fifo_size_7,
917 dwc_otg_module_params.dev_perio_tx_fifo_size[6], int, 0444);
918 MODULE_PARM_DESC(dev_perio_tx_fifo_size_7,
919 "Number of words in the periodic Tx FIFO 4-768");
920 module_param_named(dev_perio_tx_fifo_size_8,
921 dwc_otg_module_params.dev_perio_tx_fifo_size[7], int, 0444);
922 MODULE_PARM_DESC(dev_perio_tx_fifo_size_8,
923 "Number of words in the periodic Tx FIFO 4-768");
924 module_param_named(dev_perio_tx_fifo_size_9,
925 dwc_otg_module_params.dev_perio_tx_fifo_size[8], int, 0444);
926 MODULE_PARM_DESC(dev_perio_tx_fifo_size_9,
927 "Number of words in the periodic Tx FIFO 4-768");
928 module_param_named(dev_perio_tx_fifo_size_10,
929 dwc_otg_module_params.dev_perio_tx_fifo_size[9], int, 0444);
930 MODULE_PARM_DESC(dev_perio_tx_fifo_size_10,
931 "Number of words in the periodic Tx FIFO 4-768");
932 module_param_named(dev_perio_tx_fifo_size_11,
933 dwc_otg_module_params.dev_perio_tx_fifo_size[10], int, 0444);
934 MODULE_PARM_DESC(dev_perio_tx_fifo_size_11,
935 "Number of words in the periodic Tx FIFO 4-768");
936 module_param_named(dev_perio_tx_fifo_size_12,
937 dwc_otg_module_params.dev_perio_tx_fifo_size[11], int, 0444);
938 MODULE_PARM_DESC(dev_perio_tx_fifo_size_12,
939 "Number of words in the periodic Tx FIFO 4-768");
940 module_param_named(dev_perio_tx_fifo_size_13,
941 dwc_otg_module_params.dev_perio_tx_fifo_size[12], int, 0444);
942 MODULE_PARM_DESC(dev_perio_tx_fifo_size_13,
943 "Number of words in the periodic Tx FIFO 4-768");
944 module_param_named(dev_perio_tx_fifo_size_14,
945 dwc_otg_module_params.dev_perio_tx_fifo_size[13], int, 0444);
946 MODULE_PARM_DESC(dev_perio_tx_fifo_size_14,
947 "Number of words in the periodic Tx FIFO 4-768");
948 module_param_named(dev_perio_tx_fifo_size_15,
949 dwc_otg_module_params.dev_perio_tx_fifo_size[14], int, 0444);
950 MODULE_PARM_DESC(dev_perio_tx_fifo_size_15,
951 "Number of words in the periodic Tx FIFO 4-768");
952 module_param_named(host_rx_fifo_size, dwc_otg_module_params.host_rx_fifo_size,
954 MODULE_PARM_DESC(host_rx_fifo_size, "Number of words in the Rx FIFO 16-32768");
955 module_param_named(host_nperio_tx_fifo_size,
956 dwc_otg_module_params.host_nperio_tx_fifo_size, int, 0444);
957 MODULE_PARM_DESC(host_nperio_tx_fifo_size,
958 "Number of words in the non-periodic Tx FIFO 16-32768");
959 module_param_named(host_perio_tx_fifo_size,
960 dwc_otg_module_params.host_perio_tx_fifo_size, int, 0444);
961 MODULE_PARM_DESC(host_perio_tx_fifo_size,
962 "Number of words in the host periodic Tx FIFO 16-32768");
963 module_param_named(max_transfer_size, dwc_otg_module_params.max_transfer_size,
965 /** @todo Set the max to 512K, modify checks */
966 MODULE_PARM_DESC(max_transfer_size,
967 "The maximum transfer size supported in bytes 2047-65535");
968 module_param_named(max_packet_count, dwc_otg_module_params.max_packet_count,
970 MODULE_PARM_DESC(max_packet_count,
971 "The maximum number of packets in a transfer 15-511");
972 module_param_named(host_channels, dwc_otg_module_params.host_channels, int,
974 MODULE_PARM_DESC(host_channels,
975 "The number of host channel registers to use 1-16");
976 module_param_named(dev_endpoints, dwc_otg_module_params.dev_endpoints, int,
978 MODULE_PARM_DESC(dev_endpoints,
979 "The number of endpoints in addition to EP0 available for device mode 1-15");
980 module_param_named(phy_type, dwc_otg_module_params.phy_type, int, 0444);
981 MODULE_PARM_DESC(phy_type, "0=Reserved 1=UTMI+ 2=ULPI");
982 module_param_named(phy_utmi_width, dwc_otg_module_params.phy_utmi_width, int,
984 MODULE_PARM_DESC(phy_utmi_width, "Specifies the UTMI+ Data Width 8 or 16 bits");
985 module_param_named(phy_ulpi_ddr, dwc_otg_module_params.phy_ulpi_ddr, int, 0444);
986 MODULE_PARM_DESC(phy_ulpi_ddr,
987 "ULPI at double or single data rate 0=Single 1=Double");
988 module_param_named(phy_ulpi_ext_vbus, dwc_otg_module_params.phy_ulpi_ext_vbus,
990 MODULE_PARM_DESC(phy_ulpi_ext_vbus,
991 "ULPI PHY using internal or external vbus 0=Internal");
992 module_param_named(i2c_enable, dwc_otg_module_params.i2c_enable, int, 0444);
993 MODULE_PARM_DESC(i2c_enable, "FS PHY Interface");
994 module_param_named(ulpi_fs_ls, dwc_otg_module_params.ulpi_fs_ls, int, 0444);
995 MODULE_PARM_DESC(ulpi_fs_ls, "ULPI PHY FS/LS mode only");
996 module_param_named(ts_dline, dwc_otg_module_params.ts_dline, int, 0444);
997 MODULE_PARM_DESC(ts_dline, "Term select Dline pulsing for all PHYs");
998 module_param_named(debug, g_dbg_lvl, int, 0444);
999 MODULE_PARM_DESC(debug, "");
1001 module_param_named(en_multiple_tx_fifo,
1002 dwc_otg_module_params.en_multiple_tx_fifo, int, 0444);
1003 MODULE_PARM_DESC(en_multiple_tx_fifo,
1004 "Dedicated Non Periodic Tx FIFOs 0=disabled 1=enabled");
1005 module_param_named(dev_tx_fifo_size_1,
1006 dwc_otg_module_params.dev_tx_fifo_size[0], int, 0444);
1007 MODULE_PARM_DESC(dev_tx_fifo_size_1, "Number of words in the Tx FIFO 4-768");
1008 module_param_named(dev_tx_fifo_size_2,
1009 dwc_otg_module_params.dev_tx_fifo_size[1], int, 0444);
1010 MODULE_PARM_DESC(dev_tx_fifo_size_2, "Number of words in the Tx FIFO 4-768");
1011 module_param_named(dev_tx_fifo_size_3,
1012 dwc_otg_module_params.dev_tx_fifo_size[2], int, 0444);
1013 MODULE_PARM_DESC(dev_tx_fifo_size_3, "Number of words in the Tx FIFO 4-768");
1014 module_param_named(dev_tx_fifo_size_4,
1015 dwc_otg_module_params.dev_tx_fifo_size[3], int, 0444);
1016 MODULE_PARM_DESC(dev_tx_fifo_size_4, "Number of words in the Tx FIFO 4-768");
1017 module_param_named(dev_tx_fifo_size_5,
1018 dwc_otg_module_params.dev_tx_fifo_size[4], int, 0444);
1019 MODULE_PARM_DESC(dev_tx_fifo_size_5, "Number of words in the Tx FIFO 4-768");
1020 module_param_named(dev_tx_fifo_size_6,
1021 dwc_otg_module_params.dev_tx_fifo_size[5], int, 0444);
1022 MODULE_PARM_DESC(dev_tx_fifo_size_6, "Number of words in the Tx FIFO 4-768");
1023 module_param_named(dev_tx_fifo_size_7,
1024 dwc_otg_module_params.dev_tx_fifo_size[6], int, 0444);
1025 MODULE_PARM_DESC(dev_tx_fifo_size_7, "Number of words in the Tx FIFO 4-768");
1026 module_param_named(dev_tx_fifo_size_8,
1027 dwc_otg_module_params.dev_tx_fifo_size[7], int, 0444);
1028 MODULE_PARM_DESC(dev_tx_fifo_size_8, "Number of words in the Tx FIFO 4-768");
1029 module_param_named(dev_tx_fifo_size_9,
1030 dwc_otg_module_params.dev_tx_fifo_size[8], int, 0444);
1031 MODULE_PARM_DESC(dev_tx_fifo_size_9, "Number of words in the Tx FIFO 4-768");
1032 module_param_named(dev_tx_fifo_size_10,
1033 dwc_otg_module_params.dev_tx_fifo_size[9], int, 0444);
1034 MODULE_PARM_DESC(dev_tx_fifo_size_10, "Number of words in the Tx FIFO 4-768");
1035 module_param_named(dev_tx_fifo_size_11,
1036 dwc_otg_module_params.dev_tx_fifo_size[10], int, 0444);
1037 MODULE_PARM_DESC(dev_tx_fifo_size_11, "Number of words in the Tx FIFO 4-768");
1038 module_param_named(dev_tx_fifo_size_12,
1039 dwc_otg_module_params.dev_tx_fifo_size[11], int, 0444);
1040 MODULE_PARM_DESC(dev_tx_fifo_size_12, "Number of words in the Tx FIFO 4-768");
1041 module_param_named(dev_tx_fifo_size_13,
1042 dwc_otg_module_params.dev_tx_fifo_size[12], int, 0444);
1043 MODULE_PARM_DESC(dev_tx_fifo_size_13, "Number of words in the Tx FIFO 4-768");
1044 module_param_named(dev_tx_fifo_size_14,
1045 dwc_otg_module_params.dev_tx_fifo_size[13], int, 0444);
1046 MODULE_PARM_DESC(dev_tx_fifo_size_14, "Number of words in the Tx FIFO 4-768");
1047 module_param_named(dev_tx_fifo_size_15,
1048 dwc_otg_module_params.dev_tx_fifo_size[14], int, 0444);
1049 MODULE_PARM_DESC(dev_tx_fifo_size_15, "Number of words in the Tx FIFO 4-768");
1051 module_param_named(thr_ctl, dwc_otg_module_params.thr_ctl, int, 0444);
1052 MODULE_PARM_DESC(thr_ctl,
1053 "Thresholding enable flag bit 0 - non ISO Tx thr., 1 - ISO Tx thr., 2 - Rx thr.- bit 0=disabled 1=enabled");
1054 module_param_named(tx_thr_length, dwc_otg_module_params.tx_thr_length, int,
1056 MODULE_PARM_DESC(tx_thr_length, "Tx Threshold length in 32 bit DWORDs");
1057 module_param_named(rx_thr_length, dwc_otg_module_params.rx_thr_length, int,
1059 MODULE_PARM_DESC(rx_thr_length, "Rx Threshold length in 32 bit DWORDs");
1061 module_param_named(pti_enable, dwc_otg_module_params.pti_enable, int, 0444);
1062 module_param_named(mpi_enable, dwc_otg_module_params.mpi_enable, int, 0444);
1063 module_param_named(lpm_enable, dwc_otg_module_params.lpm_enable, int, 0444);
1064 MODULE_PARM_DESC(lpm_enable, "LPM Enable 0=LPM Disabled 1=LPM Enabled");
1065 module_param_named(ic_usb_cap, dwc_otg_module_params.ic_usb_cap, int, 0444);
1066 MODULE_PARM_DESC(ic_usb_cap,
1067 "IC_USB Capability 0=IC_USB Disabled 1=IC_USB Enabled");
1068 module_param_named(ahb_thr_ratio, dwc_otg_module_params.ahb_thr_ratio, int, 0444);
1069 MODULE_PARM_DESC(ahb_thr_ratio, "AHB Threshold Ratio");
1071 /** @page "Module Parameters"
1073 * The following parameters may be specified when starting the module.
1074 * These parameters define how the DWC_otg controller should be
1075 * configured. Parameter values are passed to the CIL initialization
1076 * function dwc_otg_cil_init
1078 * Example: <code>modprobe dwc_otg speed=1 otg_cap=1</code>
1082 <tr><td>Parameter Name</td><td>Meaning</td></tr>
1086 <td>Specifies the OTG capabilities. The driver will automatically detect the
1087 value for this parameter if none is specified.
1088 - 0: HNP and SRP capable (default, if available)
1089 - 1: SRP Only capable
1090 - 2: No HNP/SRP capable
1095 <td>Specifies whether to use slave or DMA mode for accessing the data FIFOs.
1096 The driver will automatically detect the value for this parameter if none is
1099 - 1: DMA (default, if available)
1103 <td>dma_burst_size</td>
1104 <td>The DMA Burst size (applicable only for External DMA Mode).
1105 - Values: 1, 4, 8 16, 32, 64, 128, 256 (default 32)
1110 <td>Specifies the maximum speed of operation in host and device mode. The
1111 actual speed depends on the speed of the attached device and the value of
1113 - 0: High Speed (default)
1118 <td>host_support_fs_ls_low_power</td>
1119 <td>Specifies whether low power mode is supported when attached to a Full
1120 Speed or Low Speed device in host mode.
1121 - 0: Don't support low power mode (default)
1122 - 1: Support low power mode
1126 <td>host_ls_low_power_phy_clk</td>
1127 <td>Specifies the PHY clock rate in low power mode when connected to a Low
1128 Speed device in host mode. This parameter is applicable only if
1129 HOST_SUPPORT_FS_LS_LOW_POWER is enabled.
1130 - 0: 48 MHz (default)
1135 <td>enable_dynamic_fifo</td>
1136 <td> Specifies whether FIFOs may be resized by the driver software.
1137 - 0: Use cC FIFO size parameters
1138 - 1: Allow dynamic FIFO sizing (default)
1142 <td>data_fifo_size</td>
1143 <td>Total number of 4-byte words in the data FIFO memory. This memory
1144 includes the Rx FIFO, non-periodic Tx FIFO, and periodic Tx FIFOs.
1145 - Values: 32 to 32768 (default 8192)
1147 Note: The total FIFO memory depth in the FPGA configuration is 8192.
1151 <td>dev_rx_fifo_size</td>
1152 <td>Number of 4-byte words in the Rx FIFO in device mode when dynamic
1153 FIFO sizing is enabled.
1154 - Values: 16 to 32768 (default 1064)
1158 <td>dev_nperio_tx_fifo_size</td>
1159 <td>Number of 4-byte words in the non-periodic Tx FIFO in device mode when
1160 dynamic FIFO sizing is enabled.
1161 - Values: 16 to 32768 (default 1024)
1165 <td>dev_perio_tx_fifo_size_n (n = 1 to 15)</td>
1166 <td>Number of 4-byte words in each of the periodic Tx FIFOs in device mode
1167 when dynamic FIFO sizing is enabled.
1168 - Values: 4 to 768 (default 256)
1172 <td>host_rx_fifo_size</td>
1173 <td>Number of 4-byte words in the Rx FIFO in host mode when dynamic FIFO
1175 - Values: 16 to 32768 (default 1024)
1179 <td>host_nperio_tx_fifo_size</td>
1180 <td>Number of 4-byte words in the non-periodic Tx FIFO in host mode when
1181 dynamic FIFO sizing is enabled in the core.
1182 - Values: 16 to 32768 (default 1024)
1186 <td>host_perio_tx_fifo_size</td>
1187 <td>Number of 4-byte words in the host periodic Tx FIFO when dynamic FIFO
1189 - Values: 16 to 32768 (default 1024)
1193 <td>max_transfer_size</td>
1194 <td>The maximum transfer size supported in bytes.
1195 - Values: 2047 to 65,535 (default 65,535)
1199 <td>max_packet_count</td>
1200 <td>The maximum number of packets in a transfer.
1201 - Values: 15 to 511 (default 511)
1205 <td>host_channels</td>
1206 <td>The number of host channel registers to use.
1207 - Values: 1 to 16 (default 12)
1209 Note: The FPGA configuration supports a maximum of 12 host channels.
1213 <td>dev_endpoints</td>
1214 <td>The number of endpoints in addition to EP0 available for device mode
1216 - Values: 1 to 15 (default 6 IN and OUT)
1218 Note: The FPGA configuration supports a maximum of 6 IN and OUT endpoints in
1224 <td>Specifies the type of PHY interface to use. By default, the driver will
1225 automatically detect the phy_type.
1227 - 1: UTMI+ (default, if available)
1232 <td>phy_utmi_width</td>
1233 <td>Specifies the UTMI+ Data Width. This parameter is applicable for a
1234 phy_type of UTMI+. Also, this parameter is applicable only if the
1235 OTG_HSPHY_WIDTH cC parameter was set to "8 and 16 bits", meaning that the
1236 core has been configured to work at either data path width.
1237 - Values: 8 or 16 bits (default 16)
1241 <td>phy_ulpi_ddr</td>
1242 <td>Specifies whether the ULPI operates at double or single data rate. This
1243 parameter is only applicable if phy_type is ULPI.
1244 - 0: single data rate ULPI interface with 8 bit wide data bus (default)
1245 - 1: double data rate ULPI interface with 4 bit wide data bus
1250 <td>Specifies whether to use the I2C interface for full speed PHY. This
1251 parameter is only applicable if PHY_TYPE is FS.
1252 - 0: Disabled (default)
1257 <td>otg_en_multiple_tx_fifo</td>
1258 <td>Specifies whether dedicatedto tx fifos are enabled for non periodic IN EPs.
1259 The driver will automatically detect the value for this parameter if none is
1262 - 1: Enabled (default, if available)
1266 <td>dev_tx_fifo_size_n (n = 1 to 15)</td>
1267 <td>Number of 4-byte words in each of the Tx FIFOs in device mode
1268 when dynamic FIFO sizing is enabled.
1269 - Values: 4 to 768 (default 256)
1273 <td>tx_thr_length</td>
1274 <td>Transmit Threshold length in 32 bit double words
1275 - Values: 8 to 128 (default 64)
1279 <td>rx_thr_length</td>
1280 <td>Receive Threshold length in 32 bit double words
1281 - Values: 8 to 128 (default 64)
1286 <td>Specifies whether to enable Thresholding for Device mode. Bits 0, 1, 2 of this
1287 parmater specifies if thresholding is enabled for non-Iso Tx, Iso Tx and Rx
1288 transfers accordingly.
1289 The driver will automatically detect the value for this parameter if none is
1291 - Values: 0 to 7 (default 0)
1292 Bit values indicate:
1293 - 0: Thresholding disabled
1294 - 1: Thresholding enabled
1298 <td>dma_desc_enable</td>
1299 <td>Specifies whether to enable Descriptor DMA mode.
1300 The driver will automatically detect the value for this parameter if none is
1302 - 0: Descriptor DMA disabled
1303 - 1: Descriptor DMA (default, if available)
1308 <td>Specifies whether to enable MPI enhancement mode.
1309 The driver will automatically detect the value for this parameter if none is
1311 - 0: MPI disabled (default)
1317 <td>Specifies whether to enable PTI enhancement support.
1318 The driver will automatically detect the value for this parameter if none is
1320 - 0: PTI disabled (default)
1326 <td>Specifies whether to enable LPM support.
1327 The driver will automatically detect the value for this parameter if none is
1330 - 1: LPM enable (default, if available)
1334 <td>ahb_thr_ratio</td>
1335 <td>Specifies AHB Threshold ratio.
1336 - Values: 0 to 3 (default 0)