2 * sound/soc/sprd/codec/sprd/sprd-codec.h
4 * SPRD-CODEC -- SpreadTrum Tiger intergrated codec.
6 * Copyright (C) 2012 SpreadTrum Ltd.
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY ork FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 #ifndef __SPRD_CODEC_H
18 #define __SPRD_CODEC_H
20 #include <asm/arch/regs_adi.h>
21 #include <asm/arch/regs_global.h>
22 #include <asm/arch/sprd-audio.h>
23 #include <asm/arch/adi.h>
26 #ifndef CONFIG_SPRD_CODEC_USE_INT
27 /* #define CONFIG_SPRD_CODEC_USE_INT */
29 #ifndef CONFIG_CODEC_DAC_MUTE_WAIT
30 /* #define CONFIG_CODEC_DAC_MUTE_WAIT */
34 #define SPRD_CODEC_LDO_WAIT_TIME (5)
35 #define SPRD_CODEC_LDO_VCM_TIME (2)
36 #ifdef CONFIG_SPRD_CODEC_USE_INT
37 #define SPRD_CODEC_DAC_MUTE_TIMEOUT (600)
39 #define SPRD_CODEC_DAC_MUTE_WAIT_TIME (40)
42 #ifdef CONFIG_SPRD_CODEC_USE_INT
43 #define SPRD_CODEC_HP_POP_TIMEOUT (1000)
45 #define SPRD_CODEC_HP_POP_TIME_STEP (10)
46 #define SPRD_CODEC_HP_POP_TIME_COUNT (80) /* max 800ms will timeout */
49 #define SPRD_CODEC_RATE_8000 (10)
50 #define SPRD_CODEC_RATE_9600 ( 9)
51 #define SPRD_CODEC_RATE_11025 ( 8)
52 #define SPRD_CODEC_RATE_12000 ( 7)
53 #define SPRD_CODEC_RATE_16000 ( 6)
54 #define SPRD_CODEC_RATE_22050 ( 5)
55 #define SPRD_CODEC_RATE_24000 ( 4)
56 #define SPRD_CODEC_RATE_32000 ( 3)
57 #define SPRD_CODEC_RATE_44100 ( 2)
58 #define SPRD_CODEC_RATE_48000 ( 1)
59 #define SPRD_CODEC_RATE_96000 ( 0)
68 #define DAC_MUTE_START (14)
69 #define DAC_MUTE_EN (15)
72 #define DAC_MUTE_U_MASK (5)
73 #define DAC_MUTE_D_MASK (4)
74 #define DAC_MUTE_U_RAW (3)
75 #define DAC_MUTE_D_RAW (2)
76 #define DAC_MUTE_ST (0)
77 #define DAC_MUTE_ST_MASK (0x3)
81 #define DAC_MUTE_U (1)
82 #define DAC_MUTE_D (0)
85 #define AUDIFA_DAC_EN (0)
86 #define AUDIFA_ADC_EN (1)
87 #define AUDIFA_ADIE_LOOP_EN (3)
93 #define AUDIO_POP_IRQ (7)
96 #define PA_OCP_IRQ (4)
97 #define LOR_OCP_IRQ (3)
98 #define LOL_OCP_IRQ (2)
99 #define EAR_OCP_IRQ (1)
100 #define HP_OCP_IRQ (0)
105 #define BG_IBIAS_EN (5)
107 #define VCM_BUF_EN (3)
109 #define MICBIAS_EN (1)
110 #define AUXMICBIAS_EN (0)
114 #define PA_LDO_EN (6)
116 #define PAR_SW_EN (4)
117 #define PAR_LDO_EN (3)
120 #define OVP_LDO_EN (0)
131 #define MIC_LDO_V_21 (0)
132 #define MIC_LDO_V_19 (1)
133 #define MIC_LDO_V_23 (2)
134 #define MIC_LDO_V_25 (3)
138 #define VCM_V_MASK (0x7)
139 #define MICBIAS_V (3)
140 #define MICBIAS_V_MASK (0x3)
141 #define AUXMICBIAS_V (1)
142 #define AUXMICBIAS_V_MASK (0x3)
145 #define PA_SWOCP_PD (7)
146 #define PA_LDOOCP_PD (6)
148 #define PA_LDO_V_MASK (0x7)
151 #define BG_I_MASK (0x3)
154 #define ADC_IBUF_PD (7)
155 #define ADC_VREF1P5 (6)
160 #define FM_REC_EN (1)
163 #define ADCPGAL_PD (7)
164 #define ADCPGAL_BYP (6)
165 #define ADCPGAR_PD (5)
166 #define ADCPGAR_BYP (4)
167 #define ADCPGAL_P_EN (3)
168 #define ADCPGAL_N_EN (2)
169 #define ADCPGAR_P_EN (1)
170 #define ADCPGAR_N_EN (0)
173 #define MICP_ADCL (7)
174 #define MICN_ADCL (6)
175 #define MICP_ADCR (5)
176 #define MICN_ADCR (4)
177 #define HPMICP_ADCL (3)
178 #define HPMICN_ADCL (2)
179 #define HPMICP_ADCR (1)
180 #define HPMICN_ADCR (0)
183 #define AUXMICP_ADCL (7)
184 #define AUXMICN_ADCL (6)
185 #define AUXMICP_ADCR (5)
186 #define AUXMICN_ADCR (4)
202 #define ADCL_P_HPL (7)
203 #define ADCL_N_HPR (6)
204 #define ADCR_P_HPL (5)
205 #define ADCR_P_HPR (4)
206 #define DACL_P_HPL (3)
207 #define DACL_N_HPR (2)
208 #define DACR_P_HPL (1)
209 #define DACR_P_HPR (0)
212 #define ADCL_P_AOLP (7)
213 #define ADCL_N_AOLN (6)
214 #define ADCR_P_AOLP (5)
215 #define ADCR_N_AOLN (4)
216 #define DACL_P_AOLP (3)
217 #define DACL_N_AOLN (2)
218 #define DACR_P_AOLP (1)
219 #define DACR_N_AOLN (0)
222 #define ADCL_P_AORP (7)
223 #define ADCL_N_AORN (6)
224 #define ADCR_P_AORP (5)
225 #define ADCR_N_AORN (4)
226 #define DACL_P_AORP (3)
227 #define DACL_N_AORN (2)
228 #define DACR_P_AORP (1)
229 #define DACR_N_AORN (0)
232 #define DACL_P_EARP (7)
233 #define DACL_N_EARN (6)
245 #define PA_DTRI_F (5)
246 #define PA_DTRI_F_MASK (0x03)
247 #define PA_DEMI_EN (4)
249 #define PA_SS_RST (2)
250 #define DRV_STOP_EN (1)
253 #define DRV_OCP_AOL_PD (7)
254 #define DRV_OCP_AOR_PD (6)
255 #define DRV_OCP_EAR_PD (5)
256 #define DRV_OCP_HP_PD (4)
259 #define HP_POP_CTL (6)
260 #define HP_POP_CTL_MASK (0x03)
261 #define HP_POP_CTL_DIS (0)
262 #define HP_POP_CTL_UP (1)
263 #define HP_POP_CTL_DOWN (2)
264 #define HP_POP_CTL_HOLD (3)
266 #define HP_POP_STEP (3)
267 #define HP_POP_STEP_MASK (0x07)
268 #define HP_POP_STEP_012 (0)
269 #define HP_POP_STEP_025 (1)
270 #define HP_POP_STEP_05 (2)
271 #define HP_POP_STEP_1 (3)
272 #define HP_POP_STEP_2 (4)
273 #define HP_POP_STEP_4 (5)
274 #define HP_POP_STEP_8 (6)
275 #define HP_POP_STEP_16 (7)
278 #define CLK_REVERSE (7)
279 #define ADC_CLK_PD (6)
280 #define ADC_CLK_RST (5)
281 #define DAC_CLK_EN (4)
282 #define DRV_CLK_EN (3)
285 #define HP_POP_FLG (4)
286 #define HP_POP_FLG_MASK (0x03)
287 #define HP_POP_FLG_NEAR_CMP (3)
289 #define SPRD_CODEC_DP_BASE (CODEC_DP_BASE)
291 #define AUD_TOP_CTL (SPRD_CODEC_DP_BASE + 0x0000)
292 #define AUD_AUD_CTL (SPRD_CODEC_DP_BASE + 0x0004)
293 #define AUD_I2S_CTL (SPRD_CODEC_DP_BASE + 0x0008)
294 #define AUD_DAC_CTL (SPRD_CODEC_DP_BASE + 0x000C)
295 #define AUD_SDM_CTL0 (SPRD_CODEC_DP_BASE + 0x0010)
296 #define AUD_SDM_CTL1 (SPRD_CODEC_DP_BASE + 0x0014)
297 #define AUD_ADC_CTL (SPRD_CODEC_DP_BASE + 0x0018)
298 #define AUD_LOOP_CTL (SPRD_CODEC_DP_BASE + 0x001C)
299 #define AUD_AUD_STS0 (SPRD_CODEC_DP_BASE + 0x0020)
300 #define AUD_INT_CLR (SPRD_CODEC_DP_BASE + 0x0024)
301 #define AUD_INT_EN (SPRD_CODEC_DP_BASE + 0x0028)
303 #define SPRD_CODEC_DP_END (SPRD_CODEC_DP_BASE + 0x002C)
304 #define IS_SPRD_CODEC_DP_RANG(reg) (((reg) >= SPRD_CODEC_DP_BASE) && ((reg) < SPRD_CODEC_DP_END))
306 #define SPRD_CODEC_AP_BASE (CODEC_AP_BASE)
308 #define AUDIF_ENB (SPRD_CODEC_AP_BASE + 0x0000)
309 #define AUDIF_CLR (SPRD_CODEC_AP_BASE + 0x0004)
310 #define AUDIF_SYNC_CTL (SPRD_CODEC_AP_BASE + 0x0008)
311 #define AUDIF_OCPTMR_CTL (SPRD_CODEC_AP_BASE + 0x000C)
312 #define AUDIF_OTPTMR_CTL (SPRD_CODEC_AP_BASE + 0x0010)
313 #define AUDIF_SHUTDOWN_CTL (SPRD_CODEC_AP_BASE + 0x0014)
314 #define AUDIF_INT_EN (SPRD_CODEC_AP_BASE + 0x0018)
315 #define AUDIF_INT_CLR (SPRD_CODEC_AP_BASE + 0x001C)
316 #define AUDIF_INT_RAW (SPRD_CODEC_AP_BASE + 0x0020)
317 #define AUDIF_INT_MASK (SPRD_CODEC_AP_BASE + 0x0024)
318 #define AUDIF_OVPTMR_CTL (SPRD_CODEC_AP_BASE + 0x0028)
319 /* 0x002C ~ 0x003C is reserved for ADIE digital part */
321 #define PMUR1 (SPRD_CODEC_AP_BASE + 0x0040)
322 #define PMUR2 (SPRD_CODEC_AP_BASE + 0x0044)
323 #define PMUR3 (SPRD_CODEC_AP_BASE + 0x0048)
324 #define PMUR4 (SPRD_CODEC_AP_BASE + 0x004C)
325 #define PMUR5 (SPRD_CODEC_AP_BASE + 0x0050)
326 #define PMUR6 (SPRD_CODEC_AP_BASE + 0x0054)
328 #define HIBDR (SPRD_CODEC_AP_BASE + 0x0058)
330 #define AACR1 (SPRD_CODEC_AP_BASE + 0x005C)
331 #define AACR2 (SPRD_CODEC_AP_BASE + 0x0060)
332 #define AAICR1 (SPRD_CODEC_AP_BASE + 0x0064)
333 #define AAICR2 (SPRD_CODEC_AP_BASE + 0x0068)
334 #define AAICR3 (SPRD_CODEC_AP_BASE + 0x006C)
335 #define ACGR (SPRD_CODEC_AP_BASE + 0x0070)
337 #define DACR (SPRD_CODEC_AP_BASE + 0x0074)
338 #define DAOCR1 (SPRD_CODEC_AP_BASE + 0x0078)
339 #define DAOCR2 (SPRD_CODEC_AP_BASE + 0x007C)
340 #define DAOCR3 (SPRD_CODEC_AP_BASE + 0x0080)
341 #define DAOCR4 (SPRD_CODEC_AP_BASE + 0x00BC)
342 #define DCR1 (SPRD_CODEC_AP_BASE + 0x0084)
343 #define DCR2 (SPRD_CODEC_AP_BASE + 0x0088)
344 #define DCR3 (SPRD_CODEC_AP_BASE + 0x008C)
345 #define DCR4 (SPRD_CODEC_AP_BASE + 0x0090)
346 #define DCGR1 (SPRD_CODEC_AP_BASE + 0x0094)
347 #define DCGR2 (SPRD_CODEC_AP_BASE + 0x0098)
348 #define DCGR3 (SPRD_CODEC_AP_BASE + 0x009C)
350 #define PNRCR1 (SPRD_CODEC_AP_BASE + 0x00A0)
351 #define PNRCR2 (SPRD_CODEC_AP_BASE + 0x00A4)
352 #define PNRCR3 (SPRD_CODEC_AP_BASE + 0x00A8)
354 #define CCR (SPRD_CODEC_AP_BASE + 0x00AC)
356 #define IFR1 (SPRD_CODEC_AP_BASE + 0x00B0)
357 #define IFR2 (SPRD_CODEC_AP_BASE + 0x00B4)
358 #define IFR3 (SPRD_CODEC_AP_BASE + 0x00B8)
360 #define SPRD_CODEC_AP_END (SPRD_CODEC_AP_BASE + 0x00C0)
361 #define IS_SPRD_CODEC_AP_RANG(reg) (((reg) >= SPRD_CODEC_AP_BASE) && ((reg) < SPRD_CODEC_AP_END))
363 #define ID_FUN(id, lr) ((int)(((id) << 1) | (lr)))
366 SPRD_CODEC_PGA_SPKL = 0,
379 SPRD_CODEC_RIGHT = 1,
383 SPRD_CODEC_MIXER_START = 0,
384 SPRD_CODEC_AIL = SPRD_CODEC_MIXER_START,
389 SPRD_CODEC_ADC_MIXER_MAX,
390 SPRD_CODEC_HP_DACL = SPRD_CODEC_ADC_MIXER_MAX,
394 SPRD_CODEC_HP_MIXER_MAX,
395 SPRD_CODEC_SPK_DACL = SPRD_CODEC_HP_MIXER_MAX,
399 SPRD_CODEC_SPK_MIXER_MAX,
400 SPRD_CODEC_EAR_DACL = SPRD_CODEC_SPK_MIXER_MAX,
401 SPRD_CODEC_EAR_MIXER_MAX,
403 SPRD_CODEC_MIXER_MAX = SPRD_CODEC_EAR_MIXER_MAX << SPRD_CODEC_RIGHT
408 SPRD_CODEC_AUXMIC_BIAS,
409 SPRD_CODEC_MIC_BIAS_MAX
412 int sprd_codec_init(void);
413 void sprd_codec_exit(void);
414 int sprd_codec_pcm_set_sample_rate(int playback, int rate);
415 int sprd_codec_digital_loop(int enable);
417 int mixer_get(int id);
418 int mixer_set(int id, int on);
419 int mixer_enable(int id, int enable);
420 int pga_enable(int id, int pgaval, int enable);
421 int hp_switch(int enable);
422 int ear_switch(int enable);
423 int spkl_switch(int enable);
424 int spkr_switch(int enable);
425 int dacl_digital_switch(int enable);
426 int dacr_digital_switch(int enable);
428 int adcl_digital_switch(int enable);
429 int adcr_digital_switch(int enable);
430 int adcl_switch(int enable);
431 int adcr_switch(int enable);
432 int mic_bias_enable(int id, int enable);
434 int sprd_inter_speaker_pa(int on);
436 #endif /* __SPRD_CODEC_H */