drivers/mmc/sdio_card_pal.h

   1
   2
   3 #ifndef _SDIO_CARD_PAL_H_
   4 #define _SDIO_CARD_PAL_H_
   5
   6 #include "asm/arch/sci_types.h"
   7
   8 struct SDIO_CARD_PAL_Struct;
   9 typedef struct SDIO_CARD_PAL_Struct* SDIO_CARD_PAL_HANDLE;
  10
  11 typedef enum
  12 {
  13         SDIO_CARD_PAL_SLOT_0,
  14         SDIO_CARD_PAL_SLOT_1,
  15         SDIO_CARD_PAL_SLOT_2,
  16         SDIO_CARD_PAL_SLOT_3,
  17         SDIO_CARD_PAL_SLOT_4,
  18         SDIO_CARD_PAL_SLOT_5,
  19         SDIO_CARD_PAL_SLOT_6,
  20         SDIO_CARD_PAL_SLOT_7
  21 ,
  22         SDIO_CARD_PAL_SLOT_MAX
  23 }
  24 SDIO_CARD_PAL_SLOT_E;
  25
  26 typedef enum
  27 {
  28         SDIO_CARD_PAL_TYPE_MMC,
  29         SDIO_CARD_PAL_TYPE_SD,
  30         SDIO_CARD_PAL_TYPE_UNKOWN
  31 }SDIO_CARD_PAL_TYPE_E;
  32
  33 PUBLIC SDIO_CARD_PAL_HANDLE SDIO_Card_Pal_Open(SDIO_CARD_PAL_SLOT_E slotNo);
  34
  35 typedef enum
  36 {
  37         SDIO_CARD_PAL_OFF,
  38         SDIO_CARD_PAL_ON
  39 }
  40 SDIO_CARD_PAL_PWR_E;
  41 PUBLIC BOOLEAN SDIO_Card_Pal_Pwr(SDIO_CARD_PAL_HANDLE handle,SDIO_CARD_PAL_PWR_E onOrOff);
  42
  43 typedef enum
  44 {
  45         SDIO_CARD_PAL_400KHz,                   // ³õÊ¼»¯ÆµÂÊ
  46 #if defined (CONFIG_SC8825) || defined(CONFIG_SC7710G2) || defined (CONFIG_SC8830) || (defined CONFIG_SC9630)
  47         SDIO_CARD_PAL_1MHz,
  48         SDIO_CARD_PAL_2MHz,
  49         SDIO_CARD_PAL_4MHz,
  50         SDIO_CARD_PAL_8MHz,
  51         SDIO_CARD_PAL_12MHz,
  52 #endif
  53         SDIO_CARD_PAL_20MHz,                    // MMC¿¨µÄ¹¤×÷ÆµÂÊ
  54         SDIO_CARD_PAL_25MHz,                    // SD¿¨µÄ¹¤×÷ÆµÂÊ
  55         SDIO_CARD_PAL_50MHz,                    // SD¿¨¸ßËÙÄ£Ê½ÏÂµÄ¹¤×÷ÆµÂÊ
  56 #if defined (CONFIG_SC8825) || defined(CONFIG_SC7710G2) || defined (CONFIG_SC8830) || (defined CONFIG_SC9630)
  57         SDIO_CARD_PAL_100MHz,
  58 #endif
  59 }
  60 SDIO_CARD_PAL_CLKTYPE_E;
  61 PUBLIC BOOLEAN SDIO_Card_Pal_SetClk(SDIO_CARD_PAL_HANDLE handle,SDIO_CARD_PAL_CLKTYPE_E clkType);
  62
  63 typedef enum
  64 {
  65         SDIO_CARD_PAL_1_BIT,
  66         SDIO_CARD_PAL_4_BIT,
  67         SDIO_CARD_PAL_8_BIT
  68 }SDIO_CARD_PAL_BUFWIDTH_E;
  69 PUBLIC BOOLEAN SDIO_Card_Pal_SetBusWidth(SDIO_CARD_PAL_HANDLE handle,SDIO_CARD_PAL_BUFWIDTH_E widthType);
  70
  71 typedef enum
  72 {
  73 #if defined (CONFIG_SC8825) || defined(CONFIG_SC7710G2) || defined (CONFIG_SC8830) || (defined CONFIG_SC9630)
  74         EMMC_SPEED_SDR12,
  75         EMMC_SPEED_SDR25,
  76         EMMC_SPEED_SDR50,
  77         EMMC_SPEED_SDR104,
  78         EMMC_SPEED_DDR50,
  79 #else
  80         SDIO_CARD_PAL_LOW_SPEED,
  81         SDIO_CARD_PAL_HIGH_SPEED
  82 #endif
  83 }SDIO_CARD_PAL_SPEEDMODE_E;
  84 PUBLIC BOOLEAN SDIO_Card_Pal_SetSpeedMode(SDIO_CARD_PAL_HANDLE handle,SDIO_CARD_PAL_SPEEDMODE_E speedMode);
  85
  86 typedef enum
  87 {
  88 // cmdindex,rsp,transmode
  89         CARD_CMD0_GO_IDLE_STATE,
  90         CARD_CMD1_SEND_OP_COND, /*MMC*/
  91         CARD_CMD2_ALL_SEND_CID,
  92         CARD_CMD3_SEND_RELATIVE_ADDR, /*SD*/
  93         CARD_CMD3_SET_RELATIVE_ADDR, /*MMC*/
  94         CARD_CMD4_SET_DSR,
  95         CARD_CMD6_SWITCH_FUNC,
  96         CARD_CMD7_SELECT_DESELECT_CARD,
  97         CARD_CMD8_SEND_IF_COND, /*SD*/
  98         CARD_CMD9_SEND_CSD,
  99         CARD_CMD10_SEND_CID,
 100         CARD_CMD11_READ_DAT_UNTIL_STOP, /*MMC*/
 101         CARD_CMD11_READ_DAT_UNTIL_STOP_AUT12, /*MMC*/
 102         CARD_CMD12_STOP_TRANSMISSION,   //It is auto performed by Host
 103         CARD_CMD13_SEND_STATUS,
 104         CARD_CMD15_GO_INACTIVE_STATE,
 105         CARD_CMD16_SET_BLOCKLEN,
 106         CARD_CMD17_READ_SINGLE_BLOCK,
 107         CARD_CMD18_READ_MULTIPLE_BLOCK,
 108         CARD_CMD18_READ_MULTIPLE_BLOCK_AUT12,
 109         CARD_CMD20_WRITE_DAT_UNTIL_STOP, /*MMC*/
 110         CARD_CMD20_WRITE_DAT_UNTIL_STOP_AUT12, /*MMC*/
 111         CARD_CMD23_SET_BLOCK_COUNT, /*MMC*/
 112         CARD_CMD24_WRITE_BLOCK,
 113         CARD_CMD25_WRITE_MULTIPLE_BLOCK,
 114         CARD_CMD25_WRITE_MULTIPLE_BLOCK_AUT12,
 115
 116         CARD_CMD26_PROGRAM_CID, /*MMC*/
 117         CARD_CMD27_PROGRAM_CSD,
 118         CARD_CMD28_SET_WRITE_PROT,
 119         CARD_CMD29_CLR_WRITE_PROT,
 120         CARD_CMD30_SEND_WRITE_PROT,     // ??
 121
 122         CARD_CMD32_ERASE_WR_BLK_START, /*SD*/
 123         CARD_CMD33_ERASE_WR_BLK_END, /*SD*/
 124
 125         CARD_CMD35_ERASE_GROUP_START, /*MMC*/
 126         CARD_CMD36_ERASE_GROUP_END, /*MMC*/
 127
 128         CARD_CMD38_ERASE,
 129
 130         CARD_CMD39_FAST_IO, /*MMC*/
 131         CARD_CMD40_GO_IRQ_STATE, /*MMC*/
 132
 133         CARD_CMD42_LOCK_UNLOCK_SD, /*SD*/       // ??
 134         CARD_CMD42_LOCK_UNLOCK_MMC, /*MMC*/     // ??
 135         CARD_CMD55_APP_CMD,
 136         CARD_CMD56_GEN_CMD_SD, /*SD*/   //??
 137         CARD_CMD56_GEN_CMD_MMC, /*MMC*/ //??
 138
 139
 140         CARD_ACMD6_SET_BUS_WIDTH,        /*SD*/
 141         CARD_ACMD13_SD_STATUS, /*SD*/
 142         CARD_ACMD22_SEND_NUM_WR_BLCOKS, /*SD*/
 143         CARD_ACMD23_SET_WR_BLK_ERASE_COUNT, /*SD*/
 144         CARD_ACMD41_SD_SEND_OP_COND, /*SD*/
 145         CARD_ACMD42_SET_CLR_CARD_DETECT, /*SD*/
 146         CARD_ACMD51_SEND_SCR, /*SD*/
 147
 148         CARD_ACMD6_SET_EXT_CSD,
 149
 150 #if defined(SPRD_SUPPORT_MCEX)
 151         CARD_CMD34_READ_SEC_CMD,
 152         CARD_CMD35_WRITE_SEC_CMD,
 153         CARD_CMD36_SEND_PSI,
 154         CARD_CMD37_CTL_TRM,
 155 #endif
 156
 157         CARD_CMDMAX
 158 }
 159 SDIO_CARD_PAL_CMD_E;
 160
 161 typedef enum
 162 {
 163         SDIO_DMA_IN = 1,
 164         SDIO_DMA_OUT,
 165         SDIO_DMA_BIDIRECTIONAL
 166 }SDIO_DMA_DIRECTION;
 167
 168 typedef struct CARD_DATA_PARAM_TAG
 169 {
 170         uint8* databuf; // the buffer address ,that data will be stored in or  read from
 171         uint32 blkLen;  // block size
 172         uint32 blkNum;  // block number
 173         SDIO_DMA_DIRECTION direction;
 174 }
 175 CARD_DATA_PARAM_T;
 176
 177 typedef enum
 178 {
 179         SDIO_CARD_PAL_ERR_NONE                  = 0,
 180         SDIO_CARD_PAL_ERR_RSP                           = BIT_0,
 181         SDIO_CARD_PAL_ERR_CMD12                 = BIT_1,
 182         SDIO_CARD_PAL_ERR_CUR_LIMIT             = BIT_2,
 183         SDIO_CARD_PAL_ERR_DATA_END              = BIT_3,
 184         SDIO_CARD_PAL_ERR_DATA_CRC              = BIT_4,
 185         SDIO_CARD_PAL_ERR_DATA_TIMEOUT  = BIT_5,
 186         SDIO_CARD_PAL_ERR_CMD_INDEX             = BIT_6,
 187         SDIO_CARD_PAL_ERR_CMD_END               = BIT_7,
 188         SDIO_CARD_PAL_ERR_CMD_CRC               = BIT_8,
 189         SDIO_CARD_PAL_ERR_CMD_TIMEOUT   = BIT_9
 190 }
 191 SDIO_CARD_PAL_ERROR_E;
 192 PUBLIC SDIO_CARD_PAL_ERROR_E SDIO_Card_Pal_SendCmd(
 193         /*IN*/SDIO_CARD_PAL_HANDLE handle,
 194         /*IN*/SDIO_CARD_PAL_CMD_E cmd,
 195         /*IN*/uint32 argument,
 196         /*IN*/CARD_DATA_PARAM_T* dataParam,
 197         /*OUT*/uint8* rspBuf
 198 );
 199
 200 PUBLIC BOOLEAN SDIO_Card_Pal_Close(SDIO_CARD_PAL_HANDLE handle);
 201
 202
 203 uint32 SCI_GetTickCount(void);
 204 void SDIO_Card_Pal_DisSdClk(SDIO_CARD_PAL_HANDLE handle);
 205
 206
 207 #endif
 208
 209
 210