board/afeb9260/afeb9260.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian.pop@leadtechdesign.com>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  * (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org>
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 #include <common.h>
  27 #include <asm/arch/at91sam9260.h>
  28 #include <asm/arch/at91sam9260_matrix.h>
  29 #include <asm/arch/at91sam9_smc.h>
  30 #include <asm/arch/at91_common.h>
  31 #include <asm/arch/at91_pmc.h>
  32 #include <asm/arch/at91_rstc.h>
  33 #include <asm/arch/gpio.h>
  34 #include <asm/arch/io.h>
  35 #include <asm/arch/hardware.h>
  36 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
  37 #include <netdev.h>
  38 #include <net.h>
  39 #endif
  40
  41 DECLARE_GLOBAL_DATA_PTR;
  42
  43 /* ------------------------------------------------------------------------- */
  44 /*
  45  * Miscelaneous platform dependent initialisations
  46  */
  47
  48 static void afeb9260_nand_hw_init(void)
  49 {
  50         unsigned long csa;
  51
  52         /* Enable CS3 */
  53         csa = at91_sys_read(AT91_MATRIX_EBICSA);
  54         at91_sys_write(AT91_MATRIX_EBICSA,
  55                        csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
  56
  57         /* Configure SMC CS3 for NAND/SmartMedia */
  58         at91_sys_write(AT91_SMC_SETUP(3),
  59                        AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
  60                        AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
  61         at91_sys_write(AT91_SMC_PULSE(3),
  62                        AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) |
  63                        AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
  64         at91_sys_write(AT91_SMC_CYCLE(3),
  65                        AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
  66         at91_sys_write(AT91_SMC_MODE(3),
  67                        AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
  68                        AT91_SMC_EXNWMODE_DISABLE |
  69                        AT91_SMC_DBW_8 |
  70                        AT91_SMC_TDF_(2));
  71
  72         at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
  73
  74         /* Configure RDY/BSY */
  75         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  76
  77         /* Enable NandFlash */
  78         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  79 }
  80
  81 #ifdef CONFIG_MACB
  82 static void afeb9260_macb_hw_init(void)
  83 {
  84         unsigned long rstc;
  85
  86         /* Enable clock */
  87         at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
  88
  89         /*
  90          * Disable pull-up on:
  91          *      RXDV (PA17) => PHY normal mode (not Test mode)
  92          *      ERX0 (PA14) => PHY ADDR0
  93          *      ERX1 (PA15) => PHY ADDR1
  94          *      ERX2 (PA25) => PHY ADDR2
  95          *      ERX3 (PA26) => PHY ADDR3
  96          *      ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
  97          *
  98          * PHY has internal pull-down
  99          */
 100         writel(pin_to_mask(AT91_PIN_PA14) |
 101                pin_to_mask(AT91_PIN_PA15) |
 102                pin_to_mask(AT91_PIN_PA17) |
 103                pin_to_mask(AT91_PIN_PA25) |
 104                pin_to_mask(AT91_PIN_PA26) |
 105                pin_to_mask(AT91_PIN_PA28),
 106                pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
 107
 108         rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
 109
 110         /* Need to reset PHY -> 500ms reset */
 111         at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
 112                                      AT91_RSTC_ERSTL | (0x0D << 8) |
 113                                      AT91_RSTC_URSTEN);
 114
 115         at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
 116
 117         /* Wait for end hardware reset */
 118         while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
 119
 120         /* Restore NRST value */
 121         at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
 122                                      (rstc) |
 123                                      AT91_RSTC_URSTEN);
 124
 125         /* Re-enable pull-up */
 126         writel(pin_to_mask(AT91_PIN_PA14) |
 127                pin_to_mask(AT91_PIN_PA15) |
 128                pin_to_mask(AT91_PIN_PA17) |
 129                pin_to_mask(AT91_PIN_PA25) |
 130                pin_to_mask(AT91_PIN_PA26) |
 131                pin_to_mask(AT91_PIN_PA28),
 132                pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
 133
 134         at91_macb_hw_init();
 135 }
 136 #endif
 137
 138 int board_init(void)
 139 {
 140         /* Enable Ctrlc */
 141         console_init_f();
 142
 143         /* arch number of AT91SAM9260EK-Board */
 144         gd->bd->bi_arch_number = MACH_TYPE_AFEB9260;
 145         /* adress of boot parameters */
 146         gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 147
 148         at91_serial_hw_init();
 149 #ifdef CONFIG_CMD_NAND
 150         afeb9260_nand_hw_init();
 151 #endif
 152         at91_spi0_hw_init((1 << 0) | (1 << 1));
 153 #ifdef CONFIG_MACB
 154         afeb9260_macb_hw_init();
 155 #endif
 156
 157         return 0;
 158 }
 159
 160 int dram_init(void)
 161 {
 162         gd->bd->bi_dram[0].start = PHYS_SDRAM;
 163         gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
 164         return 0;
 165 }
 166
 167 #ifdef CONFIG_RESET_PHY_R
 168 void reset_phy(void)
 169 {
 170 }
 171 #endif
 172
 173 int board_eth_init(bd_t *bis)
 174 {
 175         int rc = 0;
 176 #ifdef CONFIG_MACB
 177         rc = macb_eth_initialize(0, (void *)AT91SAM9260_BASE_EMAC, 0x01);
 178 #endif
 179         return rc;
 180 }