2 * Copyright (C) 2014-2015 Spreadtrum Communications Inc.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
11 //#ifndef __SCI_GLB_REGS_H__
12 //#error "Don't include this file directly, Pls include sci_glb_regs.h"
15 #ifndef __H_REGS_AP_APB_HEADFILE_H__
16 #define __H_REGS_AP_APB_HEADFILE_H__ __FILE__
20 /* registers definitions for AP_APB */
21 #define REG_AP_APB_APB_EB SCI_ADDR(REGS_AP_APB_BASE, 0x0000) /*AHB_EB */
22 #define REG_AP_APB_APB_RST SCI_ADDR(REGS_AP_APB_BASE, 0x0004) /*AHB_RST */
23 #define REG_AP_APB_USB_CTRL0 SCI_ADDR(REGS_AP_APB_BASE, 0x0010) /*USB_PHY_TUNE */
24 #define REG_AP_APB_USB_CTRL1 SCI_ADDR(REGS_AP_APB_BASE, 0x0014) /*USB_PHY_TUNE */
25 #define REG_AP_APB_LVDS_DISP_CTRL0 SCI_ADDR(REGS_AP_APB_BASE, 0x0018) /*MISC_CKG_EN */
26 #define REG_AP_APB_USB_PHY_TEST SCI_ADDR(REGS_AP_APB_BASE, 0x3004) /*MISC_CKG_EN */
27 #define REG_AP_APB_USB_PHY_CTRL SCI_ADDR(REGS_AP_APB_BASE, 0x3008) /*USB_PHY_CTRL */
28 #define REG_AP_APB_APB_MISC_CTRL SCI_ADDR(REGS_AP_APB_BASE, 0x300C) /*APB_MISC_CTRL */
30 /* bits definitions for register REG_AP_APB_APB_EB */
31 #define BIT_INTC3_EB ( BIT(22) )
32 #define BIT_INTC2_EB ( BIT(21) )
33 #define BIT_INTC1_EB ( BIT(20) )
34 #define BIT_INTC0_EB ( BIT(19) )
35 #define BIT_AP_CKG_EB ( BIT(18) )
36 #define BIT_UART4_EB ( BIT(17) )
37 #define BIT_UART3_EB ( BIT(16) )
38 #define BIT_UART2_EB ( BIT(15) )
39 #define BIT_UART1_EB ( BIT(14) )
40 #define BIT_UART0_EB ( BIT(13) )
41 #define BIT_I2C4_EB ( BIT(12) )
42 #define BIT_I2C3_EB ( BIT(11) )
43 #define BIT_I2C2_EB ( BIT(10) )
44 #define BIT_I2C1_EB ( BIT(9) )
45 #define BIT_I2C0_EB ( BIT(8) )
46 #define BIT_SPI2_EB ( BIT(7) )
47 #define BIT_SPI1_EB ( BIT(6) )
48 #define BIT_SPI0_EB ( BIT(5) )
49 #define BIT_IIS3_EB ( BIT(4) )
50 #define BIT_IIS2_EB ( BIT(3) )
51 #define BIT_IIS1_EB ( BIT(2) )
52 #define BIT_IIS0_EB ( BIT(1) )
53 #define BIT_SIM0_EB ( BIT(0) )
55 /* bits definitions for register REG_AP_APB_APB_RST */
56 #define BIT_INTC3_SOFT_RST ( BIT(22) )
57 #define BIT_INTC2_SOFT_RST ( BIT(21) )
58 #define BIT_INTC1_SOFT_RST ( BIT(20) )
59 #define BIT_INTC0_SOFT_RST ( BIT(19) )
60 #define BIT_CKG_SOFT_RST ( BIT(18) )
61 #define BIT_UART4_SOFT_RST ( BIT(17) )
62 #define BIT_UART3_SOFT_RST ( BIT(16) )
63 #define BIT_UART2_SOFT_RST ( BIT(15) )
64 #define BIT_UART1_SOFT_RST ( BIT(14) )
65 #define BIT_UART0_SOFT_RST ( BIT(13) )
66 #define BIT_I2C4_SOFT_RST ( BIT(12) )
67 #define BIT_I2C3_SOFT_RST ( BIT(11) )
68 #define BIT_I2C2_SOFT_RST ( BIT(10) )
69 #define BIT_I2C1_SOFT_RST ( BIT(9) )
70 #define BIT_I2C0_SOFT_RST ( BIT(8) )
71 #define BIT_SPI2_SOFT_RST ( BIT(7) )
72 #define BIT_SPI1_SOFT_RST ( BIT(6) )
73 #define BIT_SPI0_SOFT_RST ( BIT(5) )
74 #define BIT_IIS3_SOFT_RST ( BIT(4) )
75 #define BIT_IIS2_SOFT_RST ( BIT(3) )
76 #define BIT_IIS1_SOFT_RST ( BIT(2) )
77 #define BIT_IIS0_SOFT_RST ( BIT(1) )
78 #define BIT_SIM0_SOFT_RST ( BIT(0) )
80 /* bits definitions for register REG_AP_APB_USB_CTRL0 */
81 #define BITS_USB20_TUNEHSAMP(_X_) ( (_X_) << 30 & (BIT(30)|BIT(31)) )
82 #define BITS_USB20_TUNEPLLS(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)) )
83 #define BITS_USB20_TUNERISE(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
84 #define BITS_USB20_TUNESQ(_X_) ( (_X_) << 23 & (BIT(23)|BIT(24)|BIT(25)) )
85 #define BITS_USB20_TUNEDSC(_X_) ( (_X_) << 21 & (BIT(21)|BIT(22)) )
86 #define BITS_USB20_TUNEOTG(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)|BIT(20)) )
87 #define BIT_USB20_TXBITSTUFFENABLE ( BIT(17) )
88 #define BIT_USB20_TXBITSTUFFENABLEH ( BIT(16) )
89 #define BITS_USB20_RESERVED(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
91 /* bits definitions for register REG_AP_APB_USB_CTRL1 */
92 #define BIT_HSIC_PLLON ( BIT(16) )
93 #define BIT_USB20_REXTENABLE ( BIT(15) )
94 #define BIT_USB20_S_ID ( BIT(14) )
95 #define BITS_USB20_TF12KRES(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)) )
96 #define BITS_USB20_TFHSRES(_X_) ( (_X_) << 3 & (BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
97 #define BITS_USB20_TUNEEQ(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)) )
99 /* bits definitions for register REG_AP_APB_LVDS_DISP_CTRL0 */
100 #define BIT_LVDSDIS_OFF_CL ( BIT(14) )
101 #define BIT_LVDSDIS_OFF_OCT ( BIT(13) )
102 #define BITS_LVDSDIS_TXPD(_X_) ( (_X_) << 7 & (BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)) )
103 #define BITS_LVDSDIS_TXIMP(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)) )
104 #define BITS_LVDSDIS_TXRESERVED(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
106 /* bits definitions for register REG_AP_APB_USB_PHY_TEST */
107 #define BIT_ATERESET ( BIT(31) )
108 #define BIT_VBUS_VALID_EXT_SEL ( BIT(26) )
109 #define BIT_VBUS_VALID_EXT ( BIT(25) )
110 #define BIT_OTGDISABLE ( BIT(24) )
111 #define BIT_TESTBURNIN ( BIT(21) )
112 #define BIT_LOOPBACKENB ( BIT(20) )
113 #define BITS_TESTDATAOUT(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
114 #define BITS_VATESTENB(_X_) ( (_X_) << 14 & (BIT(14)|BIT(15)) )
115 #define BIT_TESTCLK ( BIT(13) )
116 #define BIT_TESTDATAOUTSEL ( BIT(12) )
117 #define BITS_TESTADDR(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
118 #define BITS_TESTDATAIN(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
120 /* bits definitions for register REG_AP_APB_USB_PHY_CTRL */
121 #define BITS_SS_SCALEDOWNMODE(_X_) ( (_X_) << 25 & (BIT(25)|BIT(26)) )
122 #define BIT_TXBITSTUFFENH ( BIT(23) )
123 #define BIT_TXBITSTUFFEN ( BIT(22) )
124 #define BIT_DMPULLDOWN ( BIT(21) )
125 #define BIT_DPPULLDOWN ( BIT(20) )
126 #define BIT_DMPULLUP ( BIT(9) )
127 #define BIT_COMMONONN ( BIT(8) )
128 #define BITS_REFCLKSEL(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)) )
129 #define BITS_FSEL(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)) )
131 /* bits definitions for register REG_AP_APB_APB_MISC_CTRL */
132 #define BIT_SIM_CLK_POLARITY ( BIT(1) )
133 #define BIT_FMARK_POLARITY_INV ( BIT(0) )