2 * Copyright (C) 2014-2015 Spreadtrum Communications Inc.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
11 //#ifndef __SCI_GLB_REGS_H__
12 //#error "Don't include this file directly, Pls include sci_glb_regs.h"
15 #ifndef __H_REGS_AP_AHB_HEADFILE_H__
16 #define __H_REGS_AP_AHB_HEADFILE_H__ __FILE__
20 /* registers definitions for AP_AHB */
21 #define REG_AP_AHB_AHB_EB SCI_ADDR(REGS_AP_AHB_BASE, 0x0000) /*AHB_EB */
22 #define REG_AP_AHB_AHB_RST SCI_ADDR(REGS_AP_AHB_BASE, 0x0004) /*AHB_RST */
23 #define REG_AP_AHB_CA7_RST_SET SCI_ADDR(REGS_AP_AHB_BASE, 0x0008) /*CA7_RST_SET */
24 #define REG_AP_AHB_AP_SYS_FORCE_SLEEP_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x000C) /*AP_SYS_FORCE_SLEEP_CFG */
25 #define REG_AP_AHB_AP_SYS_AUTO_SLEEP_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x0010) /*AP_SYS_AUTO_SLEEP_CFG */
26 #define REG_AP_AHB_HOLDING_PEN SCI_ADDR(REGS_AP_AHB_BASE, 0x0014) /*HOLDING_PEN */
27 #define REG_AP_AHB_JMP_ADDR_CA7_C0 SCI_ADDR(REGS_AP_AHB_BASE, 0x0018) /*JMP_ADDR_CA7_C0 */
28 #define REG_AP_AHB_JMP_ADDR_CA7_C1 SCI_ADDR(REGS_AP_AHB_BASE, 0x001C) /*JMP_ADDR_CA7_C1 */
29 #define REG_AP_AHB_JMP_ADDR_CA7_C2 SCI_ADDR(REGS_AP_AHB_BASE, 0x0020) /*JMP_ADDR_CA7_C2 */
30 #define REG_AP_AHB_JMP_ADDR_CA7_C3 SCI_ADDR(REGS_AP_AHB_BASE, 0x0024) /*JMP_ADDR_CA7_C3 */
31 #define REG_AP_AHB_CA7_C0_PU_LOCK SCI_ADDR(REGS_AP_AHB_BASE, 0x0028) /*CA7_C0_PU_LOCK */
32 #define REG_AP_AHB_CA7_C1_PU_LOCK SCI_ADDR(REGS_AP_AHB_BASE, 0x002C) /*CA7_C1_PU_LOCK */
33 #define REG_AP_AHB_CA7_C2_PU_LOCK SCI_ADDR(REGS_AP_AHB_BASE, 0x0030) /*CA7_C2_PU_LOCK */
34 #define REG_AP_AHB_CA7_C3_PU_LOCK SCI_ADDR(REGS_AP_AHB_BASE, 0x0034) /*CA7_C3_PU_LOCK */
35 #define REG_AP_AHB_CA7_CKG_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x3000) /*CA7_CKG_CFG */
36 #define REG_AP_AHB_MCU_PAUSE SCI_ADDR(REGS_AP_AHB_BASE, 0x3004) /*MCU_PAUSE */
37 #define REG_AP_AHB_MISC_CKG_EN SCI_ADDR(REGS_AP_AHB_BASE, 0x3008) /*MISC_CKG_EN */
38 #define REG_AP_AHB_MISC_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x300C) /*MISC_CFG */
39 #define REG_AP_AHB_AP_MTX_S3_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x3010) /*AP_MTX_S3_PRIO0 */
40 #define REG_AP_AHB_AP_MTX_S3_PRIO1 SCI_ADDR(REGS_AP_AHB_BASE, 0x3014) /*AP_MTX_S3_PRIO1 */
41 #define REG_AP_AHB_AP_MTX_S3_PRIO2 SCI_ADDR(REGS_AP_AHB_BASE, 0x3018) /*AP_MTX_S3_PRIO2 */
42 #define REG_AP_AHB_AP_MTX_S2_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x301C) /*AP_MTX_S2_PRIO0 */
43 #define REG_AP_AHB_AP_MTX_S1_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x3020) /*AP_MTX_S1_PRIO0 */
44 #define REG_AP_AHB_AP_MTX_S0_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x3024) /*AP_MTX_S0_PRIO0 */
45 #define REG_AP_AHB_AP_MTX_S0_PRIO1 SCI_ADDR(REGS_AP_AHB_BASE, 0x3028) /*AP_MTX_S0_PRIO1 */
46 #define REG_AP_AHB_AP_MTX_S0_PRIO2 SCI_ADDR(REGS_AP_AHB_BASE, 0x302C) /*AP_MTX_S0_PRIO2 */
47 #define REG_AP_AHB_AP_MAIN_MTX_HPROT_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x3030) /*AP_MAIN_MTX_HPROT_CFG */
48 #define REG_AP_AHB_CA7_STANDBY_STATUS SCI_ADDR(REGS_AP_AHB_BASE, 0x3034) /*CA7_STANDBY_STATUS */
49 #define REG_AP_AHB_NANC_CLK_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x3038) /*NANDC_CLK_CFG */
50 #define REG_AP_AHB_LVDS_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x303C) /*LVDS_CFG */
51 #define REG_AP_AHB_LVDS_PLL_CFG0 SCI_ADDR(REGS_AP_AHB_BASE, 0x3040) /*LVDS_PLL_CFG0 */
52 #define REG_AP_AHB_LVDS_PLL_CFG1 SCI_ADDR(REGS_AP_AHB_BASE, 0x3044) /*LVDS_PLL_CFG1 */
53 #define REG_AP_AHB_CA7_C0_AUTO_FORCE_SHUTDOWN_EN SCI_ADDR(REGS_AP_AHB_BASE, 0x3048) /*CA7_C0_AUTO_FORCE_SHUTDOWN_EN */
54 #define REG_AP_AHB_CA7_C1_AUTO_FORCE_SHUTDOWN_EN SCI_ADDR(REGS_AP_AHB_BASE, 0x304C) /*CA7_C1_AUTO_FORCE_SHUTDOWN_EN */
55 #define REG_AP_AHB_CA7_C2_AUTO_FORCE_SHUTDOWN_EN SCI_ADDR(REGS_AP_AHB_BASE, 0x3050) /*CA7_C2_AUTO_FORCE_SHUTDOWN_EN */
56 #define REG_AP_AHB_CA7_C3_AUTO_FORCE_SHUTDOWN_EN SCI_ADDR(REGS_AP_AHB_BASE, 0x3054) /*CA7_C3_AUTO_FORCE_SHUTDOWN_EN */
57 #define REG_AP_AHB_AP_QOS_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x3058) /*AP_QOS_CFG */
58 #define REG_AP_AHB_CHIP_ID SCI_ADDR(REGS_AP_AHB_BASE, 0x30FC) /*CHIP_ID */
60 /* bits definitions for register REG_AP_AHB_AHB_EB */
61 #define BIT_LVDS_EB ( BIT(22) )
62 #define BIT_ZIPDEC_EB ( BIT(21) )
63 #define BIT_ZIPENC_EB ( BIT(20) )
64 #define BIT_NANDC_ECC_EB ( BIT(19) )
65 #define BIT_NANDC_2X_EB ( BIT(18) )
66 #define BIT_NANDC_EB ( BIT(17) )
67 #define BIT_BUSMON2_EB ( BIT(16) )
68 #define BIT_BUSMON1_EB ( BIT(15) )
69 #define BIT_BUSMON0_EB ( BIT(14) )
70 #define BIT_SPINLOCK_EB ( BIT(13) )
71 #define BIT_GPS_EB ( BIT(12) )
72 #define BIT_EMMC_EB ( BIT(11) )
73 #define BIT_SDIO2_EB ( BIT(10) )
74 #define BIT_SDIO1_EB ( BIT(9) )
75 #define BIT_SDIO0_EB ( BIT(8) )
76 #define BIT_DRM_EB ( BIT(7) )
77 #define BIT_NFC_EB ( BIT(6) )
78 #define BIT_DMA_EB ( BIT(5) )
79 #define BIT_USB_EB ( BIT(4) )
80 #define BIT_GSP_EB ( BIT(3) )
81 #define BIT_DISPC1_EB ( BIT(2) )
82 #define BIT_DISPC0_EB ( BIT(1) )
83 #define BIT_DSI_EB ( BIT(0) )
85 /* bits definitions for register REG_AP_AHB_AHB_RST */
86 #define BIT_LVDS_SOFT_RST ( BIT(25) )
87 #define BIT_ZIP_MTX_SOFT_RST ( BIT(24) )
88 #define BIT_ZIPDEC_SOFT_RST ( BIT(23) )
89 #define BIT_ZIPENC_SOFT_RST ( BIT(22) )
90 #define BIT_NANDC_SOFT_RST ( BIT(20) )
91 #define BIT_BUSMON2_SOFT_RST ( BIT(19) )
92 #define BIT_BUSMON1_SOFT_RST ( BIT(18) )
93 #define BIT_BUSMON0_SOFT_RST ( BIT(17) )
94 #define BIT_SPINLOCK_SOFT_RST ( BIT(16) )
95 #define BIT_GPS_SOFT_RST ( BIT(15) )
96 #define BIT_EMMC_SOFT_RST ( BIT(14) )
97 #define BIT_SDIO2_SOFT_RST ( BIT(13) )
98 #define BIT_SDIO1_SOFT_RST ( BIT(12) )
99 #define BIT_SDIO0_SOFT_RST ( BIT(11) )
100 #define BIT_DRM_SOFT_RST ( BIT(10) )
101 #define BIT_NFC_SOFT_RST ( BIT(9) )
102 #define BIT_DMA_SOFT_RST ( BIT(8) )
103 #define BIT_USB_PHY_SOFT_RST ( BIT(7) )
104 #define BIT_USB_UTMI_SOFT_RST ( BIT(6) )
105 #define BIT_USB_SOFT_RST ( BIT(5) )
106 #define BIT_DISP_MTX_SOFT_RST ( BIT(4) )
107 #define BIT_GSP_SOFT_RST ( BIT(3) )
108 #define BIT_DISPC1_SOFT_RST ( BIT(2) )
109 #define BIT_DISPC0_SOFT_RST ( BIT(1) )
110 #define BIT_DSI_SOFT_RST ( BIT(0) )
112 /* bits definitions for register REG_AP_AHB_CA7_RST_SET */
113 #define BIT_CA7_CS_DBG_SOFT_RST ( BIT(14) )
114 #define BIT_CA7_L2_SOFT_RST ( BIT(13) )
115 #define BIT_CA7_SOCDBG_SOFT_RST ( BIT(12) )
116 #define BITS_CA7_ETM_SOFT_RST(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
117 #define BITS_CA7_DBG_SOFT_RST(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
118 #define BITS_CA7_CORE_SOFT_RST(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
120 /* bits definitions for register REG_AP_AHB_AP_SYS_FORCE_SLEEP_CFG */
121 #define BIT_AP_PERI_FORCE_ON ( BIT(2) )
122 #define BIT_AP_PERI_FORCE_SLP ( BIT(1) )
123 #define BIT_AP_APB_SLEEP ( BIT(0) )
125 /* bits definitions for register REG_AP_AHB_AP_SYS_AUTO_SLEEP_CFG */
126 #define BIT_GSP_CKG_FORCE_EN ( BIT(9) )
127 #define BIT_GSP_AUTO_GATE_EN ( BIT(8) )
128 #define BIT_AP_AHB_AUTO_GATE_EN ( BIT(5) )
129 #define BIT_AP_EMC_AUTO_GATE_EN ( BIT(4) )
130 #define BIT_CA7_EMC_AUTO_GATE_EN ( BIT(3) )
131 #define BIT_CA7_DBG_FORCE_SLEEP ( BIT(2) )
132 #define BIT_CA7_DBG_AUTO_GATE_EN ( BIT(1) )
133 #define BIT_CA7_CORE_AUTO_GATE_EN ( BIT(0) )
135 /* bits definitions for register REG_AP_AHB_HOLDING_PEN */
136 #define BITS_HOLDING_PEN(_X_) (_X_)
138 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C0 */
139 #define BITS_JMP_ADDR_CA7_C0(_X_) (_X_)
141 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C1 */
142 #define BITS_JMP_ADDR_CA7_C1(_X_) (_X_)
144 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C2 */
145 #define BITS_JMP_ADDR_CA7_C2(_X_) (_X_)
147 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C3 */
148 #define BITS_JMP_ADDR_CA7_C3(_X_) (_X_)
150 /* bits definitions for register REG_AP_AHB_CA7_C0_PU_LOCK */
151 #define BIT_CA7_C0_PU_LOCK ( BIT(0) )
153 /* bits definitions for register REG_AP_AHB_CA7_C1_PU_LOCK */
154 #define BIT_CA7_C1_PU_LOCK ( BIT(0) )
156 /* bits definitions for register REG_AP_AHB_CA7_C2_PU_LOCK */
157 #define BIT_CA7_C2_PU_LOCK ( BIT(0) )
159 /* bits definitions for register REG_AP_AHB_CA7_C3_PU_LOCK */
160 #define BIT_CA7_C3_PU_LOCK ( BIT(0) )
162 /* bits definitions for register REG_AP_AHB_CA7_CKG_CFG */
163 #define BITS_CA7_DBG_CKG_DIV(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)) )
164 #define BITS_CA7_AXI_CKG_DIV(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)) )
165 #define BITS_CA7_MCU_CKG_DIV(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)) )
166 #define BITS_CA7_MCU_CKG_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)) )
168 /* bits definitions for register REG_AP_AHB_MCU_PAUSE */
169 #define BIT_DMA_ACT_LIGHT_EN ( BIT(5) )
170 #define BIT_MCU_SLEEP_FOLLOW_CA7_EN ( BIT(4) )
171 #define BIT_MCU_LIGHT_SLEEP_EN ( BIT(3) )
172 #define BIT_MCU_DEEP_SLEEP_EN ( BIT(2) )
173 #define BIT_MCU_SYS_SLEEP_EN ( BIT(1) )
174 #define BIT_MCU_CORE_SLEEP ( BIT(0) )
176 /* bits definitions for register REG_AP_AHB_MISC_CKG_EN */
177 #define BIT_GPS_TCXO_INV_SEL ( BIT(13) )
178 #define BIT_GPS_26M_INV_SEL ( BIT(12) )
179 #define BIT_ASHB_CA7_DBG_VLD ( BIT(9) )
180 #define BIT_ASHB_CA7_DBG_EN ( BIT(8) )
181 #define BIT_DISP_TMC_CKG_EN ( BIT(4) )
182 #define BIT_DPHY_REF_CKG_EN ( BIT(1) )
183 #define BIT_DPHY_CFG_CKG_EN ( BIT(0) )
185 /* bits definitions for register REG_AP_AHB_MISC_CFG */
186 #define BITS_EMMC_SLOT_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
187 #define BITS_SDIO0_SLOT_SEL(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)) )
188 #define BITS_BUSMON2_CHN_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
189 #define BITS_BUSMON1_CHN_SEL(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)) )
190 #define BIT_BUSMON0_CHN_SEL ( BIT(4) )
191 #define BITS_SDIO2_SLOT_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
192 #define BITS_SDIO1_SLOT_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)) )
194 /* bits definitions for register REG_AP_AHB_AP_MTX_S3_PRIO0 */
195 #define BITS_PRI_M6TOS3_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
196 #define BITS_PRI_M6TOS3_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
197 #define BIT_PRI_M6TOS3_RND_EN ( BIT(25) )
198 #define BIT_PRI_M6TOS3_ADJ_EN ( BIT(24) )
199 #define BITS_PRI_M7TOS3_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
200 #define BITS_PRI_M7TOS3_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
201 #define BIT_PRI_M7TOS3_RND_EN ( BIT(17) )
202 #define BIT_PRI_M7TOS3_ADJ_EN ( BIT(16) )
203 #define BITS_PRI_M8TOS3_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
204 #define BITS_PRI_M8TOS3_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
205 #define BIT_PRI_M8TOS3_RND_EN ( BIT(9) )
206 #define BIT_PRI_M8TOS3_ADJ_EN ( BIT(8) )
207 #define BITS_PRI_M9TOS3_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
208 #define BITS_PRI_M9TOS3_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
209 #define BIT_PRI_M9TOS3_RND_EN ( BIT(1) )
210 #define BIT_PRI_M9TOS3_ADJ_EN ( BIT(0) )
212 /* bits definitions for register REG_AP_AHB_AP_MTX_S3_PRIO1 */
213 #define BITS_PRI_M2TOS3_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
214 #define BITS_PRI_M2TOS3_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
215 #define BIT_PRI_M2TOS3_RND_EN ( BIT(25) )
216 #define BIT_PRI_M2TOS3_ADJ_EN ( BIT(24) )
217 #define BITS_PRI_M3TOS3_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
218 #define BITS_PRI_M3TOS3_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
219 #define BIT_PRI_M3TOS3_RND_EN ( BIT(17) )
220 #define BIT_PRI_M3TOS3_ADJ_EN ( BIT(16) )
221 #define BITS_PRI_M4TOS3_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
222 #define BITS_PRI_M4TOS3_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
223 #define BIT_PRI_M4TOS3_RND_EN ( BIT(9) )
224 #define BIT_PRI_M4TOS3_ADJ_EN ( BIT(8) )
225 #define BITS_PRI_M5TOS3_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
226 #define BITS_PRI_M5TOS3_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
227 #define BIT_PRI_M5TOS3_RND_EN ( BIT(1) )
228 #define BIT_PRI_M5TOS3_ADJ_EN ( BIT(0) )
230 /* bits definitions for register REG_AP_AHB_AP_MTX_S3_PRIO2 */
231 #define BITS_PRI_M0TOS3_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
232 #define BITS_PRI_M0TOS3_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
233 #define BIT_PRI_M0TOS3_RND_EN ( BIT(1) )
234 #define BIT_PRI_M0TOS3_ADJ_EN ( BIT(0) )
236 /* bits definitions for register REG_AP_AHB_AP_MTX_S2_PRIO0 */
237 #define BITS_PRI_M0TOS2_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
238 #define BITS_PRI_M0TOS2_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
239 #define BIT_PRI_M0TOS2_RND_EN ( BIT(25) )
240 #define BIT_PRI_M0TOS2_ADJ_EN ( BIT(24) )
241 #define BITS_PRI_M1TOS2_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
242 #define BITS_PRI_M1TOS2_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
243 #define BIT_PRI_M1TOS2_RND_EN ( BIT(17) )
244 #define BIT_PRI_M1TOS2_ADJ_EN ( BIT(16) )
245 #define BITS_PRI_M2TOS2_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
246 #define BITS_PRI_M2TOS2_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
247 #define BIT_PRI_M2TOS2_RND_EN ( BIT(9) )
248 #define BIT_PRI_M2TOS2_ADJ_EN ( BIT(8) )
249 #define BITS_PRI_M3TOS2_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
250 #define BITS_PRI_M3TOS2_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
251 #define BIT_PRI_M3TOS2_RND_EN ( BIT(1) )
252 #define BIT_PRI_M3TOS2_ADJ_EN ( BIT(0) )
254 /* bits definitions for register REG_AP_AHB_AP_MTX_S1_PRIO0 */
255 #define BITS_PRI_M0TOS1_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
256 #define BITS_PRI_M0TOS1_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
257 #define BIT_PRI_M0TOS1_RND_EN ( BIT(25) )
258 #define BIT_PRI_M0TOS1_ADJ_EN ( BIT(24) )
259 #define BITS_PRI_M2TOS1_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
260 #define BITS_PRI_M2TOS1_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
261 #define BIT_PRI_M2TOS1_RND_EN ( BIT(17) )
262 #define BIT_PRI_M2TOS1_ADJ_EN ( BIT(16) )
263 #define BITS_PRI_M3TOS1_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
264 #define BITS_PRI_M3TOS1_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
265 #define BIT_PRI_M3TOS1_RND_EN ( BIT(9) )
266 #define BIT_PRI_M3TOS1_ADJ_EN ( BIT(8) )
267 #define BITS_PRI_M8TOS1_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
268 #define BITS_PRI_M8TOS1_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
269 #define BIT_PRI_M8TOS1_RND_EN ( BIT(1) )
270 #define BIT_PRI_M8TOS1_ADJ_EN ( BIT(0) )
272 /* bits definitions for register REG_AP_AHB_AP_MTX_S0_PRIO0 */
273 #define BITS_PRI_M0TOS0_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
274 #define BITS_PRI_M0TOS0_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
275 #define BIT_PRI_M0TOS0_RND_EN ( BIT(25) )
276 #define BIT_PRI_M0TOS0_ADJ_EN ( BIT(24) )
277 #define BITS_PRI_M1TOS0_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
278 #define BITS_PRI_M1TOS0_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
279 #define BIT_PRI_M1TOS0_RND_EN ( BIT(17) )
280 #define BIT_PRI_M1TOS0_ADJ_EN ( BIT(16) )
281 #define BITS_PRI_M2TOS0_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
282 #define BITS_PRI_M2TOS0_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
283 #define BIT_PRI_M2TOS0_RND_EN ( BIT(9) )
284 #define BIT_PRI_M2TOS0_ADJ_EN ( BIT(8) )
285 #define BITS_PRI_M3TOS0_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
286 #define BITS_PRI_M3TOS0_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
287 #define BIT_PRI_M3TOS0_RND_EN ( BIT(1) )
288 #define BIT_PRI_M3TOS0_ADJ_EN ( BIT(0) )
290 /* bits definitions for register REG_AP_AHB_AP_MTX_S0_PRIO1 */
291 #define BITS_PRI_M4TOS1_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
292 #define BITS_PRI_M4TOS1_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
293 #define BIT_PRI_M4TOS1_RND_EN ( BIT(25) )
294 #define BIT_PRI_M4TOS1_ADJ_EN ( BIT(24) )
295 #define BITS_PRI_M5TOS1_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
296 #define BITS_PRI_M5TOS1_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
297 #define BIT_PRI_M5TOS1_RND_EN ( BIT(17) )
298 #define BIT_PRI_M5TOS1_ADJ_EN ( BIT(16) )
299 #define BITS_PRI_M6TOS1_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
300 #define BITS_PRI_M6TOS1_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
301 #define BIT_PRI_M6TOS1_RND_EN ( BIT(9) )
302 #define BIT_PRI_M6TOS1_ADJ_EN ( BIT(8) )
303 #define BITS_PRI_M7TOS1_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
304 #define BITS_PRI_M7TOS1_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
305 #define BIT_PRI_M7TOS1_RND_EN ( BIT(1) )
306 #define BIT_PRI_M7TOS1_ADJ_EN ( BIT(0) )
308 /* bits definitions for register REG_AP_AHB_AP_MTX_S0_PRIO2 */
309 #define BITS_PRI_M9TOS1_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
310 #define BITS_PRI_M9TOS1_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
311 #define BIT_PRI_M9TOS1_RND_EN ( BIT(1) )
312 #define BIT_PRI_M9TOS1_ADJ_EN ( BIT(0) )
314 /* bits definitions for register REG_AP_AHB_AP_MAIN_MTX_HPROT_CFG */
315 #define BITS_HPROT_NFC(_X_) ( (_X_) << 24 & (BIT(24)|BIT(25)|BIT(26)|BIT(27)) )
316 #define BITS_HPROT_EMMC(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
317 #define BITS_HPROT_SDIO2(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
318 #define BITS_HPROT_SDIO1(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
319 #define BITS_HPROT_SDIO0(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
320 #define BITS_HPROT_DMAW(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
321 #define BITS_HPROT_DMAR(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
323 /* bits definitions for register REG_AP_AHB_CA7_STANDBY_STATUS */
324 #define BIT_CA7_STANDBYWFIL2 ( BIT(12) )
325 #define BITS_CA7_ETMSTANDBYWFX(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
326 #define BITS_CA7_STANDBYWFE(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
327 #define BITS_CA7_STANDBYWFI(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
329 /* bits definitions for register REG_AP_AHB_NANC_CLK_CFG */
330 #define BITS_CLK_NANDC_SEL(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)) )
331 #define BITS_CLK_NANDC2X_DIV(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
332 #define BITS_CLK_NANDC2X_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)) )
334 /* bits definitions for register REG_AP_AHB_LVDS_CFG */
335 #define BITS_LVDS_TXCLKDATA(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)) )
336 #define BITS_LVDS_TXCOM(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)) )
337 #define BITS_LVDS_TXSLEW(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
338 #define BITS_LVDS_TXSW(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)) )
339 #define BITS_LVDS_TXRERSER(_X_) ( (_X_) << 3 & (BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
340 #define BITS_LVDS_PRE_EMP(_X_) ( (_X_) << 1 & (BIT(1)|BIT(2)) )
341 #define BIT_LVDS_TXPD ( BIT(0) )
343 /* bits definitions for register REG_AP_AHB_LVDS_PLL_CFG0 */
344 #define BIT_LPLL_LOCK_DET ( BIT(31) )
345 #define BITS_LPLL_POST_DIV(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)|BIT(28)|BIT(29)) )
346 #define BITS_LPLL_REFIN(_X_) ( (_X_) << 24 & (BIT(24)|BIT(25)) )
347 #define BITS_LPLL_LPF(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)) )
348 #define BIT_LPLL_DIV_S ( BIT(18) )
349 #define BITS_LPLL_IBIAS(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)) )
350 #define BITS_LPLLN(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)) )
352 /* bits definitions for register REG_AP_AHB_LVDS_PLL_CFG1 */
353 #define BITS_LPLL_KINT(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)|BIT(16)|BIT(17)|BIT(18)|BIT(19)|BIT(20)|BIT(21)|BIT(22)|BIT(23)|BIT(24)|BIT(25)|BIT(26)|BIT(27)|BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
354 #define BITS_LPLL_RSV(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
355 #define BIT_LPLL_MOD_EN ( BIT(7) )
356 #define BIT_LPLL_SDM_EN ( BIT(6) )
357 #define BITS_LPLL_NINT(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)) )
359 /* bits definitions for register REG_AP_AHB_CA7_C0_AUTO_FORCE_SHUTDOWN_EN */
360 #define BIT_CA7_C0_AUTO_FORCE_SHUTDOWN_EN ( BIT(0) )
362 /* bits definitions for register REG_AP_AHB_CA7_C1_AUTO_FORCE_SHUTDOWN_EN */
363 #define BIT_CA7_C1_AUTO_FORCE_SHUTDOWN_EN ( BIT(0) )
365 /* bits definitions for register REG_AP_AHB_CA7_C2_AUTO_FORCE_SHUTDOWN_EN */
366 #define BIT_CA7_C2_AUTO_FORCE_SHUTDOWN_EN ( BIT(0) )
368 /* bits definitions for register REG_AP_AHB_CA7_C3_AUTO_FORCE_SHUTDOWN_EN */
369 #define BIT_CA7_C3_AUTO_FORCE_SHUTDOWN_EN ( BIT(0) )
371 /* bits definitions for register REG_AP_AHB_AP_QOS_CFG */
372 #define BITS_QOS_R_TMC(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
373 #define BITS_QOS_W_TMC(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
374 #define BITS_QOS_R_DISPC1(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
375 #define BITS_QOS_W_DISPC1(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
376 #define BITS_QOS_R_DISPC0(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
377 #define BITS_QOS_W_DISPC0(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
379 /* bits definitions for register REG_AP_AHB_CHIP_ID */
380 #define BITS_CHIP_ID(_X_) (_X_)
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