2 * Copyright (C) 2014-2015 Spreadtrum Communications Inc.
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
11 //#ifndef __SCI_GLB_REGS_H__
12 //#error "Don't include this file directly, Pls include sci_glb_regs.h"
16 #ifndef __H_REGS_AP_AHB_HEADFILE_H__
17 #define __H_REGS_AP_AHB_HEADFILE_H__ __FILE__
21 /* registers definitions for AP_AHB */
22 #define REG_AP_AHB_AHB_EB SCI_ADDR(REGS_AP_AHB_BASE, 0x0000)
23 #define REG_AP_AHB_AHB_RST SCI_ADDR(REGS_AP_AHB_BASE, 0x0004)
24 #define REG_AP_AHB_CA7_RST_SET SCI_ADDR(REGS_AP_AHB_BASE, 0x0008)
25 #define REG_AP_AHB_CA7_CKG_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x000C)
26 #define REG_AP_AHB_MCU_PAUSE SCI_ADDR(REGS_AP_AHB_BASE, 0x0010)
27 #define REG_AP_AHB_MISC_CKG_EN SCI_ADDR(REGS_AP_AHB_BASE, 0x0014)
28 #define REG_AP_AHB_MISC_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x0018)
29 #define REG_AP_AHB_AP_MTX_S3_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x001C)
30 #define REG_AP_AHB_AP_MTX_S3_PRIO1 SCI_ADDR(REGS_AP_AHB_BASE, 0x0020)
31 #define REG_AP_AHB_AP_MTX_S3_PRIO2 SCI_ADDR(REGS_AP_AHB_BASE, 0x0024)
32 #define REG_AP_AHB_AP_MTX_S2_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x0028)
33 #define REG_AP_AHB_AP_MTX_S1_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x002C)
34 #define REG_AP_AHB_AP_MTX_S0_PRIO0 SCI_ADDR(REGS_AP_AHB_BASE, 0x0030)
35 #define REG_AP_AHB_AP_MTX_S0_PRIO1 SCI_ADDR(REGS_AP_AHB_BASE, 0x0034)
36 #define REG_AP_AHB_AP_MTX_S0_PRIO2 SCI_ADDR(REGS_AP_AHB_BASE, 0x0038)
37 #define REG_AP_AHB_AP_SYS_FORCE_SLEEP_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x003C)
38 #define REG_AP_AHB_AP_SYS_AUTO_SLEEP_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x0040)
39 #define REG_AP_AHB_AP_MAIN_MTX_HPROT_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x0044)
40 #define REG_AP_AHB_CA7_STANDBY_STATUS SCI_ADDR(REGS_AP_AHB_BASE, 0x0048)
41 #define REG_AP_AHB_HOLDING_PEN SCI_ADDR(REGS_AP_AHB_BASE, 0x004C)
42 #define REG_AP_AHB_JMP_ADDR_CA7_C0 SCI_ADDR(REGS_AP_AHB_BASE, 0x0050)
43 #define REG_AP_AHB_JMP_ADDR_CA7_C1 SCI_ADDR(REGS_AP_AHB_BASE, 0x0054)
44 #define REG_AP_AHB_JMP_ADDR_CA7_C2 SCI_ADDR(REGS_AP_AHB_BASE, 0x0058)
45 #define REG_AP_AHB_JMP_ADDR_CA7_C3 SCI_ADDR(REGS_AP_AHB_BASE, 0x005C)
46 #define REG_AP_AHB_NANC_CLK_CFG SCI_ADDR(REGS_AP_AHB_BASE, 0x0060)
47 #define REG_AP_AHB_BOOT_MODE SCI_ADDR(REGS_AP_AHB_BASE, 0x0068)
48 #define REG_AP_AHB_RES_REG0 SCI_ADDR(REGS_AP_AHB_BASE, 0x00F0)
49 #define REG_AP_AHB_CHIP_ID SCI_ADDR(REGS_AP_AHB_BASE, 0x00FC)
53 /* bits definitions for register REG_AP_AHB_AHB_EB */
54 #define BIT_ZIPDEC_EB ( BIT(21) )
55 #define BIT_ZIPENC_EB ( BIT(20) )
56 #define BIT_NANDC_ECC_EB ( BIT(19) )
57 #define BIT_NANDC_2X_EB ( BIT(18) )
58 #define BIT_NANDC_EB ( BIT(17) )
59 #define BIT_BUSMON2_EB ( BIT(16) )
60 #define BIT_BUSMON1_EB ( BIT(15) )
61 #define BIT_BUSMON0_EB ( BIT(14) )
62 #define BIT_SPINLOCK_EB ( BIT(13) )
63 #define BIT_GPS_EB ( BIT(12) )
64 #define BIT_EMMC_EB ( BIT(11) )
65 #define BIT_SDIO2_EB ( BIT(10) )
66 #define BIT_SDIO1_EB ( BIT(9) )
67 #define BIT_SDIO0_EB ( BIT(8) )
68 #define BIT_DRM_EB ( BIT(7) )
69 #define BIT_NFC_EB ( BIT(6) )
70 #define BIT_DMA_EB ( BIT(5) )
71 #define BIT_USB_EB ( BIT(4) )
72 #define BIT_GSP_EB ( BIT(3) )
73 #define BIT_DISPC1_EB ( BIT(2) )
74 #define BIT_DISPC0_EB ( BIT(1) )
75 #define BIT_DSI_EB ( BIT(0) )
77 /* bits definitions for register REG_AP_AHB_AHB_RST */
78 #define BIT_ZIP_MTX_SOFT_RST ( BIT(24) )
79 #define BIT_ZIPDEC_SOFT_RST ( BIT(23) )
80 #define BIT_ZIPENC_SOFT_RST ( BIT(22) )
81 #define BIT_NANDC_SOFT_RST ( BIT(20) )
82 #define BIT_BUSMON2_SOFT_RST ( BIT(19) )
83 #define BIT_BUSMON1_SOFT_RST ( BIT(18) )
84 #define BIT_BUSMON0_SOFT_RST ( BIT(17) )
85 #define BIT_SPINLOCK_SOFT_RST ( BIT(16) )
86 #define BIT_GPS_SOFT_RST ( BIT(15) )
87 #define BIT_EMMC_SOFT_RST ( BIT(14) )
88 #define BIT_SDIO2_SOFT_RST ( BIT(13) )
89 #define BIT_SDIO1_SOFT_RST ( BIT(12) )
90 #define BIT_SDIO0_SOFT_RST ( BIT(11) )
91 #define BIT_DRM_SOFT_RST ( BIT(10) )
92 #define BIT_NFC_SOFT_RST ( BIT(9) )
93 #define BIT_DMA_SOFT_RST ( BIT(8) )
94 #define BIT_USB_PHY_SOFT_RST ( BIT(7) )
95 #define BIT_USB_UTMI_SOFT_RST ( BIT(6) )
96 #define BIT_USB_SOFT_RST ( BIT(5) )
97 #define BIT_DISP_MTX_SOFT_RST ( BIT(4) )
98 #define BIT_GSP_SOFT_RST ( BIT(3) )
99 #define BIT_DISPC1_SOFT_RST ( BIT(2) )
100 #define BIT_DISPC0_SOFT_RST ( BIT(1) )
101 #define BIT_DSI_SOFT_RST ( BIT(0) )
103 /* bits definitions for register REG_AP_AHB_CA7_RST_SET */
104 #define BIT_CA7_CS_DBG_SOFT_RST ( BIT(14) )
105 #define BIT_CA7_L2_SOFT_RST ( BIT(13) )
106 #define BIT_CA7_SOCDBG_SOFT_RST ( BIT(12) )
107 #define BITS_CA7_ETM_SOFT_RST(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
108 #define BITS_CA7_DBG_SOFT_RST(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
109 #define BITS_CA7_CORE_SOFT_RST(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
111 /* bits definitions for register REG_AP_AHB_CA7_CKG_CFG */
112 #define BITS_CA7_DBG_CKG_DIV(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)) )
113 #define BITS_CA7_AXI_CKG_DIV(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)) )
114 #define BITS_CA7_MCU_CKG_DIV(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)) )
115 #define BITS_CA7_MCU_CKG_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)) )
117 /* bits definitions for register REG_AP_AHB_MCU_PAUSE */
118 #define BIT_DMA_ACT_LIGHT_EN ( BIT(5) )
119 #define BIT_MCU_SLEEP_FOLLOW_CA7_EN ( BIT(4) )
120 #define BIT_MCU_LIGHT_SLEEP_EN ( BIT(3) )
121 #define BIT_MCU_DEEP_SLEEP_EN ( BIT(2) )
122 #define BIT_MCU_SYS_SLEEP_EN ( BIT(1) )
123 #define BIT_MCU_CORE_SLEEP ( BIT(0) )
125 /* bits definitions for register REG_AP_AHB_MISC_CKG_EN */
126 #define BIT_GPS_TCXO_INV_SEL ( BIT(13) )
127 #define BIT_GPS_26M_INV_SEL ( BIT(12) )
128 #define BIT_ASHB_CA7_DBG_VLD ( BIT(9) )
129 #define BIT_ASHB_CA7_DBG_EN ( BIT(8) )
130 #define BIT_DISP_TMC_CKG_EN ( BIT(4) )
131 #define BIT_DPHY_REF_CKG_EN ( BIT(1) )
132 #define BIT_DPHY_CFG_CKG_EN ( BIT(0) )
134 /* bits definitions for register REG_AP_AHB_MISC_CFG */
135 #define BIT_EMMC_SLOT_SEL ( BIT(17) )
136 #define BIT_SDIO0_SLOT_SEL ( BIT(16) )
137 #define BITS_BUSMON2_CHN_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
138 #define BITS_BUSMON1_CHN_SEL(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)) )
139 #define BIT_BUSMON0_CHN_SEL ( BIT(4) )
140 #define BITS_SDIO2_SLOT_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
141 #define BITS_SDIO1_SLOT_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)) )
143 /* bits definitions for register REG_AP_AHB_AP_MTX_S3_PRIO0 */
144 #define BITS_PRI_M6TOS3_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
145 #define BITS_PRI_M6TOS3_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
146 #define BIT_PRI_M6TOS3_RND_EN ( BIT(25) )
147 #define BIT_PRI_M6TOS3_ADJ_EN ( BIT(24) )
148 #define BITS_PRI_M7TOS3_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
149 #define BITS_PRI_M7TOS3_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
150 #define BIT_PRI_M7TOS3_RND_EN ( BIT(17) )
151 #define BIT_PRI_M7TOS3_ADJ_EN ( BIT(16) )
152 #define BITS_PRI_M8TOS3_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
153 #define BITS_PRI_M8TOS3_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
154 #define BIT_PRI_M8TOS3_RND_EN ( BIT(9) )
155 #define BIT_PRI_M8TOS3_ADJ_EN ( BIT(8) )
156 #define BITS_PRI_M9TOS3_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
157 #define BITS_PRI_M9TOS3_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
158 #define BIT_PRI_M9TOS3_RND_EN ( BIT(1) )
159 #define BIT_PRI_M9TOS3_ADJ_EN ( BIT(0) )
161 /* bits definitions for register REG_AP_AHB_AP_MTX_S3_PRIO1 */
162 #define BITS_PRI_M2TOS3_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
163 #define BITS_PRI_M2TOS3_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
164 #define BIT_PRI_M2TOS3_RND_EN ( BIT(25) )
165 #define BIT_PRI_M2TOS3_ADJ_EN ( BIT(24) )
166 #define BITS_PRI_M3TOS3_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
167 #define BITS_PRI_M3TOS3_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
168 #define BIT_PRI_M3TOS3_RND_EN ( BIT(17) )
169 #define BIT_PRI_M3TOS3_ADJ_EN ( BIT(16) )
170 #define BITS_PRI_M4TOS3_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
171 #define BITS_PRI_M4TOS3_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
172 #define BIT_PRI_M4TOS3_RND_EN ( BIT(9) )
173 #define BIT_PRI_M4TOS3_ADJ_EN ( BIT(8) )
174 #define BITS_PRI_M5TOS3_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
175 #define BITS_PRI_M5TOS3_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
176 #define BIT_PRI_M5TOS3_RND_EN ( BIT(1) )
177 #define BIT_PRI_M5TOS3_ADJ_EN ( BIT(0) )
179 /* bits definitions for register REG_AP_AHB_AP_MTX_S3_PRIO2 */
180 #define BITS_PRI_M0TOS3_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
181 #define BITS_PRI_M0TOS3_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
182 #define BIT_PRI_M0TOS3_RND_EN ( BIT(1) )
183 #define BIT_PRI_M0TOS3_ADJ_EN ( BIT(0) )
185 /* bits definitions for register REG_AP_AHB_AP_MTX_S2_PRIO0 */
186 #define BITS_PRI_M0TOS2_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
187 #define BITS_PRI_M0TOS2_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
188 #define BIT_PRI_M0TOS2_RND_EN ( BIT(25) )
189 #define BIT_PRI_M0TOS2_ADJ_EN ( BIT(24) )
190 #define BITS_PRI_M1TOS2_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
191 #define BITS_PRI_M1TOS2_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
192 #define BIT_PRI_M1TOS2_RND_EN ( BIT(17) )
193 #define BIT_PRI_M1TOS2_ADJ_EN ( BIT(16) )
194 #define BITS_PRI_M2TOS2_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
195 #define BITS_PRI_M2TOS2_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
196 #define BIT_PRI_M2TOS2_RND_EN ( BIT(9) )
197 #define BIT_PRI_M2TOS2_ADJ_EN ( BIT(8) )
198 #define BITS_PRI_M3TOS2_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
199 #define BITS_PRI_M3TOS2_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
200 #define BIT_PRI_M3TOS2_RND_EN ( BIT(1) )
201 #define BIT_PRI_M3TOS2_ADJ_EN ( BIT(0) )
203 /* bits definitions for register REG_AP_AHB_AP_MTX_S1_PRIO0 */
204 #define BITS_PRI_M0TOS1_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
205 #define BITS_PRI_M0TOS1_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
206 #define BIT_PRI_M0TOS1_RND_EN ( BIT(25) )
207 #define BIT_PRI_M0TOS1_ADJ_EN ( BIT(24) )
208 #define BITS_PRI_M2TOS1_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
209 #define BITS_PRI_M2TOS1_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
210 #define BIT_PRI_M2TOS1_RND_EN ( BIT(17) )
211 #define BIT_PRI_M2TOS1_ADJ_EN ( BIT(16) )
212 #define BITS_PRI_M3TOS1_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
213 #define BITS_PRI_M3TOS1_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
214 #define BIT_PRI_M3TOS1_RND_EN ( BIT(9) )
215 #define BIT_PRI_M3TOS1_ADJ_EN ( BIT(8) )
216 #define BITS_PRI_M8TOS1_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
217 #define BITS_PRI_M8TOS1_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
218 #define BIT_PRI_M8TOS1_RND_EN ( BIT(1) )
219 #define BIT_PRI_M8TOS1_ADJ_EN ( BIT(0) )
221 /* bits definitions for register REG_AP_AHB_AP_MTX_S0_PRIO0 */
222 #define BITS_PRI_M0TOS0_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
223 #define BITS_PRI_M0TOS0_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
224 #define BIT_PRI_M0TOS0_RND_EN ( BIT(25) )
225 #define BIT_PRI_M0TOS0_ADJ_EN ( BIT(24) )
226 #define BITS_PRI_M1TOS0_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
227 #define BITS_PRI_M1TOS0_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
228 #define BIT_PRI_M1TOS0_RND_EN ( BIT(17) )
229 #define BIT_PRI_M1TOS0_ADJ_EN ( BIT(16) )
230 #define BITS_PRI_M2TOS0_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
231 #define BITS_PRI_M2TOS0_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
232 #define BIT_PRI_M2TOS0_RND_EN ( BIT(9) )
233 #define BIT_PRI_M2TOS0_ADJ_EN ( BIT(8) )
234 #define BITS_PRI_M3TOS0_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
235 #define BITS_PRI_M3TOS0_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
236 #define BIT_PRI_M3TOS0_RND_EN ( BIT(1) )
237 #define BIT_PRI_M3TOS0_ADJ_EN ( BIT(0) )
239 /* bits definitions for register REG_AP_AHB_AP_MTX_S0_PRIO1 */
240 #define BITS_PRI_M4TOS1_RND_THR(_X_) ( (_X_) << 28 & (BIT(28)|BIT(29)|BIT(30)|BIT(31)) )
241 #define BITS_PRI_M4TOS1_SEL(_X_) ( (_X_) << 26 & (BIT(26)|BIT(27)) )
242 #define BIT_PRI_M4TOS1_RND_EN ( BIT(25) )
243 #define BIT_PRI_M4TOS1_ADJ_EN ( BIT(24) )
244 #define BITS_PRI_M5TOS1_RND_THR(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
245 #define BITS_PRI_M5TOS1_SEL(_X_) ( (_X_) << 18 & (BIT(18)|BIT(19)) )
246 #define BIT_PRI_M5TOS1_RND_EN ( BIT(17) )
247 #define BIT_PRI_M5TOS1_ADJ_EN ( BIT(16) )
248 #define BITS_PRI_M6TOS1_RND_THR(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
249 #define BITS_PRI_M6TOS1_SEL(_X_) ( (_X_) << 10 & (BIT(10)|BIT(11)) )
250 #define BIT_PRI_M6TOS1_RND_EN ( BIT(9) )
251 #define BIT_PRI_M6TOS1_ADJ_EN ( BIT(8) )
252 #define BITS_PRI_M7TOS1_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
253 #define BITS_PRI_M7TOS1_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
254 #define BIT_PRI_M7TOS1_RND_EN ( BIT(1) )
255 #define BIT_PRI_M7TOS1_ADJ_EN ( BIT(0) )
257 /* bits definitions for register REG_AP_AHB_AP_MTX_S0_PRIO2 */
258 #define BITS_PRI_M9TOS1_RND_THR(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
259 #define BITS_PRI_M9TOS1_SEL(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
260 #define BIT_PRI_M9TOS1_RND_EN ( BIT(1) )
261 #define BIT_PRI_M9TOS1_ADJ_EN ( BIT(0) )
263 /* bits definitions for register REG_AP_AHB_AP_SYS_FORCE_SLEEP_CFG */
264 #define BIT_AP_PERI_FORCE_ON ( BIT(2) )
265 #define BIT_AP_PERI_FORCE_SLP ( BIT(1) )
266 #define BIT_AP_APB_SLEEP ( BIT(0) )
268 /* bits definitions for register REG_AP_AHB_AP_SYS_AUTO_SLEEP_CFG */
269 #define BIT_GSP_CKG_FORCE_EN ( BIT(9) )
270 #define BIT_GSP_AUTO_GATE_EN ( BIT(8) )
271 #define BIT_AP_AHB_AUTO_GATE_EN ( BIT(5) )
272 #define BIT_AP_EMC_AUTO_GATE_EN ( BIT(4) )
273 #define BIT_CA7_EMC_AUTO_GATE_EN ( BIT(3) )
274 #define BIT_CA7_DBG_FORCE_SLEEP ( BIT(2) )
275 #define BIT_CA7_DBG_AUTO_GATE_EN ( BIT(1) )
276 #define BIT_CA7_CORE_AUTO_GATE_EN ( BIT(0) )
278 /* bits definitions for register REG_AP_AHB_AP_MAIN_MTX_HPROT_CFG */
279 #define BITS_HPROT_NFC(_X_) ( (_X_) << 24 & (BIT(24)|BIT(25)|BIT(26)|BIT(27)) )
280 #define BITS_HPROT_EMMC(_X_) ( (_X_) << 20 & (BIT(20)|BIT(21)|BIT(22)|BIT(23)) )
281 #define BITS_HPROT_SDIO2(_X_) ( (_X_) << 16 & (BIT(16)|BIT(17)|BIT(18)|BIT(19)) )
282 #define BITS_HPROT_SDIO1(_X_) ( (_X_) << 12 & (BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
283 #define BITS_HPROT_SDIO0(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
284 #define BITS_HPROT_DMAW(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
285 #define BITS_HPROT_DMAR(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
287 /* bits definitions for register REG_AP_AHB_CA7_STANDBY_STATUS */
288 #define BIT_CA7_STANDBYWFIL2 ( BIT(12) )
289 #define BITS_CA7_ETMSTANDBYWFX(_X_) ( (_X_) << 8 & (BIT(8)|BIT(9)|BIT(10)|BIT(11)) )
290 #define BITS_CA7_STANDBYWFE(_X_) ( (_X_) << 4 & (BIT(4)|BIT(5)|BIT(6)|BIT(7)) )
291 #define BITS_CA7_STANDBYWFI(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)) )
293 /* bits definitions for register REG_AP_AHB_HOLDING_PEN */
294 #define BITS_HOLDING_PEN(_X_) (_X_)
296 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C0 */
297 #define BITS_JMP_ADDR_CA7_C0(_X_) (_X_)
299 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C1 */
300 #define BITS_JMP_ADDR_CA7_C1(_X_) (_X_)
302 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C2 */
303 #define BITS_JMP_ADDR_CA7_C2(_X_) (_X_)
305 /* bits definitions for register REG_AP_AHB_JMP_ADDR_CA7_C3 */
306 #define BITS_JMP_ADDR_CA7_C3(_X_) (_X_)
308 /* bits definitions for register REG_AP_AHB_NANC_CLK_CFG */
309 #define BITS_CLK_NANDC2X_DIV(_X_) ( (_X_) << 2 & (BIT(2)|BIT(3)) )
310 #define BITS_CLK_NANDC2X_SEL(_X_) ( (_X_) & (BIT(0)|BIT(1)) )
312 /* bits definitions for register REG_AP_AHB_BOOT_MODE */
313 #define BIT_PTEST_FUNC_MODE ( BIT(7) )
314 #define BIT_USB_DLOAD_EN ( BIT(4) )
315 #define BIT_ARM_BOOT_MD3 ( BIT(3) )
316 #define BIT_ARM_BOOT_MD2 ( BIT(2) )
317 #define BIT_ARM_BOOT_MD1 ( BIT(1) )
318 #define BIT_ARM_BOOT_MD0 ( BIT(0) )
320 /* bits definitions for register REG_AP_AHB_RES_REG0 */
321 #define BITS_RES_REG0(_X_) ( (_X_) & (BIT(0)|BIT(1)|BIT(2)|BIT(3)|BIT(4)|BIT(5)|BIT(6)|BIT(7)|BIT(8)|BIT(9)|BIT(10)|BIT(11)|BIT(12)|BIT(13)|BIT(14)|BIT(15)) )
323 /* bits definitions for register REG_AP_AHB_CHIP_ID */
324 #define BITS_CHIP_ID(_X_) (_X_)
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