arch/arm/include/asm/arch-sc8800x/regs_wdg.h

   1 #ifndef _SC8800H_REG_WDG_H_
   2     #define _SC8800H_REG_WDG_H_
   3
   4 #ifdef   __cplusplus
   5     extern   "C"
   6     {
   7 #endif
   8
   9 #define WDG_BASE                                0x89003000
  10
  11 #define WDG_LOAD                                                (WDG_BASE + 0x0000)
  12 #define WDG_VALUE                                               (WDG_BASE + 0x0004)
  13 #define WDG_CTL                                                 (WDG_BASE + 0x0008)
  14 #define WDG_INT_CLR                                             (WDG_BASE + 0x000C)
  15 #define WDG_INT_RAW_STS                                 (WDG_BASE + 0x0010)
  16 #define WDG_INT_MASKED_STS                              (WDG_BASE + 0x0014)
  17 #define WDG_LOCK                                                (WDG_BASE + 0x0C00)
  18
  19 #ifdef   __cplusplus
  20     }
  21 #endif
  22 #endif
  23 // End