1 #ifndef _SC8800H_REG_TIMER_H_
2 #define _SC8800H_REG_TIMER_H_
9 #define TIMER_CTL_BASE 0x81000000
11 #define TIMER0_BASE (TIMER_CTL_BASE + 0x0000)
12 #define TM0_LOAD (TIMER0_BASE + 0x0000) //Write to this register will reload the timer with the new value.
13 #define TM0_VALUE (TIMER0_BASE + 0x0004) //Return the current timer value.
14 #define TM0_CTL (TIMER0_BASE + 0x0008)
15 #define TM0_CLR (TIMER0_BASE + 0x000C) //Write to this register will clear the interrupt generated by this timer.
17 #define TIMER1_BASE (TIMER_CTL_BASE + 0x0020)
18 #define TM1_LOAD (TIMER1_BASE + 0x0000) //Write to this register will reload the timer with the new value.
19 #define TM1_VALUE (TIMER1_BASE + 0x0004) //Return the current timer value.
20 #define TM1_CTL (TIMER1_BASE + 0x0008)
21 #define TM1_CLR (TIMER1_BASE + 0x000C) //Write to this register will clear the interrupt generated by this timer.
23 //The corresponding bit of TIMER0_CTL/TIMER1_CTL register.
24 #define TMCTL_CLK1 (0) //prescale timer clk (apb clk) by 1
25 #define TMCTL_MODE_B (1 << 6) //
26 #define TMCTL_EN (1 << 7) //enable bit of this timer.
27 #define TIMER_MAX_VALUE 0x7FFFFF
30 typedef struct timer_tag
32 volatile uint32_t load;
33 volatile uint32_t value;
34 volatile uint32_t ctl;
35 volatile uint32_t clr;